summaryrefslogtreecommitdiff
path: root/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index 3501d7495..50277eec3 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -72,6 +72,14 @@ Id EmitIMul32(EmitContext& ctx, Id a, Id b) {
72 return ctx.OpIMul(ctx.U32[1], a, b); 72 return ctx.OpIMul(ctx.U32[1], a, b);
73} 73}
74 74
75Id EmitSDiv32(EmitContext& ctx, Id a, Id b) {
76 return ctx.OpSDiv(ctx.U32[1], a, b);
77}
78
79Id EmitUDiv32(EmitContext& ctx, Id a, Id b) {
80 return ctx.OpUDiv(ctx.U32[1], a, b);
81}
82
75Id EmitINeg32(EmitContext& ctx, Id value) { 83Id EmitINeg32(EmitContext& ctx, Id value) {
76 return ctx.OpSNegate(ctx.U32[1], value); 84 return ctx.OpSNegate(ctx.U32[1], value);
77} 85}