diff options
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index f5001cdaa..5ab3b5e86 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |||
| @@ -74,16 +74,24 @@ Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift) { | |||
| 74 | return ctx.OpShiftLeftLogical(ctx.U32[1], base, shift); | 74 | return ctx.OpShiftLeftLogical(ctx.U32[1], base, shift); |
| 75 | } | 75 | } |
| 76 | 76 | ||
| 77 | Id EmitShiftRightLogical32(EmitContext& ctx, Id a, Id b) { | 77 | Id EmitShiftLeftLogical64(EmitContext& ctx, Id base, Id shift) { |
| 78 | return ctx.OpShiftRightLogical(ctx.U32[1], a, b); | 78 | return ctx.OpShiftLeftLogical(ctx.U64, base, shift); |
| 79 | } | 79 | } |
| 80 | 80 | ||
| 81 | Id EmitShiftRightLogical64(EmitContext& ctx, Id a, Id b) { | 81 | Id EmitShiftRightLogical32(EmitContext& ctx, Id base, Id shift) { |
| 82 | return ctx.OpShiftRightLogical(ctx.U64, a, b); | 82 | return ctx.OpShiftRightLogical(ctx.U32[1], base, shift); |
| 83 | } | 83 | } |
| 84 | 84 | ||
| 85 | Id EmitShiftRightArithmetic32(EmitContext& ctx, Id a, Id b) { | 85 | Id EmitShiftRightLogical64(EmitContext& ctx, Id base, Id shift) { |
| 86 | return ctx.OpShiftRightArithmetic(ctx.U32[1], a, b); | 86 | return ctx.OpShiftRightLogical(ctx.U64, base, shift); |
| 87 | } | ||
| 88 | |||
| 89 | Id EmitShiftRightArithmetic32(EmitContext& ctx, Id base, Id shift) { | ||
| 90 | return ctx.OpShiftRightArithmetic(ctx.U32[1], base, shift); | ||
| 91 | } | ||
| 92 | |||
| 93 | Id EmitShiftRightArithmetic64(EmitContext& ctx, Id base, Id shift) { | ||
| 94 | return ctx.OpShiftRightArithmetic(ctx.U64, base, shift); | ||
| 87 | } | 95 | } |
| 88 | 96 | ||
| 89 | Id EmitBitwiseAnd32(EmitContext& ctx, Id a, Id b) { | 97 | Id EmitBitwiseAnd32(EmitContext& ctx, Id a, Id b) { |