diff options
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_image.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_image.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp index fea3bc112..7a4388e7e 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp | |||
| @@ -320,7 +320,7 @@ Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& | |||
| 320 | // We can't use implicit lods on non-fragment stages on SPIR-V. Maxwell hardware behaves as | 320 | // We can't use implicit lods on non-fragment stages on SPIR-V. Maxwell hardware behaves as |
| 321 | // if the lod was explicitly zero. This may change on Turing with implicit compute | 321 | // if the lod was explicitly zero. This may change on Turing with implicit compute |
| 322 | // derivatives | 322 | // derivatives |
| 323 | const Id lod{ctx.Const(0)}; | 323 | const Id lod{ctx.Const(0.0f)}; |
| 324 | const ImageOperands operands(ctx, false, true, info.has_lod_clamp != 0, lod, offset); | 324 | const ImageOperands operands(ctx, false, true, info.has_lod_clamp != 0, lod, offset); |
| 325 | return Emit(&EmitContext::OpImageSparseSampleExplicitLod, | 325 | return Emit(&EmitContext::OpImageSparseSampleExplicitLod, |
| 326 | &EmitContext::OpImageSampleExplicitLod, ctx, inst, ctx.F32[4], | 326 | &EmitContext::OpImageSampleExplicitLod, ctx, inst, ctx.F32[4], |