diff options
Diffstat (limited to 'src/shader_recompiler/backend/glasm/emit_glasm_convert.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_convert.cpp | 231 |
1 files changed, 231 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_convert.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_convert.cpp new file mode 100644 index 000000000..ccdf1cbc8 --- /dev/null +++ b/src/shader_recompiler/backend/glasm/emit_glasm_convert.cpp | |||
| @@ -0,0 +1,231 @@ | |||
| 1 | // Copyright 2021 yuzu Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #include <string_view> | ||
| 6 | |||
| 7 | #include "shader_recompiler/backend/glasm/emit_context.h" | ||
| 8 | #include "shader_recompiler/backend/glasm/emit_glasm_instructions.h" | ||
| 9 | #include "shader_recompiler/frontend/ir/modifiers.h" | ||
| 10 | #include "shader_recompiler/frontend/ir/value.h" | ||
| 11 | |||
| 12 | namespace Shader::Backend::GLASM { | ||
| 13 | namespace { | ||
| 14 | std::string_view FpRounding(IR::FpRounding fp_rounding) { | ||
| 15 | switch (fp_rounding) { | ||
| 16 | case IR::FpRounding::DontCare: | ||
| 17 | return ""; | ||
| 18 | case IR::FpRounding::RN: | ||
| 19 | return ".ROUND"; | ||
| 20 | case IR::FpRounding::RZ: | ||
| 21 | return ".TRUNC"; | ||
| 22 | case IR::FpRounding::RM: | ||
| 23 | return ".FLR"; | ||
| 24 | case IR::FpRounding::RP: | ||
| 25 | return ".CEIL"; | ||
| 26 | } | ||
| 27 | throw InvalidArgument("Invalid floating-point rounding {}", fp_rounding); | ||
| 28 | } | ||
| 29 | |||
| 30 | template <typename InputType> | ||
| 31 | void Convert(EmitContext& ctx, IR::Inst& inst, InputType value, std::string_view dest, | ||
| 32 | std::string_view src, bool is_long_result) { | ||
| 33 | const std::string_view fp_rounding{FpRounding(inst.Flags<IR::FpControl>().rounding)}; | ||
| 34 | const auto ret{is_long_result ? ctx.reg_alloc.LongDefine(inst) : ctx.reg_alloc.Define(inst)}; | ||
| 35 | ctx.Add("CVT.{}.{}{} {}.x,{};", dest, src, fp_rounding, ret, value); | ||
| 36 | } | ||
| 37 | } // Anonymous namespace | ||
| 38 | |||
| 39 | void EmitConvertS16F16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 40 | Convert(ctx, inst, value, "S16", "F16", false); | ||
| 41 | } | ||
| 42 | |||
| 43 | void EmitConvertS16F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) { | ||
| 44 | Convert(ctx, inst, value, "S16", "F32", false); | ||
| 45 | } | ||
| 46 | |||
| 47 | void EmitConvertS16F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) { | ||
| 48 | Convert(ctx, inst, value, "S16", "F64", false); | ||
| 49 | } | ||
| 50 | |||
| 51 | void EmitConvertS32F16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 52 | Convert(ctx, inst, value, "S32", "F16", false); | ||
| 53 | } | ||
| 54 | |||
| 55 | void EmitConvertS32F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) { | ||
| 56 | Convert(ctx, inst, value, "S32", "F32", false); | ||
| 57 | } | ||
| 58 | |||
| 59 | void EmitConvertS32F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) { | ||
| 60 | Convert(ctx, inst, value, "S32", "F64", false); | ||
| 61 | } | ||
| 62 | |||
| 63 | void EmitConvertS64F16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 64 | Convert(ctx, inst, value, "S64", "F16", true); | ||
| 65 | } | ||
| 66 | |||
| 67 | void EmitConvertS64F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) { | ||
| 68 | Convert(ctx, inst, value, "S64", "F32", true); | ||
| 69 | } | ||
| 70 | |||
| 71 | void EmitConvertS64F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) { | ||
| 72 | Convert(ctx, inst, value, "S64", "F64", true); | ||
| 73 | } | ||
| 74 | |||
| 75 | void EmitConvertU16F16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 76 | Convert(ctx, inst, value, "U16", "F16", false); | ||
| 77 | } | ||
| 78 | |||
| 79 | void EmitConvertU16F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) { | ||
| 80 | Convert(ctx, inst, value, "U16", "F32", false); | ||
| 81 | } | ||
| 82 | |||
| 83 | void EmitConvertU16F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) { | ||
| 84 | Convert(ctx, inst, value, "U16", "F64", false); | ||
| 85 | } | ||
| 86 | |||
| 87 | void EmitConvertU32F16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 88 | Convert(ctx, inst, value, "U32", "F16", false); | ||
| 89 | } | ||
| 90 | |||
| 91 | void EmitConvertU32F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) { | ||
| 92 | Convert(ctx, inst, value, "U32", "F32", false); | ||
| 93 | } | ||
| 94 | |||
| 95 | void EmitConvertU32F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) { | ||
| 96 | Convert(ctx, inst, value, "U32", "F64", false); | ||
| 97 | } | ||
| 98 | |||
| 99 | void EmitConvertU64F16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 100 | Convert(ctx, inst, value, "U64", "F16", true); | ||
| 101 | } | ||
| 102 | |||
| 103 | void EmitConvertU64F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) { | ||
| 104 | Convert(ctx, inst, value, "U64", "F32", true); | ||
| 105 | } | ||
| 106 | |||
| 107 | void EmitConvertU64F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) { | ||
| 108 | Convert(ctx, inst, value, "U64", "F64", true); | ||
| 109 | } | ||
| 110 | |||
| 111 | void EmitConvertU64U32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value) { | ||
| 112 | Convert(ctx, inst, value, "U64", "U32", true); | ||
| 113 | } | ||
| 114 | |||
| 115 | void EmitConvertU32U64(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 116 | Convert(ctx, inst, value, "U32", "U64", false); | ||
| 117 | } | ||
| 118 | |||
| 119 | void EmitConvertF16F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) { | ||
| 120 | Convert(ctx, inst, value, "F16", "F32", false); | ||
| 121 | } | ||
| 122 | |||
| 123 | void EmitConvertF32F16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 124 | Convert(ctx, inst, value, "F32", "F16", false); | ||
| 125 | } | ||
| 126 | |||
| 127 | void EmitConvertF32F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) { | ||
| 128 | Convert(ctx, inst, value, "F32", "F64", false); | ||
| 129 | } | ||
| 130 | |||
| 131 | void EmitConvertF64F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) { | ||
| 132 | Convert(ctx, inst, value, "F64", "F32", true); | ||
| 133 | } | ||
| 134 | |||
| 135 | void EmitConvertF16S8(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 136 | Convert(ctx, inst, value, "F16", "S8", false); | ||
| 137 | } | ||
| 138 | |||
| 139 | void EmitConvertF16S16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 140 | Convert(ctx, inst, value, "F16", "S16", false); | ||
| 141 | } | ||
| 142 | |||
| 143 | void EmitConvertF16S32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) { | ||
| 144 | Convert(ctx, inst, value, "F16", "S32", false); | ||
| 145 | } | ||
| 146 | |||
| 147 | void EmitConvertF16S64(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 148 | Convert(ctx, inst, value, "F16", "S64", false); | ||
| 149 | } | ||
| 150 | |||
| 151 | void EmitConvertF16U8(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 152 | Convert(ctx, inst, value, "F16", "U8", false); | ||
| 153 | } | ||
| 154 | |||
| 155 | void EmitConvertF16U16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 156 | Convert(ctx, inst, value, "F16", "U16", false); | ||
| 157 | } | ||
| 158 | |||
| 159 | void EmitConvertF16U32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value) { | ||
| 160 | Convert(ctx, inst, value, "F16", "U32", false); | ||
| 161 | } | ||
| 162 | |||
| 163 | void EmitConvertF16U64(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 164 | Convert(ctx, inst, value, "F16", "U64", false); | ||
| 165 | } | ||
| 166 | |||
| 167 | void EmitConvertF32S8(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 168 | Convert(ctx, inst, value, "F32", "S8", false); | ||
| 169 | } | ||
| 170 | |||
| 171 | void EmitConvertF32S16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 172 | Convert(ctx, inst, value, "F32", "S16", false); | ||
| 173 | } | ||
| 174 | |||
| 175 | void EmitConvertF32S32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) { | ||
| 176 | Convert(ctx, inst, value, "F32", "S32", false); | ||
| 177 | } | ||
| 178 | |||
| 179 | void EmitConvertF32S64(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 180 | Convert(ctx, inst, value, "F32", "S64", false); | ||
| 181 | } | ||
| 182 | |||
| 183 | void EmitConvertF32U8(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 184 | Convert(ctx, inst, value, "F32", "U8", false); | ||
| 185 | } | ||
| 186 | |||
| 187 | void EmitConvertF32U16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 188 | Convert(ctx, inst, value, "F32", "U16", false); | ||
| 189 | } | ||
| 190 | |||
| 191 | void EmitConvertF32U32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value) { | ||
| 192 | Convert(ctx, inst, value, "F32", "U32", false); | ||
| 193 | } | ||
| 194 | |||
| 195 | void EmitConvertF32U64(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 196 | Convert(ctx, inst, value, "F32", "U64", false); | ||
| 197 | } | ||
| 198 | |||
| 199 | void EmitConvertF64S8(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 200 | Convert(ctx, inst, value, "F64", "S8", true); | ||
| 201 | } | ||
| 202 | |||
| 203 | void EmitConvertF64S16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 204 | Convert(ctx, inst, value, "F64", "S16", true); | ||
| 205 | } | ||
| 206 | |||
| 207 | void EmitConvertF64S32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) { | ||
| 208 | Convert(ctx, inst, value, "F64", "S32", true); | ||
| 209 | } | ||
| 210 | |||
| 211 | void EmitConvertF64S64(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 212 | Convert(ctx, inst, value, "F64", "S64", true); | ||
| 213 | } | ||
| 214 | |||
| 215 | void EmitConvertF64U8(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 216 | Convert(ctx, inst, value, "F64", "U8", true); | ||
| 217 | } | ||
| 218 | |||
| 219 | void EmitConvertF64U16(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 220 | Convert(ctx, inst, value, "F64", "U16", true); | ||
| 221 | } | ||
| 222 | |||
| 223 | void EmitConvertF64U32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value) { | ||
| 224 | Convert(ctx, inst, value, "F64", "U32", true); | ||
| 225 | } | ||
| 226 | |||
| 227 | void EmitConvertF64U64(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 228 | Convert(ctx, inst, value, "F64", "U64", true); | ||
| 229 | } | ||
| 230 | |||
| 231 | } // namespace Shader::Backend::GLASM | ||