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-rw-r--r--src/core/hw/gpu.cpp8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp
index 591997aa3..87cf93bac 100644
--- a/src/core/hw/gpu.cpp
+++ b/src/core/hw/gpu.cpp
@@ -14,6 +14,7 @@
14 14
15#include "core/hw/gpu.h" 15#include "core/hw/gpu.h"
16 16
17#include "video_core/command_processor.h"
17#include "video_core/video_core.h" 18#include "video_core/video_core.h"
18 19
19 20
@@ -143,14 +144,15 @@ inline void Write(u32 addr, const T data) {
143 break; 144 break;
144 } 145 }
145 146
147 // Seems like writing to this register triggers processing
146 case GPU_REG_INDEX(command_processor_config.trigger): 148 case GPU_REG_INDEX(command_processor_config.trigger):
147 { 149 {
148 const auto& config = g_regs.command_processor_config; 150 const auto& config = g_regs.command_processor_config;
149 if (config.trigger & 1) 151 if (config.trigger & 1)
150 { 152 {
151 // u32* buffer = (u32*)Memory::GetPointer(config.GetPhysicalAddress()); 153 u32* buffer = (u32*)Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalAddress()));
152 ERROR_LOG(GPU, "Beginning 0x%08x bytes of commands from address 0x%08x", config.size, config.GetPhysicalAddress()); 154 u32 size = config.size << 3;
153 // TODO: Process command list! 155 Pica::CommandProcessor::ProcessCommandList(buffer, size);
154 } 156 }
155 break; 157 break;
156 } 158 }