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-rw-r--r--src/core/arm/disassembler/arm_disasm.cpp78
-rw-r--r--src/core/hle/svc.cpp2
-rw-r--r--src/core/loader/loader.cpp31
3 files changed, 55 insertions, 56 deletions
diff --git a/src/core/arm/disassembler/arm_disasm.cpp b/src/core/arm/disassembler/arm_disasm.cpp
index 33e036cbf..45c720e16 100644
--- a/src/core/arm/disassembler/arm_disasm.cpp
+++ b/src/core/arm/disassembler/arm_disasm.cpp
@@ -260,14 +260,14 @@ std::string ARM_Disasm::DisassembleALU(Opcode opcode, uint32_t insn)
260 // The "mov" instruction ignores the first operand (rn). 260 // The "mov" instruction ignores the first operand (rn).
261 rn_str[0] = 0; 261 rn_str[0] = 0;
262 if ((flags & kNoOperand1) == 0) { 262 if ((flags & kNoOperand1) == 0) {
263 rn_str = StringFromFormat("r%d, ", rn); 263 rn_str = Common::StringFromFormat("r%d, ", rn);
264 } 264 }
265 265
266 // The following instructions do not write the result register (rd): 266 // The following instructions do not write the result register (rd):
267 // tst, teq, cmp, cmn. 267 // tst, teq, cmp, cmn.
268 rd_str[0] = 0; 268 rd_str[0] = 0;
269 if ((flags & kNoDest) == 0) { 269 if ((flags & kNoDest) == 0) {
270 rd_str = StringFromFormat("r%d, ", rd); 270 rd_str = Common::StringFromFormat("r%d, ", rd);
271 } 271 }
272 272
273 const char *sbit_str = ""; 273 const char *sbit_str = "";
@@ -275,7 +275,7 @@ std::string ARM_Disasm::DisassembleALU(Opcode opcode, uint32_t insn)
275 sbit_str = "s"; 275 sbit_str = "s";
276 276
277 if (is_immed) { 277 if (is_immed) {
278 return StringFromFormat("%s%s%s\t%s%s#%u ; 0x%x", 278 return Common::StringFromFormat("%s%s%s\t%s%s#%u ; 0x%x",
279 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), immed, immed); 279 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), immed, immed);
280 } 280 }
281 281
@@ -290,24 +290,24 @@ std::string ARM_Disasm::DisassembleALU(Opcode opcode, uint32_t insn)
290 rotated_val = (rotated_val >> rotate2) | (rotated_val << (32 - rotate2)); 290 rotated_val = (rotated_val >> rotate2) | (rotated_val << (32 - rotate2));
291 291
292 if (!shift_is_reg && shift_type == 0 && shift_amount == 0) { 292 if (!shift_is_reg && shift_type == 0 && shift_amount == 0) {
293 return StringFromFormat("%s%s%s\t%s%sr%d", 293 return Common::StringFromFormat("%s%s%s\t%s%sr%d",
294 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), rm); 294 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), rm);
295 } 295 }
296 296
297 const char *shift_name = shift_names[shift_type]; 297 const char *shift_name = shift_names[shift_type];
298 if (shift_is_reg) { 298 if (shift_is_reg) {
299 return StringFromFormat("%s%s%s\t%s%sr%d, %s r%d", 299 return Common::StringFromFormat("%s%s%s\t%s%sr%d, %s r%d",
300 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), rm, 300 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), rm,
301 shift_name, rs); 301 shift_name, rs);
302 } 302 }
303 if (shift_amount == 0) { 303 if (shift_amount == 0) {
304 if (shift_type == 3) { 304 if (shift_type == 3) {
305 return StringFromFormat("%s%s%s\t%s%sr%d, RRX", 305 return Common::StringFromFormat("%s%s%s\t%s%sr%d, RRX",
306 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), rm); 306 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), rm);
307 } 307 }
308 shift_amount = 32; 308 shift_amount = 32;
309 } 309 }
310 return StringFromFormat("%s%s%s\t%s%sr%d, %s #%u", 310 return Common::StringFromFormat("%s%s%s\t%s%sr%d, %s #%u",
311 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), rm, 311 opname, cond_to_str(cond), sbit_str, rd_str.c_str(), rn_str.c_str(), rm,
312 shift_name, shift_amount); 312 shift_name, shift_amount);
313} 313}
@@ -325,20 +325,20 @@ std::string ARM_Disasm::DisassembleBranch(uint32_t addr, Opcode opcode, uint32_t
325 offset += 8; 325 offset += 8;
326 addr += offset; 326 addr += offset;
327 const char *opname = opcode_names[opcode]; 327 const char *opname = opcode_names[opcode];
328 return StringFromFormat("%s%s\t0x%x", opname, cond_to_str(cond), addr); 328 return Common::StringFromFormat("%s%s\t0x%x", opname, cond_to_str(cond), addr);
329} 329}
330 330
331std::string ARM_Disasm::DisassembleBX(uint32_t insn) 331std::string ARM_Disasm::DisassembleBX(uint32_t insn)
332{ 332{
333 uint8_t cond = (insn >> 28) & 0xf; 333 uint8_t cond = (insn >> 28) & 0xf;
334 uint8_t rn = insn & 0xf; 334 uint8_t rn = insn & 0xf;
335 return StringFromFormat("bx%s\tr%d", cond_to_str(cond), rn); 335 return Common::StringFromFormat("bx%s\tr%d", cond_to_str(cond), rn);
336} 336}
337 337
338std::string ARM_Disasm::DisassembleBKPT(uint32_t insn) 338std::string ARM_Disasm::DisassembleBKPT(uint32_t insn)
339{ 339{
340 uint32_t immed = (((insn >> 8) & 0xfff) << 4) | (insn & 0xf); 340 uint32_t immed = (((insn >> 8) & 0xfff) << 4) | (insn & 0xf);
341 return StringFromFormat("bkpt\t#%d", immed); 341 return Common::StringFromFormat("bkpt\t#%d", immed);
342} 342}
343 343
344std::string ARM_Disasm::DisassembleCLZ(uint32_t insn) 344std::string ARM_Disasm::DisassembleCLZ(uint32_t insn)
@@ -346,7 +346,7 @@ std::string ARM_Disasm::DisassembleCLZ(uint32_t insn)
346 uint8_t cond = (insn >> 28) & 0xf; 346 uint8_t cond = (insn >> 28) & 0xf;
347 uint8_t rd = (insn >> 12) & 0xf; 347 uint8_t rd = (insn >> 12) & 0xf;
348 uint8_t rm = insn & 0xf; 348 uint8_t rm = insn & 0xf;
349 return StringFromFormat("clz%s\tr%d, r%d", cond_to_str(cond), rd, rm); 349 return Common::StringFromFormat("clz%s\tr%d, r%d", cond_to_str(cond), rd, rm);
350} 350}
351 351
352std::string ARM_Disasm::DisassembleMemblock(Opcode opcode, uint32_t insn) 352std::string ARM_Disasm::DisassembleMemblock(Opcode opcode, uint32_t insn)
@@ -376,7 +376,7 @@ std::string ARM_Disasm::DisassembleMemblock(Opcode opcode, uint32_t insn)
376 tmp_list[0] = 0; 376 tmp_list[0] = 0;
377 for (int ii = 0; ii < 16; ++ii) { 377 for (int ii = 0; ii < 16; ++ii) {
378 if (reg_list & (1 << ii)) { 378 if (reg_list & (1 << ii)) {
379 tmp_list += StringFromFormat("%sr%d", comma, ii); 379 tmp_list += Common::StringFromFormat("%sr%d", comma, ii);
380 comma = ","; 380 comma = ",";
381 } 381 }
382 } 382 }
@@ -396,7 +396,7 @@ std::string ARM_Disasm::DisassembleMemblock(Opcode opcode, uint32_t insn)
396 } 396 }
397 } 397 }
398 398
399 return StringFromFormat("%s%s%s\tr%d%s, {%s}%s", 399 return Common::StringFromFormat("%s%s%s\tr%d%s, {%s}%s",
400 opname, cond_to_str(cond), addr_mode, rn, bang, tmp_list.c_str(), carret); 400 opname, cond_to_str(cond), addr_mode, rn, bang, tmp_list.c_str(), carret);
401} 401}
402 402
@@ -432,10 +432,10 @@ std::string ARM_Disasm::DisassembleMem(uint32_t insn)
432 if (is_reg == 0) { 432 if (is_reg == 0) {
433 if (is_pre) { 433 if (is_pre) {
434 if (offset == 0) { 434 if (offset == 0) {
435 return StringFromFormat("%s%s%s\tr%d, [r%d]", 435 return Common::StringFromFormat("%s%s%s\tr%d, [r%d]",
436 opname, cond_to_str(cond), byte, rd, rn); 436 opname, cond_to_str(cond), byte, rd, rn);
437 } else { 437 } else {
438 return StringFromFormat("%s%s%s\tr%d, [r%d, #%s%u]%s", 438 return Common::StringFromFormat("%s%s%s\tr%d, [r%d, #%s%u]%s",
439 opname, cond_to_str(cond), byte, rd, rn, minus, offset, bang); 439 opname, cond_to_str(cond), byte, rd, rn, minus, offset, bang);
440 } 440 }
441 } else { 441 } else {
@@ -443,7 +443,7 @@ std::string ARM_Disasm::DisassembleMem(uint32_t insn)
443 if (write_back) 443 if (write_back)
444 transfer = "t"; 444 transfer = "t";
445 445
446 return StringFromFormat("%s%s%s%s\tr%d, [r%d], #%s%u", 446 return Common::StringFromFormat("%s%s%s%s\tr%d, [r%d], #%s%u",
447 opname, cond_to_str(cond), byte, transfer, rd, rn, minus, offset); 447 opname, cond_to_str(cond), byte, transfer, rd, rn, minus, offset);
448 } 448 }
449 } 449 }
@@ -457,16 +457,16 @@ std::string ARM_Disasm::DisassembleMem(uint32_t insn)
457 if (is_pre) { 457 if (is_pre) {
458 if (shift_amount == 0) { 458 if (shift_amount == 0) {
459 if (shift_type == 0) { 459 if (shift_type == 0) {
460 return StringFromFormat("%s%s%s\tr%d, [r%d, %sr%d]%s", 460 return Common::StringFromFormat("%s%s%s\tr%d, [r%d, %sr%d]%s",
461 opname, cond_to_str(cond), byte, rd, rn, minus, rm, bang); 461 opname, cond_to_str(cond), byte, rd, rn, minus, rm, bang);
462 } 462 }
463 if (shift_type == 3) { 463 if (shift_type == 3) {
464 return StringFromFormat("%s%s%s\tr%d, [r%d, %sr%d, RRX]%s", 464 return Common::StringFromFormat("%s%s%s\tr%d, [r%d, %sr%d, RRX]%s",
465 opname, cond_to_str(cond), byte, rd, rn, minus, rm, bang); 465 opname, cond_to_str(cond), byte, rd, rn, minus, rm, bang);
466 } 466 }
467 shift_amount = 32; 467 shift_amount = 32;
468 } 468 }
469 return StringFromFormat("%s%s%s\tr%d, [r%d, %sr%d, %s #%u]%s", 469 return Common::StringFromFormat("%s%s%s\tr%d, [r%d, %sr%d, %s #%u]%s",
470 opname, cond_to_str(cond), byte, rd, rn, minus, rm, 470 opname, cond_to_str(cond), byte, rd, rn, minus, rm,
471 shift_name, shift_amount, bang); 471 shift_name, shift_amount, bang);
472 } 472 }
@@ -477,17 +477,17 @@ std::string ARM_Disasm::DisassembleMem(uint32_t insn)
477 477
478 if (shift_amount == 0) { 478 if (shift_amount == 0) {
479 if (shift_type == 0) { 479 if (shift_type == 0) {
480 return StringFromFormat("%s%s%s%s\tr%d, [r%d], %sr%d", 480 return Common::StringFromFormat("%s%s%s%s\tr%d, [r%d], %sr%d",
481 opname, cond_to_str(cond), byte, transfer, rd, rn, minus, rm); 481 opname, cond_to_str(cond), byte, transfer, rd, rn, minus, rm);
482 } 482 }
483 if (shift_type == 3) { 483 if (shift_type == 3) {
484 return StringFromFormat("%s%s%s%s\tr%d, [r%d], %sr%d, RRX", 484 return Common::StringFromFormat("%s%s%s%s\tr%d, [r%d], %sr%d, RRX",
485 opname, cond_to_str(cond), byte, transfer, rd, rn, minus, rm); 485 opname, cond_to_str(cond), byte, transfer, rd, rn, minus, rm);
486 } 486 }
487 shift_amount = 32; 487 shift_amount = 32;
488 } 488 }
489 489
490 return StringFromFormat("%s%s%s%s\tr%d, [r%d], %sr%d, %s #%u", 490 return Common::StringFromFormat("%s%s%s%s\tr%d, [r%d], %sr%d, %s #%u",
491 opname, cond_to_str(cond), byte, transfer, rd, rn, minus, rm, 491 opname, cond_to_str(cond), byte, transfer, rd, rn, minus, rm,
492 shift_name, shift_amount); 492 shift_name, shift_amount);
493} 493}
@@ -528,22 +528,22 @@ std::string ARM_Disasm::DisassembleMemHalf(uint32_t insn)
528 if (is_immed) { 528 if (is_immed) {
529 if (is_pre) { 529 if (is_pre) {
530 if (offset == 0) { 530 if (offset == 0) {
531 return StringFromFormat("%s%sh\tr%d, [r%d]", opname, cond_to_str(cond), rd, rn); 531 return Common::StringFromFormat("%s%sh\tr%d, [r%d]", opname, cond_to_str(cond), rd, rn);
532 } else { 532 } else {
533 return StringFromFormat("%s%sh\tr%d, [r%d, #%s%u]%s", 533 return Common::StringFromFormat("%s%sh\tr%d, [r%d, #%s%u]%s",
534 opname, cond_to_str(cond), rd, rn, minus, offset, bang); 534 opname, cond_to_str(cond), rd, rn, minus, offset, bang);
535 } 535 }
536 } else { 536 } else {
537 return StringFromFormat("%s%sh\tr%d, [r%d], #%s%u", 537 return Common::StringFromFormat("%s%sh\tr%d, [r%d], #%s%u",
538 opname, cond_to_str(cond), rd, rn, minus, offset); 538 opname, cond_to_str(cond), rd, rn, minus, offset);
539 } 539 }
540 } 540 }
541 541
542 if (is_pre) { 542 if (is_pre) {
543 return StringFromFormat("%s%sh\tr%d, [r%d, %sr%d]%s", 543 return Common::StringFromFormat("%s%sh\tr%d, [r%d, %sr%d]%s",
544 opname, cond_to_str(cond), rd, rn, minus, rm, bang); 544 opname, cond_to_str(cond), rd, rn, minus, rm, bang);
545 } else { 545 } else {
546 return StringFromFormat("%s%sh\tr%d, [r%d], %sr%d", 546 return Common::StringFromFormat("%s%sh\tr%d, [r%d], %sr%d",
547 opname, cond_to_str(cond), rd, rn, minus, rm); 547 opname, cond_to_str(cond), rd, rn, minus, rm);
548 } 548 }
549} 549}
@@ -558,7 +558,7 @@ std::string ARM_Disasm::DisassembleMCR(Opcode opcode, uint32_t insn)
558 uint8_t crm = insn & 0xf; 558 uint8_t crm = insn & 0xf;
559 559
560 const char *opname = opcode_names[opcode]; 560 const char *opname = opcode_names[opcode];
561 return StringFromFormat("%s%s\t%d, 0, r%d, cr%d, cr%d, {%d}", 561 return Common::StringFromFormat("%s%s\t%d, 0, r%d, cr%d, cr%d, {%d}",
562 opname, cond_to_str(cond), cpnum, crd, crn, crm, opcode2); 562 opname, cond_to_str(cond), cpnum, crd, crn, crm, opcode2);
563} 563}
564 564
@@ -572,7 +572,7 @@ std::string ARM_Disasm::DisassembleMLA(Opcode opcode, uint32_t insn)
572 uint8_t bit_s = (insn >> 20) & 1; 572 uint8_t bit_s = (insn >> 20) & 1;
573 573
574 const char *opname = opcode_names[opcode]; 574 const char *opname = opcode_names[opcode];
575 return StringFromFormat("%s%s%s\tr%d, r%d, r%d, r%d", 575 return Common::StringFromFormat("%s%s%s\tr%d, r%d, r%d, r%d",
576 opname, cond_to_str(cond), bit_s ? "s" : "", rd, rm, rs, rn); 576 opname, cond_to_str(cond), bit_s ? "s" : "", rd, rm, rs, rn);
577} 577}
578 578
@@ -586,7 +586,7 @@ std::string ARM_Disasm::DisassembleUMLAL(Opcode opcode, uint32_t insn)
586 uint8_t bit_s = (insn >> 20) & 1; 586 uint8_t bit_s = (insn >> 20) & 1;
587 587
588 const char *opname = opcode_names[opcode]; 588 const char *opname = opcode_names[opcode];
589 return StringFromFormat("%s%s%s\tr%d, r%d, r%d, r%d", 589 return Common::StringFromFormat("%s%s%s\tr%d, r%d, r%d, r%d",
590 opname, cond_to_str(cond), bit_s ? "s" : "", rdlo, rdhi, rm, rs); 590 opname, cond_to_str(cond), bit_s ? "s" : "", rdlo, rdhi, rm, rs);
591} 591}
592 592
@@ -599,7 +599,7 @@ std::string ARM_Disasm::DisassembleMUL(Opcode opcode, uint32_t insn)
599 uint8_t bit_s = (insn >> 20) & 1; 599 uint8_t bit_s = (insn >> 20) & 1;
600 600
601 const char *opname = opcode_names[opcode]; 601 const char *opname = opcode_names[opcode];
602 return StringFromFormat("%s%s%s\tr%d, r%d, r%d", 602 return Common::StringFromFormat("%s%s%s\tr%d, r%d, r%d",
603 opname, cond_to_str(cond), bit_s ? "s" : "", rd, rm, rs); 603 opname, cond_to_str(cond), bit_s ? "s" : "", rd, rm, rs);
604} 604}
605 605
@@ -609,7 +609,7 @@ std::string ARM_Disasm::DisassembleMRS(uint32_t insn)
609 uint8_t rd = (insn >> 12) & 0xf; 609 uint8_t rd = (insn >> 12) & 0xf;
610 uint8_t ps = (insn >> 22) & 1; 610 uint8_t ps = (insn >> 22) & 1;
611 611
612 return StringFromFormat("mrs%s\tr%d, %s", cond_to_str(cond), rd, ps ? "spsr" : "cpsr"); 612 return Common::StringFromFormat("mrs%s\tr%d, %s", cond_to_str(cond), rd, ps ? "spsr" : "cpsr");
613} 613}
614 614
615std::string ARM_Disasm::DisassembleMSR(uint32_t insn) 615std::string ARM_Disasm::DisassembleMSR(uint32_t insn)
@@ -636,13 +636,13 @@ std::string ARM_Disasm::DisassembleMSR(uint32_t insn)
636 uint8_t rotate = (insn >> 8) & 0xf; 636 uint8_t rotate = (insn >> 8) & 0xf;
637 uint8_t rotate2 = rotate << 1; 637 uint8_t rotate2 = rotate << 1;
638 uint32_t rotated_val = (immed >> rotate2) | (immed << (32 - rotate2)); 638 uint32_t rotated_val = (immed >> rotate2) | (immed << (32 - rotate2));
639 return StringFromFormat("msr%s\t%s_%s, #0x%x", 639 return Common::StringFromFormat("msr%s\t%s_%s, #0x%x",
640 cond_to_str(cond), pd ? "spsr" : "cpsr", flags, rotated_val); 640 cond_to_str(cond), pd ? "spsr" : "cpsr", flags, rotated_val);
641 } 641 }
642 642
643 uint8_t rm = insn & 0xf; 643 uint8_t rm = insn & 0xf;
644 644
645 return StringFromFormat("msr%s\t%s_%s, r%d", 645 return Common::StringFromFormat("msr%s\t%s_%s, r%d",
646 cond_to_str(cond), pd ? "spsr" : "cpsr", flags, rm); 646 cond_to_str(cond), pd ? "spsr" : "cpsr", flags, rm);
647} 647}
648 648
@@ -658,14 +658,14 @@ std::string ARM_Disasm::DisassemblePLD(uint32_t insn)
658 658
659 if (is_reg) { 659 if (is_reg) {
660 uint8_t rm = insn & 0xf; 660 uint8_t rm = insn & 0xf;
661 return StringFromFormat("pld\t[r%d, %sr%d]", rn, minus, rm); 661 return Common::StringFromFormat("pld\t[r%d, %sr%d]", rn, minus, rm);
662 } 662 }
663 663
664 uint16_t offset = insn & 0xfff; 664 uint16_t offset = insn & 0xfff;
665 if (offset == 0) { 665 if (offset == 0) {
666 return StringFromFormat("pld\t[r%d]", rn); 666 return Common::StringFromFormat("pld\t[r%d]", rn);
667 } else { 667 } else {
668 return StringFromFormat("pld\t[r%d, #%s%u]", rn, minus, offset); 668 return Common::StringFromFormat("pld\t[r%d, #%s%u]", rn, minus, offset);
669 } 669 }
670} 670}
671 671
@@ -674,7 +674,7 @@ std::string ARM_Disasm::DisassembleSWI(uint32_t insn)
674 uint8_t cond = (insn >> 28) & 0xf; 674 uint8_t cond = (insn >> 28) & 0xf;
675 uint32_t sysnum = insn & 0x00ffffff; 675 uint32_t sysnum = insn & 0x00ffffff;
676 676
677 return StringFromFormat("swi%s 0x%x", cond_to_str(cond), sysnum); 677 return Common::StringFromFormat("swi%s 0x%x", cond_to_str(cond), sysnum);
678} 678}
679 679
680std::string ARM_Disasm::DisassembleSWP(Opcode opcode, uint32_t insn) 680std::string ARM_Disasm::DisassembleSWP(Opcode opcode, uint32_t insn)
@@ -685,7 +685,7 @@ std::string ARM_Disasm::DisassembleSWP(Opcode opcode, uint32_t insn)
685 uint8_t rm = insn & 0xf; 685 uint8_t rm = insn & 0xf;
686 686
687 const char *opname = opcode_names[opcode]; 687 const char *opname = opcode_names[opcode];
688 return StringFromFormat("%s%s\tr%d, r%d, [r%d]", opname, cond_to_str(cond), rd, rm, rn); 688 return Common::StringFromFormat("%s%s\tr%d, r%d, [r%d]", opname, cond_to_str(cond), rd, rm, rn);
689} 689}
690 690
691Opcode ARM_Disasm::Decode(uint32_t insn) { 691Opcode ARM_Disasm::Decode(uint32_t insn) {
diff --git a/src/core/hle/svc.cpp b/src/core/hle/svc.cpp
index bdcfae6f5..0ce3f027b 100644
--- a/src/core/hle/svc.cpp
+++ b/src/core/hle/svc.cpp
@@ -221,7 +221,7 @@ Result CreateThread(u32 priority, u32 entry_point, u32 arg, u32 stack_top, u32 p
221 TSymbol symbol = Symbols::GetSymbol(entry_point); 221 TSymbol symbol = Symbols::GetSymbol(entry_point);
222 name = symbol.name; 222 name = symbol.name;
223 } else { 223 } else {
224 name = StringFromFormat("unknown-%08x", entry_point); 224 name = Common::StringFromFormat("unknown-%08x", entry_point);
225 } 225 }
226 226
227 Handle thread = Kernel::CreateThread(name.c_str(), entry_point, priority, arg, processor_id, 227 Handle thread = Kernel::CreateThread(name.c_str(), entry_point, priority, arg, processor_id,
diff --git a/src/core/loader/loader.cpp b/src/core/loader/loader.cpp
index ce1154b79..1f895ed2e 100644
--- a/src/core/loader/loader.cpp
+++ b/src/core/loader/loader.cpp
@@ -28,22 +28,21 @@ FileType IdentifyFile(const std::string &filename) {
28 } 28 }
29 29
30 size_t extension_loc = filename.find_last_of('.'); 30 size_t extension_loc = filename.find_last_of('.');
31 std::string extension = extension_loc != std::string::npos ? filename.substr(extension_loc) : ""; 31 if (extension_loc == std::string::npos)
32 32 return FileType::Unknown;
33 if (LowerStr(extension) == ".elf") { 33 std::string extension = Common::ToLower(filename.substr(extension_loc));
34 return FileType::ELF; // TODO(bunnei): Do some filetype checking :p 34
35 } 35 // TODO(bunnei): Do actual filetype checking instead of naively checking the extension
36 else if (LowerStr(extension) == ".axf") { 36 if (extension == ".elf") {
37 return FileType::ELF; // TODO(bunnei): Do some filetype checking :p 37 return FileType::ELF;
38 } 38 } else if (extension == ".axf") {
39 else if (LowerStr(extension) == ".cxi") { 39 return FileType::ELF;
40 return FileType::CXI; // TODO(bunnei): Do some filetype checking :p 40 } else if (extension == ".cxi") {
41 } 41 return FileType::CXI;
42 else if (LowerStr(extension) == ".cci") { 42 } else if (extension == ".cci") {
43 return FileType::CCI; // TODO(bunnei): Do some filetype checking :p 43 return FileType::CCI;
44 } 44 } else if (extension == ".bin") {
45 else if (LowerStr(extension) == ".bin") { 45 return FileType::BIN;
46 return FileType::BIN; // TODO(bunnei): Do some filetype checking :p
47 } 46 }
48 return FileType::Unknown; 47 return FileType::Unknown;
49} 48}