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-rw-r--r--src/core/arm/arm_interface.h28
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.cpp129
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.h8
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp8
-rw-r--r--src/core/arm/dyncom/arm_dyncom.h8
-rw-r--r--src/core/gdbstub/gdbstub.h4
-rw-r--r--src/core/hle/function_wrappers.h2
-rw-r--r--src/core/hle/service/ldr_ro/cro_helper.cpp2
8 files changed, 111 insertions, 78 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index ccd43f431..b52228476 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -14,14 +14,14 @@ public:
14 virtual ~ARM_Interface() {} 14 virtual ~ARM_Interface() {}
15 15
16 struct ThreadContext { 16 struct ThreadContext {
17 u32 cpu_registers[13]; 17 u64 cpu_registers[30];
18 u32 sp; 18 u64 lr;
19 u32 lr; 19 u64 sp;
20 u32 pc; 20 u64 pc;
21 u32 cpsr; 21 u64 cpsr;
22 u32 fpu_registers[64]; 22 u64 fpu_registers[64];
23 u32 fpscr; 23 u64 fpscr;
24 u32 fpexc; 24 u64 fpexc;
25 }; 25 };
26 26
27 /** 27 /**
@@ -45,27 +45,27 @@ public:
45 * Set the Program Counter to an address 45 * Set the Program Counter to an address
46 * @param addr Address to set PC to 46 * @param addr Address to set PC to
47 */ 47 */
48 virtual void SetPC(u32 addr) = 0; 48 virtual void SetPC(u64 addr) = 0;
49 49
50 /* 50 /*
51 * Get the current Program Counter 51 * Get the current Program Counter
52 * @return Returns current PC 52 * @return Returns current PC
53 */ 53 */
54 virtual u32 GetPC() const = 0; 54 virtual u64 GetPC() const = 0;
55 55
56 /** 56 /**
57 * Get an ARM register 57 * Get an ARM register
58 * @param index Register index (0-15) 58 * @param index Register index
59 * @return Returns the value in the register 59 * @return Returns the value in the register
60 */ 60 */
61 virtual u32 GetReg(int index) const = 0; 61 virtual u64 GetReg(int index) const = 0;
62 62
63 /** 63 /**
64 * Set an ARM register 64 * Set an ARM register
65 * @param index Register index (0-15) 65 * @param index Register index
66 * @param value Value to set register to 66 * @param value Value to set register to
67 */ 67 */
68 virtual void SetReg(int index, u32 value) = 0; 68 virtual void SetReg(int index, u64 value) = 0;
69 69
70 /** 70 /**
71 * Gets the value of a VFP register 71 * Gets the value of a VFP register
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp
index 7d2790b08..3da968344 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic.cpp
@@ -14,72 +14,105 @@
14#include "core/hle/svc.h" 14#include "core/hle/svc.h"
15#include "core/memory.h" 15#include "core/memory.h"
16 16
17static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit, void* user_arg) { 17static void InterpreterFallback(u64 pc, Dynarmic::Jit* jit, void* user_arg) {
18 ARMul_State* state = static_cast<ARMul_State*>(user_arg); 18 UNIMPLEMENTED_MSG("InterpreterFallback for ARM64 JIT does not exist!");
19 //ARMul_State* state = static_cast<ARMul_State*>(user_arg);
19 20
20 state->Reg = jit->Regs(); 21 //state->Reg = jit->Regs();
21 state->Cpsr = jit->Cpsr(); 22 //state->Cpsr = jit->Cpsr();
22 state->Reg[15] = pc; 23 //state->Reg[15] = static_cast<u32>(pc);
23 state->ExtReg = jit->ExtRegs(); 24 //state->ExtReg = jit->ExtRegs();
24 state->VFP[VFP_FPSCR] = jit->Fpscr(); 25 //state->VFP[VFP_FPSCR] = jit->Fpscr();
25 state->NumInstrsToExecute = 1; 26 //state->NumInstrsToExecute = 1;
26 27
27 InterpreterMainLoop(state); 28 //InterpreterMainLoop(state);
28 29
29 bool is_thumb = (state->Cpsr & (1 << 5)) != 0; 30 //bool is_thumb = (state->Cpsr & (1 << 5)) != 0;
30 state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC); 31 //state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
31 32
32 jit->Regs() = state->Reg; 33 //jit->Regs() = state->Reg;
33 jit->Cpsr() = state->Cpsr; 34 //jit->Cpsr() = state->Cpsr;
34 jit->ExtRegs() = state->ExtReg; 35 //jit->ExtRegs() = state->ExtReg;
35 jit->SetFpscr(state->VFP[VFP_FPSCR]); 36 //jit->SetFpscr(state->VFP[VFP_FPSCR]);
36} 37}
37 38
38static bool IsReadOnlyMemory(u32 vaddr) { 39static bool IsReadOnlyMemory(u64 vaddr) {
39 // TODO(bunnei): ImplementMe 40 // TODO(bunnei): ImplementMe
40 return false; 41 return false;
41} 42}
42 43
44u8 MemoryRead8(const u64 addr) {
45 return Memory::Read8(static_cast<VAddr>(addr));
46}
47
48u16 MemoryRead16(const u64 addr) {
49 return Memory::Read16(static_cast<VAddr>(addr));
50}
51
52u32 MemoryRead32(const u64 addr) {
53 return Memory::Read32(static_cast<VAddr>(addr));
54}
55
56u64 MemoryRead64(const u64 addr) {
57 return Memory::Read64(static_cast<VAddr>(addr));
58}
59
60void MemoryWrite8(const u64 addr, const u8 data) {
61 Memory::Write8(static_cast<VAddr>(addr), data);
62}
63
64void MemoryWrite16(const u64 addr, const u16 data) {
65 Memory::Write16(static_cast<VAddr>(addr), data);
66}
67
68void MemoryWrite32(const u64 addr, const u32 data) {
69 Memory::Write32(static_cast<VAddr>(addr), data);
70}
71
72void MemoryWrite64(const u64 addr, const u64 data) {
73 Memory::Write64(static_cast<VAddr>(addr), data);
74}
75
43static Dynarmic::UserCallbacks GetUserCallbacks( 76static Dynarmic::UserCallbacks GetUserCallbacks(
44 const std::shared_ptr<ARMul_State>& interpeter_state) { 77 const std::shared_ptr<ARMul_State>& interpeter_state) {
45 Dynarmic::UserCallbacks user_callbacks{}; 78 Dynarmic::UserCallbacks user_callbacks{};
46 user_callbacks.InterpreterFallback = &InterpreterFallback; 79 //user_callbacks.InterpreterFallback = &InterpreterFallback;
47 user_callbacks.user_arg = static_cast<void*>(interpeter_state.get()); 80 //user_callbacks.user_arg = static_cast<void*>(interpeter_state.get());
48 user_callbacks.CallSVC = &SVC::CallSVC; 81 user_callbacks.CallSVC = &SVC::CallSVC;
49 user_callbacks.memory.IsReadOnlyMemory = &IsReadOnlyMemory; 82 user_callbacks.memory.IsReadOnlyMemory = &IsReadOnlyMemory;
50 user_callbacks.memory.ReadCode = &Memory::Read32; 83 user_callbacks.memory.ReadCode = &MemoryRead32;
51 user_callbacks.memory.Read8 = &Memory::Read8; 84 user_callbacks.memory.Read8 = &MemoryRead8;
52 user_callbacks.memory.Read16 = &Memory::Read16; 85 user_callbacks.memory.Read16 = &MemoryRead16;
53 user_callbacks.memory.Read32 = &Memory::Read32; 86 user_callbacks.memory.Read32 = &MemoryRead32;
54 user_callbacks.memory.Read64 = &Memory::Read64; 87 user_callbacks.memory.Read64 = &MemoryRead64;
55 user_callbacks.memory.Write8 = &Memory::Write8; 88 user_callbacks.memory.Write8 = &MemoryWrite8;
56 user_callbacks.memory.Write16 = &Memory::Write16; 89 user_callbacks.memory.Write16 = &MemoryWrite16;
57 user_callbacks.memory.Write32 = &Memory::Write32; 90 user_callbacks.memory.Write32 = &MemoryWrite32;
58 user_callbacks.memory.Write64 = &Memory::Write64; 91 user_callbacks.memory.Write64 = &MemoryWrite64;
59 user_callbacks.page_table = Memory::GetCurrentPageTablePointers(); 92 //user_callbacks.page_table = Memory::GetCurrentPageTablePointers();
60 user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state); 93 user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state);
61 return user_callbacks; 94 return user_callbacks;
62} 95}
63 96
64ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) { 97ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) {
65 interpreter_state = std::make_shared<ARMul_State>(initial_mode); 98 interpreter_state = std::make_shared<ARMul_State>(initial_mode);
66 jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state)); 99 jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state), Dynarmic::Arch::ARM64);
67} 100}
68 101
69void ARM_Dynarmic::SetPC(u32 pc) { 102void ARM_Dynarmic::SetPC(u64 pc) {
70 jit->Regs()[15] = pc; 103 jit->Regs64()[32] = pc;
71} 104}
72 105
73u32 ARM_Dynarmic::GetPC() const { 106u64 ARM_Dynarmic::GetPC() const {
74 return jit->Regs()[15]; 107 return jit->Regs64()[32];
75} 108}
76 109
77u32 ARM_Dynarmic::GetReg(int index) const { 110u64 ARM_Dynarmic::GetReg(int index) const {
78 return jit->Regs()[index]; 111 return jit->Regs64()[index];
79} 112}
80 113
81void ARM_Dynarmic::SetReg(int index, u32 value) { 114void ARM_Dynarmic::SetReg(int index, u64 value) {
82 jit->Regs()[index] = value; 115 jit->Regs64()[index] = value;
83} 116}
84 117
85u32 ARM_Dynarmic::GetVFPReg(int index) const { 118u32 ARM_Dynarmic::GetVFPReg(int index) const {
@@ -136,18 +169,18 @@ MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
136void ARM_Dynarmic::ExecuteInstructions(int num_instructions) { 169void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
137 MICROPROFILE_SCOPE(ARM_Jit); 170 MICROPROFILE_SCOPE(ARM_Jit);
138 171
139 unsigned ticks_executed = jit->Run(static_cast<unsigned>(num_instructions)); 172 unsigned ticks_executed = jit->Run(1 /*static_cast<unsigned>(num_instructions)*/);
140 173
141 AddTicks(ticks_executed); 174 AddTicks(ticks_executed);
142} 175}
143 176
144void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { 177void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
145 memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers)); 178 memcpy(ctx.cpu_registers, jit->Regs64().data(), sizeof(ctx.cpu_registers));
146 memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers)); 179 //memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
147 180
148 ctx.sp = jit->Regs()[13]; 181 ctx.lr = jit->Regs64()[30];
149 ctx.lr = jit->Regs()[14]; 182 ctx.sp = jit->Regs64()[31];
150 ctx.pc = jit->Regs()[15]; 183 ctx.pc = jit->Regs64()[32];
151 ctx.cpsr = jit->Cpsr(); 184 ctx.cpsr = jit->Cpsr();
152 185
153 ctx.fpscr = jit->Fpscr(); 186 ctx.fpscr = jit->Fpscr();
@@ -155,12 +188,12 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
155} 188}
156 189
157void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { 190void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
158 memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); 191 memcpy(jit->Regs64().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
159 memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); 192 //memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
160 193
161 jit->Regs()[13] = ctx.sp; 194 jit->Regs64()[30] = ctx.lr;
162 jit->Regs()[14] = ctx.lr; 195 jit->Regs64()[31] = ctx.sp;
163 jit->Regs()[15] = ctx.pc; 196 jit->Regs64()[32] = ctx.pc;
164 jit->Cpsr() = ctx.cpsr; 197 jit->Cpsr() = ctx.cpsr;
165 198
166 jit->SetFpscr(ctx.fpscr); 199 jit->SetFpscr(ctx.fpscr);
diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h
index 834dc989e..f77548d0f 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.h
+++ b/src/core/arm/dynarmic/arm_dynarmic.h
@@ -14,10 +14,10 @@ class ARM_Dynarmic final : public ARM_Interface {
14public: 14public:
15 ARM_Dynarmic(PrivilegeMode initial_mode); 15 ARM_Dynarmic(PrivilegeMode initial_mode);
16 16
17 void SetPC(u32 pc) override; 17 void SetPC(u64 pc) override;
18 u32 GetPC() const override; 18 u64 GetPC() const override;
19 u32 GetReg(int index) const override; 19 u64 GetReg(int index) const override;
20 void SetReg(int index, u32 value) override; 20 void SetReg(int index, u64 value) override;
21 u32 GetVFPReg(int index) const override; 21 u32 GetVFPReg(int index) const override;
22 void SetVFPReg(int index, u32 value) override; 22 void SetVFPReg(int index, u32 value) override;
23 u32 GetVFPSystemReg(VFPSystemRegister reg) const override; 23 u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 81f9bf99e..1c55496b5 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -25,19 +25,19 @@ void ARM_DynCom::ClearInstructionCache() {
25 trans_cache_buf_top = 0; 25 trans_cache_buf_top = 0;
26} 26}
27 27
28void ARM_DynCom::SetPC(u32 pc) { 28void ARM_DynCom::SetPC(u64 pc) {
29 state->Reg[15] = pc; 29 state->Reg[15] = pc;
30} 30}
31 31
32u32 ARM_DynCom::GetPC() const { 32u64 ARM_DynCom::GetPC() const {
33 return state->Reg[15]; 33 return state->Reg[15];
34} 34}
35 35
36u32 ARM_DynCom::GetReg(int index) const { 36u64 ARM_DynCom::GetReg(int index) const {
37 return state->Reg[index]; 37 return state->Reg[index];
38} 38}
39 39
40void ARM_DynCom::SetReg(int index, u32 value) { 40void ARM_DynCom::SetReg(int index, u64 value) {
41 state->Reg[index] = value; 41 state->Reg[index] = value;
42} 42}
43 43
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h
index 62c174f3c..90cc56c41 100644
--- a/src/core/arm/dyncom/arm_dyncom.h
+++ b/src/core/arm/dyncom/arm_dyncom.h
@@ -17,10 +17,10 @@ public:
17 17
18 void ClearInstructionCache() override; 18 void ClearInstructionCache() override;
19 19
20 void SetPC(u32 pc) override; 20 void SetPC(u64 pc) override;
21 u32 GetPC() const override; 21 u64 GetPC() const override;
22 u32 GetReg(int index) const override; 22 u64 GetReg(int index) const override;
23 void SetReg(int index, u32 value) override; 23 void SetReg(int index, u64 value) override;
24 u32 GetVFPReg(int index) const override; 24 u32 GetVFPReg(int index) const override;
25 void SetVFPReg(int index, u32 value) override; 25 void SetVFPReg(int index, u32 value) override;
26 u32 GetVFPSystemReg(VFPSystemRegister reg) const override; 26 u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
diff --git a/src/core/gdbstub/gdbstub.h b/src/core/gdbstub/gdbstub.h
index 38177e32c..8f12c6a1d 100644
--- a/src/core/gdbstub/gdbstub.h
+++ b/src/core/gdbstub/gdbstub.h
@@ -69,7 +69,7 @@ void HandlePacket();
69 * @param addr Address to search from. 69 * @param addr Address to search from.
70 * @param type Type of breakpoint. 70 * @param type Type of breakpoint.
71 */ 71 */
72BreakpointAddress GetNextBreakpointFromAddress(u32 addr, GDBStub::BreakpointType type); 72BreakpointAddress GetNextBreakpointFromAddress(PAddr addr, GDBStub::BreakpointType type);
73 73
74/** 74/**
75 * Check if a breakpoint of the specified type exists at the given address. 75 * Check if a breakpoint of the specified type exists at the given address.
@@ -77,7 +77,7 @@ BreakpointAddress GetNextBreakpointFromAddress(u32 addr, GDBStub::BreakpointType
77 * @param addr Address of breakpoint. 77 * @param addr Address of breakpoint.
78 * @param type Type of breakpoint. 78 * @param type Type of breakpoint.
79 */ 79 */
80bool CheckBreakpoint(u32 addr, GDBStub::BreakpointType type); 80bool CheckBreakpoint(PAddr addr, GDBStub::BreakpointType type);
81 81
82// If set to true, the CPU will halt at the beginning of the next CPU loop. 82// If set to true, the CPU will halt at the beginning of the next CPU loop.
83bool GetCpuHaltFlag(); 83bool GetCpuHaltFlag();
diff --git a/src/core/hle/function_wrappers.h b/src/core/hle/function_wrappers.h
index 5e6002f4e..bc81c06b4 100644
--- a/src/core/hle/function_wrappers.h
+++ b/src/core/hle/function_wrappers.h
@@ -20,7 +20,7 @@ namespace HLE {
20 * HLE a function return from the current ARM11 userland process 20 * HLE a function return from the current ARM11 userland process
21 * @param res Result to return 21 * @param res Result to return
22 */ 22 */
23static inline void FuncReturn(u32 res) { 23static inline void FuncReturn(u64 res) {
24 Core::CPU().SetReg(0, res); 24 Core::CPU().SetReg(0, res);
25} 25}
26 26
diff --git a/src/core/hle/service/ldr_ro/cro_helper.cpp b/src/core/hle/service/ldr_ro/cro_helper.cpp
index f78545f37..6128f8a6c 100644
--- a/src/core/hle/service/ldr_ro/cro_helper.cpp
+++ b/src/core/hle/service/ldr_ro/cro_helper.cpp
@@ -274,7 +274,7 @@ ResultVal<VAddr> CROHelper::RebaseSegmentTable(u32 cro_size, VAddr data_segment_
274 } 274 }
275 SetEntry(i, segment); 275 SetEntry(i, segment);
276 } 276 }
277 return MakeResult<u32>(prev_data_segment + module_address); 277 return MakeResult<VAddr>(prev_data_segment + module_address);
278} 278}
279 279
280ResultCode CROHelper::RebaseExportNamedSymbolTable() { 280ResultCode CROHelper::RebaseExportNamedSymbolTable() {