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-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp2650
-rw-r--r--src/core/arm/dyncom/arm_dyncom_trans.inc2188
-rw-r--r--src/core/arm/dyncom/arm_dyncom_trans_struct.inc462
3 files changed, 2652 insertions, 2648 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index cfc67287f..b45a6cd64 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -668,462 +668,7 @@ static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, u
668 virt_addr = addr; 668 virt_addr = addr;
669} 669}
670 670
671struct arm_inst { 671#include "arm_dyncom_trans_struct.inc"
672 unsigned int idx;
673 unsigned int cond;
674 int br;
675 char component[0];
676};
677
678struct generic_arm_inst {
679 u32 Ra;
680 u32 Rm;
681 u32 Rn;
682 u32 Rd;
683 u8 op1;
684 u8 op2;
685};
686
687struct adc_inst {
688 unsigned int I;
689 unsigned int S;
690 unsigned int Rn;
691 unsigned int Rd;
692 unsigned int shifter_operand;
693 shtop_fp_t shtop_func;
694};
695
696struct add_inst {
697 unsigned int I;
698 unsigned int S;
699 unsigned int Rn;
700 unsigned int Rd;
701 unsigned int shifter_operand;
702 shtop_fp_t shtop_func;
703};
704
705struct orr_inst {
706 unsigned int I;
707 unsigned int S;
708 unsigned int Rn;
709 unsigned int Rd;
710 unsigned int shifter_operand;
711 shtop_fp_t shtop_func;
712};
713
714struct and_inst {
715 unsigned int I;
716 unsigned int S;
717 unsigned int Rn;
718 unsigned int Rd;
719 unsigned int shifter_operand;
720 shtop_fp_t shtop_func;
721};
722
723struct eor_inst {
724 unsigned int I;
725 unsigned int S;
726 unsigned int Rn;
727 unsigned int Rd;
728 unsigned int shifter_operand;
729 shtop_fp_t shtop_func;
730};
731
732struct bbl_inst {
733 unsigned int L;
734 int signed_immed_24;
735 unsigned int next_addr;
736 unsigned int jmp_addr;
737};
738
739struct bx_inst {
740 unsigned int Rm;
741};
742
743struct blx_inst {
744 union {
745 s32 signed_immed_24;
746 u32 Rm;
747 } val;
748 unsigned int inst;
749};
750
751struct clz_inst {
752 unsigned int Rm;
753 unsigned int Rd;
754};
755
756struct cps_inst {
757 unsigned int imod0;
758 unsigned int imod1;
759 unsigned int mmod;
760 unsigned int A, I, F;
761 unsigned int mode;
762};
763
764struct clrex_inst {
765};
766
767struct cpy_inst {
768 unsigned int Rm;
769 unsigned int Rd;
770};
771
772struct bic_inst {
773 unsigned int I;
774 unsigned int S;
775 unsigned int Rn;
776 unsigned int Rd;
777 unsigned int shifter_operand;
778 shtop_fp_t shtop_func;
779};
780
781struct sub_inst {
782 unsigned int I;
783 unsigned int S;
784 unsigned int Rn;
785 unsigned int Rd;
786 unsigned int shifter_operand;
787 shtop_fp_t shtop_func;
788};
789
790struct tst_inst {
791 unsigned int I;
792 unsigned int S;
793 unsigned int Rn;
794 unsigned int Rd;
795 unsigned int shifter_operand;
796 shtop_fp_t shtop_func;
797};
798
799struct cmn_inst {
800 unsigned int I;
801 unsigned int Rn;
802 unsigned int shifter_operand;
803 shtop_fp_t shtop_func;
804};
805
806struct teq_inst {
807 unsigned int I;
808 unsigned int Rn;
809 unsigned int shifter_operand;
810 shtop_fp_t shtop_func;
811};
812
813struct stm_inst {
814 unsigned int inst;
815};
816
817struct bkpt_inst {
818 u32 imm;
819};
820
821struct stc_inst {
822};
823
824struct ldc_inst {
825};
826
827struct swi_inst {
828 unsigned int num;
829};
830
831struct cmp_inst {
832 unsigned int I;
833 unsigned int Rn;
834 unsigned int shifter_operand;
835 shtop_fp_t shtop_func;
836};
837
838struct mov_inst {
839 unsigned int I;
840 unsigned int S;
841 unsigned int Rd;
842 unsigned int shifter_operand;
843 shtop_fp_t shtop_func;
844};
845
846struct mvn_inst {
847 unsigned int I;
848 unsigned int S;
849 unsigned int Rd;
850 unsigned int shifter_operand;
851 shtop_fp_t shtop_func;
852};
853
854struct rev_inst {
855 unsigned int Rd;
856 unsigned int Rm;
857 unsigned int op1;
858 unsigned int op2;
859};
860
861struct rsb_inst {
862 unsigned int I;
863 unsigned int S;
864 unsigned int Rn;
865 unsigned int Rd;
866 unsigned int shifter_operand;
867 shtop_fp_t shtop_func;
868};
869
870struct rsc_inst {
871 unsigned int I;
872 unsigned int S;
873 unsigned int Rn;
874 unsigned int Rd;
875 unsigned int shifter_operand;
876 shtop_fp_t shtop_func;
877};
878
879struct sbc_inst {
880 unsigned int I;
881 unsigned int S;
882 unsigned int Rn;
883 unsigned int Rd;
884 unsigned int shifter_operand;
885 shtop_fp_t shtop_func;
886};
887
888struct mul_inst {
889 unsigned int S;
890 unsigned int Rd;
891 unsigned int Rs;
892 unsigned int Rm;
893};
894
895struct smul_inst {
896 unsigned int Rd;
897 unsigned int Rs;
898 unsigned int Rm;
899 unsigned int x;
900 unsigned int y;
901};
902
903struct umull_inst {
904 unsigned int S;
905 unsigned int RdHi;
906 unsigned int RdLo;
907 unsigned int Rs;
908 unsigned int Rm;
909};
910
911struct smlad_inst {
912 unsigned int m;
913 unsigned int Rm;
914 unsigned int Rd;
915 unsigned int Ra;
916 unsigned int Rn;
917 unsigned int op1;
918 unsigned int op2;
919};
920
921struct smla_inst {
922 unsigned int x;
923 unsigned int y;
924 unsigned int Rm;
925 unsigned int Rd;
926 unsigned int Rs;
927 unsigned int Rn;
928};
929
930struct smlalxy_inst {
931 unsigned int x;
932 unsigned int y;
933 unsigned int RdLo;
934 unsigned int RdHi;
935 unsigned int Rm;
936 unsigned int Rn;
937};
938
939struct ssat_inst {
940 unsigned int Rn;
941 unsigned int Rd;
942 unsigned int imm5;
943 unsigned int sat_imm;
944 unsigned int shift_type;
945};
946
947struct umaal_inst {
948 unsigned int Rn;
949 unsigned int Rm;
950 unsigned int RdHi;
951 unsigned int RdLo;
952};
953
954struct umlal_inst {
955 unsigned int S;
956 unsigned int Rm;
957 unsigned int Rs;
958 unsigned int RdHi;
959 unsigned int RdLo;
960};
961
962struct smlal_inst {
963 unsigned int S;
964 unsigned int Rm;
965 unsigned int Rs;
966 unsigned int RdHi;
967 unsigned int RdLo;
968};
969
970struct smlald_inst {
971 unsigned int RdLo;
972 unsigned int RdHi;
973 unsigned int Rm;
974 unsigned int Rn;
975 unsigned int swap;
976 unsigned int op1;
977 unsigned int op2;
978};
979
980struct mla_inst {
981 unsigned int S;
982 unsigned int Rn;
983 unsigned int Rd;
984 unsigned int Rs;
985 unsigned int Rm;
986};
987
988struct mrc_inst {
989 unsigned int opcode_1;
990 unsigned int opcode_2;
991 unsigned int cp_num;
992 unsigned int crn;
993 unsigned int crm;
994 unsigned int Rd;
995 unsigned int inst;
996};
997
998struct mcr_inst {
999 unsigned int opcode_1;
1000 unsigned int opcode_2;
1001 unsigned int cp_num;
1002 unsigned int crn;
1003 unsigned int crm;
1004 unsigned int Rd;
1005 unsigned int inst;
1006};
1007
1008struct mcrr_inst {
1009 unsigned int opcode_1;
1010 unsigned int cp_num;
1011 unsigned int crm;
1012 unsigned int rt;
1013 unsigned int rt2;
1014};
1015
1016struct mrs_inst {
1017 unsigned int R;
1018 unsigned int Rd;
1019};
1020
1021struct msr_inst {
1022 unsigned int field_mask;
1023 unsigned int R;
1024 unsigned int inst;
1025};
1026
1027struct pld_inst {
1028};
1029
1030struct sxtb_inst {
1031 unsigned int Rd;
1032 unsigned int Rm;
1033 unsigned int rotate;
1034};
1035
1036struct sxtab_inst {
1037 unsigned int Rd;
1038 unsigned int Rn;
1039 unsigned int Rm;
1040 unsigned rotate;
1041};
1042
1043struct sxtah_inst {
1044 unsigned int Rd;
1045 unsigned int Rn;
1046 unsigned int Rm;
1047 unsigned int rotate;
1048};
1049
1050struct sxth_inst {
1051 unsigned int Rd;
1052 unsigned int Rm;
1053 unsigned int rotate;
1054};
1055
1056struct uxtab_inst {
1057 unsigned int Rn;
1058 unsigned int Rd;
1059 unsigned int rotate;
1060 unsigned int Rm;
1061};
1062
1063struct uxtah_inst {
1064 unsigned int Rn;
1065 unsigned int Rd;
1066 unsigned int rotate;
1067 unsigned int Rm;
1068};
1069
1070struct uxth_inst {
1071 unsigned int Rd;
1072 unsigned int Rm;
1073 unsigned int rotate;
1074};
1075
1076struct cdp_inst {
1077 unsigned int opcode_1;
1078 unsigned int CRn;
1079 unsigned int CRd;
1080 unsigned int cp_num;
1081 unsigned int opcode_2;
1082 unsigned int CRm;
1083 unsigned int inst;
1084};
1085
1086struct uxtb_inst {
1087 unsigned int Rd;
1088 unsigned int Rm;
1089 unsigned int rotate;
1090};
1091
1092struct swp_inst {
1093 unsigned int Rn;
1094 unsigned int Rd;
1095 unsigned int Rm;
1096};
1097
1098struct setend_inst {
1099 unsigned int set_bigend;
1100};
1101
1102struct b_2_thumb {
1103 unsigned int imm;
1104};
1105struct b_cond_thumb {
1106 unsigned int imm;
1107 unsigned int cond;
1108};
1109
1110struct bl_1_thumb {
1111 unsigned int imm;
1112};
1113struct bl_2_thumb {
1114 unsigned int imm;
1115};
1116struct blx_1_thumb {
1117 unsigned int imm;
1118 unsigned int instr;
1119};
1120
1121struct pkh_inst {
1122 unsigned int Rm;
1123 unsigned int Rn;
1124 unsigned int Rd;
1125 unsigned char imm;
1126};
1127 672
1128typedef arm_inst * ARM_INST_PTR; 673typedef arm_inst * ARM_INST_PTR;
1129 674
@@ -1208,2200 +753,9 @@ static get_addr_fp_t get_calc_addr_op(unsigned int inst) {
1208 return nullptr; 753 return nullptr;
1209} 754}
1210 755
1211#define INTERPRETER_TRANSLATE(s) glue(InterpreterTranslate_, s)
1212
1213static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index)
1214{
1215 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(adc_inst));
1216 adc_inst *inst_cream = (adc_inst *)inst_base->component;
1217
1218 inst_base->cond = BITS(inst, 28, 31);
1219 inst_base->idx = index;
1220 inst_base->br = NON_BRANCH;
1221
1222 inst_cream->I = BIT(inst, 25);
1223 inst_cream->S = BIT(inst, 20);
1224 inst_cream->Rn = BITS(inst, 16, 19);
1225 inst_cream->Rd = BITS(inst, 12, 15);
1226 inst_cream->shifter_operand = BITS(inst, 0, 11);
1227 inst_cream->shtop_func = get_shtop(inst);
1228
1229 if (inst_cream->Rd == 15)
1230 inst_base->br = INDIRECT_BRANCH;
1231
1232 return inst_base;
1233}
1234static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index)
1235{
1236 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(add_inst));
1237 add_inst *inst_cream = (add_inst *)inst_base->component;
1238
1239 inst_base->cond = BITS(inst, 28, 31);
1240 inst_base->idx = index;
1241 inst_base->br = NON_BRANCH;
1242
1243 inst_cream->I = BIT(inst, 25);
1244 inst_cream->S = BIT(inst, 20);
1245 inst_cream->Rn = BITS(inst, 16, 19);
1246 inst_cream->Rd = BITS(inst, 12, 15);
1247 inst_cream->shifter_operand = BITS(inst, 0, 11);
1248 inst_cream->shtop_func = get_shtop(inst);
1249
1250 if (inst_cream->Rd == 15)
1251 inst_base->br = INDIRECT_BRANCH;
1252
1253 return inst_base;
1254}
1255static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index)
1256{
1257 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(and_inst));
1258 and_inst *inst_cream = (and_inst *)inst_base->component;
1259
1260 inst_base->cond = BITS(inst, 28, 31);
1261 inst_base->idx = index;
1262 inst_base->br = NON_BRANCH;
1263
1264 inst_cream->I = BIT(inst, 25);
1265 inst_cream->S = BIT(inst, 20);
1266 inst_cream->Rn = BITS(inst, 16, 19);
1267 inst_cream->Rd = BITS(inst, 12, 15);
1268 inst_cream->shifter_operand = BITS(inst, 0, 11);
1269 inst_cream->shtop_func = get_shtop(inst);
1270
1271 if (inst_cream->Rd == 15)
1272 inst_base->br = INDIRECT_BRANCH;
1273
1274 return inst_base;
1275}
1276static ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index)
1277{
1278 #define POSBRANCH ((inst & 0x7fffff) << 2)
1279 #define NEGBRANCH ((0xff000000 |(inst & 0xffffff)) << 2)
1280
1281 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bbl_inst));
1282 bbl_inst *inst_cream = (bbl_inst *)inst_base->component;
1283
1284 inst_base->cond = BITS(inst, 28, 31);
1285 inst_base->idx = index;
1286 inst_base->br = DIRECT_BRANCH;
1287
1288 if (BIT(inst, 24))
1289 inst_base->br = CALL;
1290 if (BITS(inst, 28, 31) <= 0xe)
1291 inst_base->br |= COND;
1292
1293 inst_cream->L = BIT(inst, 24);
1294 inst_cream->signed_immed_24 = BIT(inst, 23) ? NEGBRANCH : POSBRANCH;
1295
1296 return inst_base;
1297}
1298static ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index)
1299{
1300 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bic_inst));
1301 bic_inst *inst_cream = (bic_inst *)inst_base->component;
1302
1303 inst_base->cond = BITS(inst, 28, 31);
1304 inst_base->idx = index;
1305 inst_base->br = NON_BRANCH;
1306
1307 inst_cream->I = BIT(inst, 25);
1308 inst_cream->S = BIT(inst, 20);
1309 inst_cream->Rn = BITS(inst, 16, 19);
1310 inst_cream->Rd = BITS(inst, 12, 15);
1311 inst_cream->shifter_operand = BITS(inst, 0, 11);
1312 inst_cream->shtop_func = get_shtop(inst);
1313
1314 if (inst_cream->Rd == 15)
1315 inst_base->br = INDIRECT_BRANCH;
1316 return inst_base;
1317}
1318
1319static ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index)
1320{
1321 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(bkpt_inst));
1322 bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component;
1323
1324 inst_base->cond = BITS(inst, 28, 31);
1325 inst_base->idx = index;
1326 inst_base->br = NON_BRANCH;
1327
1328 inst_cream->imm = (BITS(inst, 8, 19) << 4) | BITS(inst, 0, 3);
1329
1330 return inst_base;
1331}
1332
1333static ARM_INST_PTR INTERPRETER_TRANSLATE(blx)(unsigned int inst, int index)
1334{
1335 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_inst));
1336 blx_inst *inst_cream = (blx_inst *)inst_base->component;
1337
1338 inst_base->cond = BITS(inst, 28, 31);
1339 inst_base->idx = index;
1340 inst_base->br = INDIRECT_BRANCH;
1341
1342 inst_cream->inst = inst;
1343 if (BITS(inst, 20, 27) == 0x12 && BITS(inst, 4, 7) == 0x3) {
1344 inst_cream->val.Rm = BITS(inst, 0, 3);
1345 } else {
1346 inst_cream->val.signed_immed_24 = BITS(inst, 0, 23);
1347 }
1348
1349 return inst_base;
1350}
1351static ARM_INST_PTR INTERPRETER_TRANSLATE(bx)(unsigned int inst, int index)
1352{
1353 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bx_inst));
1354 bx_inst *inst_cream = (bx_inst *)inst_base->component;
1355
1356 inst_base->cond = BITS(inst, 28, 31);
1357 inst_base->idx = index;
1358 inst_base->br = INDIRECT_BRANCH;
1359
1360 inst_cream->Rm = BITS(inst, 0, 3);
1361
1362 return inst_base;
1363}
1364static ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index)
1365{
1366 return INTERPRETER_TRANSLATE(bx)(inst, index);
1367}
1368
1369static ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index) {
1370 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst));
1371 cdp_inst *inst_cream = (cdp_inst *)inst_base->component;
1372
1373 inst_base->cond = BITS(inst, 28, 31);
1374 inst_base->idx = index;
1375 inst_base->br = NON_BRANCH;
1376
1377 inst_cream->CRm = BITS(inst, 0, 3);
1378 inst_cream->CRd = BITS(inst, 12, 15);
1379 inst_cream->CRn = BITS(inst, 16, 19);
1380 inst_cream->cp_num = BITS(inst, 8, 11);
1381 inst_cream->opcode_2 = BITS(inst, 5, 7);
1382 inst_cream->opcode_1 = BITS(inst, 20, 23);
1383 inst_cream->inst = inst;
1384
1385 LOG_TRACE(Core_ARM11, "inst %x index %x", inst, index);
1386 return inst_base;
1387}
1388static ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index)
1389{
1390 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clrex_inst));
1391 inst_base->cond = BITS(inst, 28, 31);
1392 inst_base->idx = index;
1393 inst_base->br = NON_BRANCH;
1394
1395 return inst_base;
1396}
1397static ARM_INST_PTR INTERPRETER_TRANSLATE(clz)(unsigned int inst, int index)
1398{
1399 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clz_inst));
1400 clz_inst *inst_cream = (clz_inst *)inst_base->component;
1401
1402 inst_base->cond = BITS(inst, 28, 31);
1403 inst_base->idx = index;
1404 inst_base->br = NON_BRANCH;
1405
1406 inst_cream->Rm = BITS(inst, 0, 3);
1407 inst_cream->Rd = BITS(inst, 12, 15);
1408
1409 return inst_base;
1410}
1411static ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index)
1412{
1413 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmn_inst));
1414 cmn_inst *inst_cream = (cmn_inst *)inst_base->component;
1415
1416 inst_base->cond = BITS(inst, 28, 31);
1417 inst_base->idx = index;
1418 inst_base->br = NON_BRANCH;
1419
1420 inst_cream->I = BIT(inst, 25);
1421 inst_cream->Rn = BITS(inst, 16, 19);
1422 inst_cream->shifter_operand = BITS(inst, 0, 11);
1423 inst_cream->shtop_func = get_shtop(inst);
1424
1425 return inst_base;
1426}
1427static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index)
1428{
1429 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmp_inst));
1430 cmp_inst *inst_cream = (cmp_inst *)inst_base->component;
1431
1432 inst_base->cond = BITS(inst, 28, 31);
1433 inst_base->idx = index;
1434 inst_base->br = NON_BRANCH;
1435
1436 inst_cream->I = BIT(inst, 25);
1437 inst_cream->Rn = BITS(inst, 16, 19);
1438 inst_cream->shifter_operand = BITS(inst, 0, 11);
1439 inst_cream->shtop_func = get_shtop(inst);
1440
1441 return inst_base;
1442}
1443static ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index)
1444{
1445 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cps_inst));
1446 cps_inst *inst_cream = (cps_inst *)inst_base->component;
1447
1448 inst_base->cond = BITS(inst, 28, 31);
1449 inst_base->idx = index;
1450 inst_base->br = NON_BRANCH;
1451
1452 inst_cream->imod0 = BIT(inst, 18);
1453 inst_cream->imod1 = BIT(inst, 19);
1454 inst_cream->mmod = BIT(inst, 17);
1455 inst_cream->A = BIT(inst, 8);
1456 inst_cream->I = BIT(inst, 7);
1457 inst_cream->F = BIT(inst, 6);
1458 inst_cream->mode = BITS(inst, 0, 4);
1459
1460 return inst_base;
1461}
1462static ARM_INST_PTR INTERPRETER_TRANSLATE(cpy)(unsigned int inst, int index)
1463{
1464 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst));
1465 mov_inst *inst_cream = (mov_inst *)inst_base->component;
1466
1467 inst_base->cond = BITS(inst, 28, 31);
1468 inst_base->idx = index;
1469 inst_base->br = NON_BRANCH;
1470
1471 inst_cream->I = BIT(inst, 25);
1472 inst_cream->S = BIT(inst, 20);
1473 inst_cream->Rd = BITS(inst, 12, 15);
1474 inst_cream->shifter_operand = BITS(inst, 0, 11);
1475 inst_cream->shtop_func = get_shtop(inst);
1476
1477 if (inst_cream->Rd == 15) {
1478 inst_base->br = INDIRECT_BRANCH;
1479 }
1480 return inst_base;
1481}
1482static ARM_INST_PTR INTERPRETER_TRANSLATE(eor)(unsigned int inst, int index)
1483{
1484 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(eor_inst));
1485 eor_inst *inst_cream = (eor_inst *)inst_base->component;
1486
1487 inst_base->cond = BITS(inst, 28, 31);
1488 inst_base->idx = index;
1489 inst_base->br = NON_BRANCH;
1490
1491 inst_cream->I = BIT(inst, 25);
1492 inst_cream->S = BIT(inst, 20);
1493 inst_cream->Rn = BITS(inst, 16, 19);
1494 inst_cream->Rd = BITS(inst, 12, 15);
1495 inst_cream->shifter_operand = BITS(inst, 0, 11);
1496 inst_cream->shtop_func = get_shtop(inst);
1497
1498 if (inst_cream->Rd == 15)
1499 inst_base->br = INDIRECT_BRANCH;
1500
1501 return inst_base;
1502}
1503static ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index)
1504{
1505 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldc_inst));
1506 inst_base->cond = BITS(inst, 28, 31);
1507 inst_base->idx = index;
1508 inst_base->br = NON_BRANCH;
1509
1510 return inst_base;
1511}
1512static ARM_INST_PTR INTERPRETER_TRANSLATE(ldm)(unsigned int inst, int index)
1513{
1514 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1515 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1516
1517 inst_base->cond = BITS(inst, 28, 31);
1518 inst_base->idx = index;
1519 inst_base->br = NON_BRANCH;
1520
1521 inst_cream->inst = inst;
1522 inst_cream->get_addr = get_calc_addr_op(inst);
1523
1524 if (BIT(inst, 15)) {
1525 inst_base->br = INDIRECT_BRANCH;
1526 }
1527 return inst_base;
1528}
1529static ARM_INST_PTR INTERPRETER_TRANSLATE(sxth)(unsigned int inst, int index)
1530{
1531 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst));
1532 sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component;
1533
1534 inst_base->cond = BITS(inst, 28, 31);
1535 inst_base->idx = index;
1536 inst_base->br = NON_BRANCH;
1537
1538 inst_cream->Rd = BITS(inst, 12, 15);
1539 inst_cream->Rm = BITS(inst, 0, 3);
1540 inst_cream->rotate = BITS(inst, 10, 11);
1541
1542 return inst_base;
1543}
1544static ARM_INST_PTR INTERPRETER_TRANSLATE(ldr)(unsigned int inst, int index)
1545{
1546 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1547 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1548
1549 inst_base->cond = BITS(inst, 28, 31);
1550 inst_base->idx = index;
1551 inst_base->br = NON_BRANCH;
1552
1553 inst_cream->inst = inst;
1554 inst_cream->get_addr = get_calc_addr_op(inst);
1555
1556 if (BITS(inst, 12, 15) == 15)
1557 inst_base->br = INDIRECT_BRANCH;
1558
1559 return inst_base;
1560}
1561
1562static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrcond)(unsigned int inst, int index)
1563{
1564 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1565 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1566
1567 inst_base->cond = BITS(inst, 28, 31);
1568 inst_base->idx = index;
1569 inst_base->br = NON_BRANCH;
1570
1571 inst_cream->inst = inst;
1572 inst_cream->get_addr = get_calc_addr_op(inst);
1573
1574 if (BITS(inst, 12, 15) == 15)
1575 inst_base->br = INDIRECT_BRANCH;
1576
1577 return inst_base;
1578}
1579
1580static ARM_INST_PTR INTERPRETER_TRANSLATE(uxth)(unsigned int inst, int index)
1581{
1582 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst));
1583 uxth_inst *inst_cream = (uxth_inst *)inst_base->component;
1584
1585 inst_base->cond = BITS(inst, 28, 31);
1586 inst_base->idx = index;
1587 inst_base->br = NON_BRANCH;
1588
1589 inst_cream->Rd = BITS(inst, 12, 15);
1590 inst_cream->rotate = BITS(inst, 10, 11);
1591 inst_cream->Rm = BITS(inst, 0, 3);
1592
1593 return inst_base;
1594}
1595static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtah)(unsigned int inst, int index)
1596{
1597 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtah_inst));
1598 uxtah_inst *inst_cream = (uxtah_inst *)inst_base->component;
1599
1600 inst_base->cond = BITS(inst, 28, 31);
1601 inst_base->idx = index;
1602 inst_base->br = NON_BRANCH;
1603
1604 inst_cream->Rn = BITS(inst, 16, 19);
1605 inst_cream->Rd = BITS(inst, 12, 15);
1606 inst_cream->rotate = BITS(inst, 10, 11);
1607 inst_cream->Rm = BITS(inst, 0, 3);
1608
1609 return inst_base;
1610}
1611static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrb)(unsigned int inst, int index)
1612{
1613 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1614 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1615
1616 inst_base->cond = BITS(inst, 28, 31);
1617 inst_base->idx = index;
1618 inst_base->br = NON_BRANCH;
1619
1620 inst_cream->inst = inst;
1621 inst_cream->get_addr = get_calc_addr_op(inst);
1622
1623 return inst_base;
1624}
1625static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index)
1626{
1627 arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1628 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
1629
1630 inst_base->cond = BITS(inst, 28, 31);
1631 inst_base->idx = index;
1632 inst_base->br = NON_BRANCH;
1633
1634 inst_cream->inst = inst;
1635 if (BITS(inst, 25, 27) == 2) {
1636 inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
1637 } else if (BITS(inst, 25, 27) == 3) {
1638 inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
1639 } else {
1640 DEBUG_MSG;
1641 }
1642
1643 return inst_base;
1644}
1645static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrd)(unsigned int inst, int index)
1646{
1647 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1648 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1649
1650 inst_base->cond = BITS(inst, 28, 31);
1651 inst_base->idx = index;
1652 inst_base->br = NON_BRANCH;
1653
1654 inst_cream->inst = inst;
1655 inst_cream->get_addr = get_calc_addr_op(inst);
1656
1657 return inst_base;
1658}
1659static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrex)(unsigned int inst, int index)
1660{
1661 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
1662 generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component;
1663
1664 inst_base->cond = BITS(inst, 28, 31);
1665 inst_base->idx = index;
1666 inst_base->br = (BITS(inst, 12, 15) == 15) ? INDIRECT_BRANCH : NON_BRANCH; // Branch if dest is R15
1667
1668 inst_cream->Rn = BITS(inst, 16, 19);
1669 inst_cream->Rd = BITS(inst, 12, 15);
1670
1671 return inst_base;
1672}
1673static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexb)(unsigned int inst, int index)
1674{
1675 return INTERPRETER_TRANSLATE(ldrex)(inst, index);
1676}
1677static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexh)(unsigned int inst, int index)
1678{
1679 return INTERPRETER_TRANSLATE(ldrex)(inst, index);
1680}
1681static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexd)(unsigned int inst, int index)
1682{
1683 return INTERPRETER_TRANSLATE(ldrex)(inst, index);
1684}
1685static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrh)(unsigned int inst, int index)
1686{
1687 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1688 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1689
1690 inst_base->cond = BITS(inst, 28, 31);
1691 inst_base->idx = index;
1692 inst_base->br = NON_BRANCH;
1693
1694 inst_cream->inst = inst;
1695 inst_cream->get_addr = get_calc_addr_op(inst);
1696
1697 return inst_base;
1698}
1699static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsb)(unsigned int inst, int index)
1700{
1701 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1702 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1703
1704 inst_base->cond = BITS(inst, 28, 31);
1705 inst_base->idx = index;
1706 inst_base->br = NON_BRANCH;
1707
1708 inst_cream->inst = inst;
1709 inst_cream->get_addr = get_calc_addr_op(inst);
1710
1711 return inst_base;
1712}
1713static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsh)(unsigned int inst, int index)
1714{
1715 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1716 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1717
1718 inst_base->cond = BITS(inst, 28, 31);
1719 inst_base->idx = index;
1720 inst_base->br = NON_BRANCH;
1721
1722 inst_cream->inst = inst;
1723 inst_cream->get_addr = get_calc_addr_op(inst);
1724
1725 return inst_base;
1726}
1727static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrt)(unsigned int inst, int index)
1728{
1729 arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1730 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
1731
1732 inst_base->cond = BITS(inst, 28, 31);
1733 inst_base->idx = index;
1734 inst_base->br = NON_BRANCH;
1735
1736 inst_cream->inst = inst;
1737 if (BITS(inst, 25, 27) == 2) {
1738 inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
1739 } else if (BITS(inst, 25, 27) == 3) {
1740 inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
1741 } else {
1742 // Reaching this would indicate the thumb version
1743 // of this instruction, however the 3DS CPU doesn't
1744 // support this variant (the 3DS CPU is only ARMv6K,
1745 // while this variant is added in ARMv6T2).
1746 // So it's sufficient for citra to not implement this.
1747 DEBUG_MSG;
1748 }
1749
1750 if (BITS(inst, 12, 15) == 15) {
1751 inst_base->br = INDIRECT_BRANCH;
1752 }
1753 return inst_base;
1754}
1755static ARM_INST_PTR INTERPRETER_TRANSLATE(mcr)(unsigned int inst, int index)
1756{
1757 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mcr_inst));
1758 mcr_inst *inst_cream = (mcr_inst *)inst_base->component;
1759 inst_base->cond = BITS(inst, 28, 31);
1760 inst_base->idx = index;
1761 inst_base->br = NON_BRANCH;
1762
1763 inst_cream->crn = BITS(inst, 16, 19);
1764 inst_cream->crm = BITS(inst, 0, 3);
1765 inst_cream->opcode_1 = BITS(inst, 21, 23);
1766 inst_cream->opcode_2 = BITS(inst, 5, 7);
1767 inst_cream->Rd = BITS(inst, 12, 15);
1768 inst_cream->cp_num = BITS(inst, 8, 11);
1769 inst_cream->inst = inst;
1770 return inst_base;
1771}
1772
1773static ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index)
1774{
1775 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(mcrr_inst));
1776 mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component;
1777
1778 inst_base->cond = BITS(inst, 28, 31);
1779 inst_base->idx = index;
1780 inst_base->br = NON_BRANCH;
1781
1782 inst_cream->crm = BITS(inst, 0, 3);
1783 inst_cream->opcode_1 = BITS(inst, 4, 7);
1784 inst_cream->cp_num = BITS(inst, 8, 11);
1785 inst_cream->rt = BITS(inst, 12, 15);
1786 inst_cream->rt2 = BITS(inst, 16, 19);
1787
1788 return inst_base;
1789}
1790
1791static ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index)
1792{
1793 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mla_inst));
1794 mla_inst *inst_cream = (mla_inst *)inst_base->component;
1795
1796 inst_base->cond = BITS(inst, 28, 31);
1797 inst_base->idx = index;
1798 inst_base->br = NON_BRANCH;
1799
1800 inst_cream->S = BIT(inst, 20);
1801 inst_cream->Rn = BITS(inst, 12, 15);
1802 inst_cream->Rd = BITS(inst, 16, 19);
1803 inst_cream->Rs = BITS(inst, 8, 11);
1804 inst_cream->Rm = BITS(inst, 0, 3);
1805
1806 return inst_base;
1807}
1808static ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index)
1809{
1810 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst));
1811 mov_inst *inst_cream = (mov_inst *)inst_base->component;
1812
1813 inst_base->cond = BITS(inst, 28, 31);
1814 inst_base->idx = index;
1815 inst_base->br = NON_BRANCH;
1816
1817 inst_cream->I = BIT(inst, 25);
1818 inst_cream->S = BIT(inst, 20);
1819 inst_cream->Rd = BITS(inst, 12, 15);
1820 inst_cream->shifter_operand = BITS(inst, 0, 11);
1821 inst_cream->shtop_func = get_shtop(inst);
1822
1823 if (inst_cream->Rd == 15) {
1824 inst_base->br = INDIRECT_BRANCH;
1825 }
1826 return inst_base;
1827}
1828static ARM_INST_PTR INTERPRETER_TRANSLATE(mrc)(unsigned int inst, int index)
1829{
1830 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrc_inst));
1831 mrc_inst *inst_cream = (mrc_inst *)inst_base->component;
1832 inst_base->cond = BITS(inst, 28, 31);
1833 inst_base->idx = index;
1834 inst_base->br = NON_BRANCH;
1835
1836 inst_cream->crn = BITS(inst, 16, 19);
1837 inst_cream->crm = BITS(inst, 0, 3);
1838 inst_cream->opcode_1 = BITS(inst, 21, 23);
1839 inst_cream->opcode_2 = BITS(inst, 5, 7);
1840 inst_cream->Rd = BITS(inst, 12, 15);
1841 inst_cream->cp_num = BITS(inst, 8, 11);
1842 inst_cream->inst = inst;
1843 return inst_base;
1844}
1845
1846static ARM_INST_PTR INTERPRETER_TRANSLATE(mrrc)(unsigned int inst, int index)
1847{
1848 return INTERPRETER_TRANSLATE(mcrr)(inst, index);
1849}
1850
1851static ARM_INST_PTR INTERPRETER_TRANSLATE(mrs)(unsigned int inst, int index)
1852{
1853 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrs_inst));
1854 mrs_inst *inst_cream = (mrs_inst *)inst_base->component;
1855
1856 inst_base->cond = BITS(inst, 28, 31);
1857 inst_base->idx = index;
1858 inst_base->br = NON_BRANCH;
1859
1860 inst_cream->Rd = BITS(inst, 12, 15);
1861 inst_cream->R = BIT(inst, 22);
1862
1863 return inst_base;
1864}
1865static ARM_INST_PTR INTERPRETER_TRANSLATE(msr)(unsigned int inst, int index)
1866{
1867 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(msr_inst));
1868 msr_inst *inst_cream = (msr_inst *)inst_base->component;
1869
1870 inst_base->cond = BITS(inst, 28, 31);
1871 inst_base->idx = index;
1872 inst_base->br = NON_BRANCH;
1873
1874 inst_cream->field_mask = BITS(inst, 16, 19);
1875 inst_cream->R = BIT(inst, 22);
1876 inst_cream->inst = inst;
1877
1878 return inst_base;
1879}
1880static ARM_INST_PTR INTERPRETER_TRANSLATE(mul)(unsigned int inst, int index)
1881{
1882 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mul_inst));
1883 mul_inst *inst_cream = (mul_inst *)inst_base->component;
1884
1885 inst_base->cond = BITS(inst, 28, 31);
1886 inst_base->idx = index;
1887 inst_base->br = NON_BRANCH;
1888
1889 inst_cream->S = BIT(inst, 20);
1890 inst_cream->Rm = BITS(inst, 0, 3);
1891 inst_cream->Rs = BITS(inst, 8, 11);
1892 inst_cream->Rd = BITS(inst, 16, 19);
1893
1894 return inst_base;
1895}
1896static ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index)
1897{
1898 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mvn_inst));
1899 mvn_inst *inst_cream = (mvn_inst *)inst_base->component;
1900
1901 inst_base->cond = BITS(inst, 28, 31);
1902 inst_base->idx = index;
1903 inst_base->br = NON_BRANCH;
1904
1905 inst_cream->I = BIT(inst, 25);
1906 inst_cream->S = BIT(inst, 20);
1907 inst_cream->Rd = BITS(inst, 12, 15);
1908 inst_cream->shifter_operand = BITS(inst, 0, 11);
1909 inst_cream->shtop_func = get_shtop(inst);
1910
1911 if (inst_cream->Rd == 15) {
1912 inst_base->br = INDIRECT_BRANCH;
1913 }
1914 return inst_base;
1915
1916}
1917static ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index)
1918{
1919 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(orr_inst));
1920 orr_inst *inst_cream = (orr_inst *)inst_base->component;
1921
1922 inst_base->cond = BITS(inst, 28, 31);
1923 inst_base->idx = index;
1924 inst_base->br = NON_BRANCH;
1925
1926 inst_cream->I = BIT(inst, 25);
1927 inst_cream->S = BIT(inst, 20);
1928 inst_cream->Rd = BITS(inst, 12, 15);
1929 inst_cream->Rn = BITS(inst, 16, 19);
1930 inst_cream->shifter_operand = BITS(inst, 0, 11);
1931 inst_cream->shtop_func = get_shtop(inst);
1932
1933 if (inst_cream->Rd == 15)
1934 inst_base->br = INDIRECT_BRANCH;
1935
1936 return inst_base;
1937}
1938
1939// NOP introduced in ARMv6K.
1940static ARM_INST_PTR INTERPRETER_TRANSLATE(nop)(unsigned int inst, int index)
1941{
1942 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
1943
1944 inst_base->cond = BITS(inst, 28, 31);
1945 inst_base->idx = index;
1946 inst_base->br = NON_BRANCH;
1947
1948 return inst_base;
1949}
1950
1951static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index)
1952{
1953 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pkh_inst));
1954 pkh_inst *inst_cream = (pkh_inst *)inst_base->component;
1955
1956 inst_base->cond = BITS(inst, 28, 31);
1957 inst_base->idx = index;
1958 inst_base->br = NON_BRANCH;
1959
1960 inst_cream->Rd = BITS(inst, 12, 15);
1961 inst_cream->Rn = BITS(inst, 16, 19);
1962 inst_cream->Rm = BITS(inst, 0, 3);
1963 inst_cream->imm = BITS(inst, 7, 11);
1964
1965 return inst_base;
1966}
1967
1968static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index)
1969{
1970 return INTERPRETER_TRANSLATE(pkhbt)(inst, index);
1971}
1972
1973static ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index)
1974{
1975 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst));
1976
1977 inst_base->cond = BITS(inst, 28, 31);
1978 inst_base->idx = index;
1979 inst_base->br = NON_BRANCH;
1980
1981 return inst_base;
1982}
1983
1984static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index)
1985{
1986 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
1987 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
1988
1989 inst_base->cond = BITS(inst, 28, 31);
1990 inst_base->idx = index;
1991 inst_base->br = NON_BRANCH;
1992
1993 inst_cream->op1 = BITS(inst, 21, 22);
1994 inst_cream->Rm = BITS(inst, 0, 3);
1995 inst_cream->Rn = BITS(inst, 16, 19);
1996 inst_cream->Rd = BITS(inst, 12, 15);
1997
1998 return inst_base;
1999}
2000static ARM_INST_PTR INTERPRETER_TRANSLATE(qdadd)(unsigned int inst, int index)
2001{
2002 return INTERPRETER_TRANSLATE(qadd)(inst, index);
2003}
2004static ARM_INST_PTR INTERPRETER_TRANSLATE(qdsub)(unsigned int inst, int index)
2005{
2006 return INTERPRETER_TRANSLATE(qadd)(inst, index);
2007}
2008static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub)(unsigned int inst, int index)
2009{
2010 return INTERPRETER_TRANSLATE(qadd)(inst, index);
2011}
2012
2013static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index)
2014{
2015 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2016 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2017
2018 inst_base->cond = BITS(inst, 28, 31);
2019 inst_base->idx = index;
2020 inst_base->br = NON_BRANCH;
2021
2022 inst_cream->Rm = BITS(inst, 0, 3);
2023 inst_cream->Rn = BITS(inst, 16, 19);
2024 inst_cream->Rd = BITS(inst, 12, 15);
2025 inst_cream->op1 = BITS(inst, 20, 21);
2026 inst_cream->op2 = BITS(inst, 5, 7);
2027
2028 return inst_base;
2029}
2030static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index)
2031{
2032 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
2033}
2034static ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index)
2035{
2036 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
2037}
2038static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub8)(unsigned int inst, int index)
2039{
2040 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
2041}
2042static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index)
2043{
2044 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
2045}
2046static ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index)
2047{
2048 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
2049}
2050
2051static ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index)
2052{
2053 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(rev_inst));
2054 rev_inst* const inst_cream = (rev_inst*)inst_base->component;
2055
2056 inst_base->cond = BITS(inst, 28, 31);
2057 inst_base->idx = index;
2058 inst_base->br = NON_BRANCH;
2059
2060 inst_cream->Rm = BITS(inst, 0, 3);
2061 inst_cream->Rd = BITS(inst, 12, 15);
2062 inst_cream->op1 = BITS(inst, 20, 22);
2063 inst_cream->op2 = BITS(inst, 5, 7);
2064
2065 return inst_base;
2066}
2067static ARM_INST_PTR INTERPRETER_TRANSLATE(rev16)(unsigned int inst, int index)
2068{
2069 return INTERPRETER_TRANSLATE(rev)(inst, index);
2070}
2071static ARM_INST_PTR INTERPRETER_TRANSLATE(revsh)(unsigned int inst, int index)
2072{
2073 return INTERPRETER_TRANSLATE(rev)(inst, index);
2074}
2075
2076static ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index)
2077{
2078 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2079 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
2080
2081 inst_base->cond = AL;
2082 inst_base->idx = index;
2083 inst_base->br = INDIRECT_BRANCH;
2084
2085 inst_cream->inst = inst;
2086 inst_cream->get_addr = get_calc_addr_op(inst);
2087
2088 return inst_base;
2089}
2090
2091static ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index)
2092{
2093 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsb_inst));
2094 rsb_inst *inst_cream = (rsb_inst *)inst_base->component;
2095
2096 inst_base->cond = BITS(inst, 28, 31);
2097 inst_base->idx = index;
2098 inst_base->br = NON_BRANCH;
2099
2100 inst_cream->I = BIT(inst, 25);
2101 inst_cream->S = BIT(inst, 20);
2102 inst_cream->Rn = BITS(inst, 16, 19);
2103 inst_cream->Rd = BITS(inst, 12, 15);
2104 inst_cream->shifter_operand = BITS(inst, 0, 11);
2105 inst_cream->shtop_func = get_shtop(inst);
2106
2107 if (inst_cream->Rd == 15)
2108 inst_base->br = INDIRECT_BRANCH;
2109
2110 return inst_base;
2111}
2112static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index)
2113{
2114 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsc_inst));
2115 rsc_inst *inst_cream = (rsc_inst *)inst_base->component;
2116
2117 inst_base->cond = BITS(inst, 28, 31);
2118 inst_base->idx = index;
2119 inst_base->br = NON_BRANCH;
2120
2121 inst_cream->I = BIT(inst, 25);
2122 inst_cream->S = BIT(inst, 20);
2123 inst_cream->Rn = BITS(inst, 16, 19);
2124 inst_cream->Rd = BITS(inst, 12, 15);
2125 inst_cream->shifter_operand = BITS(inst, 0, 11);
2126 inst_cream->shtop_func = get_shtop(inst);
2127
2128 if (inst_cream->Rd == 15)
2129 inst_base->br = INDIRECT_BRANCH;
2130
2131 return inst_base;
2132}
2133static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index)
2134{
2135 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2136 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2137
2138 inst_base->cond = BITS(inst, 28, 31);
2139 inst_base->idx = index;
2140 inst_base->br = NON_BRANCH;
2141
2142 inst_cream->Rm = BITS(inst, 0, 3);
2143 inst_cream->Rn = BITS(inst, 16, 19);
2144 inst_cream->Rd = BITS(inst, 12, 15);
2145 inst_cream->op1 = BITS(inst, 20, 21);
2146 inst_cream->op2 = BITS(inst, 5, 7);
2147
2148 return inst_base;
2149}
2150static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index)
2151{
2152 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
2153}
2154static ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index)
2155{
2156 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
2157}
2158static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub8)(unsigned int inst, int index)
2159{
2160 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
2161}
2162static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index)
2163{
2164 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
2165}
2166static ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index)
2167{
2168 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
2169}
2170
2171static ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index)
2172{
2173 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sbc_inst));
2174 sbc_inst *inst_cream = (sbc_inst *)inst_base->component;
2175
2176 inst_base->cond = BITS(inst, 28, 31);
2177 inst_base->idx = index;
2178 inst_base->br = NON_BRANCH;
2179
2180 inst_cream->I = BIT(inst, 25);
2181 inst_cream->S = BIT(inst, 20);
2182 inst_cream->Rn = BITS(inst, 16, 19);
2183 inst_cream->Rd = BITS(inst, 12, 15);
2184 inst_cream->shifter_operand = BITS(inst, 0, 11);
2185 inst_cream->shtop_func = get_shtop(inst);
2186
2187 if (inst_cream->Rd == 15)
2188 inst_base->br = INDIRECT_BRANCH;
2189
2190 return inst_base;
2191}
2192static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index)
2193{
2194 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2195 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2196
2197 inst_base->cond = BITS(inst, 28, 31);
2198 inst_base->idx = index;
2199 inst_base->br = NON_BRANCH;
2200
2201 inst_cream->Rm = BITS(inst, 0, 3);
2202 inst_cream->Rn = BITS(inst, 16, 19);
2203 inst_cream->Rd = BITS(inst, 12, 15);
2204 inst_cream->op1 = BITS(inst, 20, 22);
2205 inst_cream->op2 = BITS(inst, 5, 7);
2206
2207 return inst_base;
2208}
2209
2210static ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index)
2211{
2212 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(setend_inst));
2213 setend_inst* const inst_cream = (setend_inst*)inst_base->component;
2214
2215 inst_base->cond = AL;
2216 inst_base->idx = index;
2217 inst_base->br = NON_BRANCH;
2218
2219 inst_cream->set_bigend = BIT(inst, 9);
2220
2221 return inst_base;
2222}
2223
2224static ARM_INST_PTR INTERPRETER_TRANSLATE(sev)(unsigned int inst, int index)
2225{
2226 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
2227
2228 inst_base->cond = BITS(inst, 28, 31);
2229 inst_base->idx = index;
2230 inst_base->br = NON_BRANCH;
2231
2232 return inst_base;
2233}
2234
2235static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index)
2236{
2237 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2238 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2239
2240 inst_base->cond = BITS(inst, 28, 31);
2241 inst_base->idx = index;
2242 inst_base->br = NON_BRANCH;
2243
2244 inst_cream->op1 = BITS(inst, 20, 21);
2245 inst_cream->op2 = BITS(inst, 5, 7);
2246 inst_cream->Rm = BITS(inst, 0, 3);
2247 inst_cream->Rn = BITS(inst, 16, 19);
2248 inst_cream->Rd = BITS(inst, 12, 15);
2249
2250 return inst_base;
2251}
2252static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd16)(unsigned int inst, int index)
2253{
2254 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
2255}
2256static ARM_INST_PTR INTERPRETER_TRANSLATE(shaddsubx)(unsigned int inst, int index)
2257{
2258 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
2259}
2260static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub8)(unsigned int inst, int index)
2261{
2262 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
2263}
2264static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub16)(unsigned int inst, int index)
2265{
2266 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
2267}
2268static ARM_INST_PTR INTERPRETER_TRANSLATE(shsubaddx)(unsigned int inst, int index)
2269{
2270 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
2271}
2272
2273static ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index)
2274{
2275 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smla_inst));
2276 smla_inst *inst_cream = (smla_inst *)inst_base->component;
2277
2278 inst_base->cond = BITS(inst, 28, 31);
2279 inst_base->idx = index;
2280 inst_base->br = NON_BRANCH;
2281
2282 inst_cream->x = BIT(inst, 5);
2283 inst_cream->y = BIT(inst, 6);
2284 inst_cream->Rm = BITS(inst, 0, 3);
2285 inst_cream->Rs = BITS(inst, 8, 11);
2286 inst_cream->Rd = BITS(inst, 16, 19);
2287 inst_cream->Rn = BITS(inst, 12, 15);
2288
2289 return inst_base;
2290}
2291
2292static ARM_INST_PTR INTERPRETER_TRANSLATE(smlad)(unsigned int inst, int index)
2293{
2294 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
2295 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
2296
2297 inst_base->cond = BITS(inst, 28, 31);
2298 inst_base->idx = index;
2299 inst_base->br = NON_BRANCH;
2300
2301 inst_cream->m = BIT(inst, 5);
2302 inst_cream->Rn = BITS(inst, 0, 3);
2303 inst_cream->Rm = BITS(inst, 8, 11);
2304 inst_cream->Rd = BITS(inst, 16, 19);
2305 inst_cream->Ra = BITS(inst, 12, 15);
2306 inst_cream->op1 = BITS(inst, 20, 22);
2307 inst_cream->op2 = BITS(inst, 5, 7);
2308
2309 return inst_base;
2310}
2311static ARM_INST_PTR INTERPRETER_TRANSLATE(smuad)(unsigned int inst, int index)
2312{
2313 return INTERPRETER_TRANSLATE(smlad)(inst, index);
2314}
2315static ARM_INST_PTR INTERPRETER_TRANSLATE(smusd)(unsigned int inst, int index)
2316{
2317 return INTERPRETER_TRANSLATE(smlad)(inst, index);
2318}
2319static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsd)(unsigned int inst, int index)
2320{
2321 return INTERPRETER_TRANSLATE(smlad)(inst, index);
2322}
2323
2324static ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index)
2325{
2326 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst));
2327 umlal_inst *inst_cream = (umlal_inst *)inst_base->component;
2328
2329 inst_base->cond = BITS(inst, 28, 31);
2330 inst_base->idx = index;
2331 inst_base->br = NON_BRANCH;
2332
2333 inst_cream->S = BIT(inst, 20);
2334 inst_cream->Rm = BITS(inst, 0, 3);
2335 inst_cream->Rs = BITS(inst, 8, 11);
2336 inst_cream->RdHi = BITS(inst, 16, 19);
2337 inst_cream->RdLo = BITS(inst, 12, 15);
2338
2339 return inst_base;
2340}
2341
2342static ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index)
2343{
2344 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlalxy_inst));
2345 smlalxy_inst* const inst_cream = (smlalxy_inst*)inst_base->component;
2346
2347 inst_base->cond = BITS(inst, 28, 31);
2348 inst_base->idx = index;
2349 inst_base->br = NON_BRANCH;
2350
2351 inst_cream->x = BIT(inst, 5);
2352 inst_cream->y = BIT(inst, 6);
2353 inst_cream->RdLo = BITS(inst, 12, 15);
2354 inst_cream->RdHi = BITS(inst, 16, 19);
2355 inst_cream->Rn = BITS(inst, 0, 4);
2356 inst_cream->Rm = BITS(inst, 8, 11);
2357
2358 return inst_base;
2359}
2360
2361static ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index)
2362{
2363 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
2364 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
2365
2366 inst_base->cond = BITS(inst, 28, 31);
2367 inst_base->idx = index;
2368 inst_base->br = NON_BRANCH;
2369
2370 inst_cream->Ra = BITS(inst, 12, 15);
2371 inst_cream->Rm = BITS(inst, 8, 11);
2372 inst_cream->Rn = BITS(inst, 0, 3);
2373 inst_cream->Rd = BITS(inst, 16, 19);
2374 inst_cream->m = BIT(inst, 6);
2375
2376 return inst_base;
2377}
2378
2379static ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index)
2380{
2381 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlald_inst));
2382 smlald_inst* const inst_cream = (smlald_inst*)inst_base->component;
2383
2384 inst_base->cond = BITS(inst, 28, 31);
2385 inst_base->idx = index;
2386 inst_base->br = NON_BRANCH;
2387
2388 inst_cream->Rm = BITS(inst, 8, 11);
2389 inst_cream->Rn = BITS(inst, 0, 3);
2390 inst_cream->RdLo = BITS(inst, 12, 15);
2391 inst_cream->RdHi = BITS(inst, 16, 19);
2392 inst_cream->swap = BIT(inst, 5);
2393 inst_cream->op1 = BITS(inst, 20, 22);
2394 inst_cream->op2 = BITS(inst, 5, 7);
2395
2396 return inst_base;
2397}
2398static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsld)(unsigned int inst, int index)
2399{
2400 return INTERPRETER_TRANSLATE(smlald)(inst, index);
2401}
2402
2403static ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index)
2404{
2405 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
2406 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
2407
2408 inst_base->cond = BITS(inst, 28, 31);
2409 inst_base->idx = index;
2410 inst_base->br = NON_BRANCH;
2411
2412 inst_cream->m = BIT(inst, 5);
2413 inst_cream->Ra = BITS(inst, 12, 15);
2414 inst_cream->Rm = BITS(inst, 8, 11);
2415 inst_cream->Rn = BITS(inst, 0, 3);
2416 inst_cream->Rd = BITS(inst, 16, 19);
2417 inst_cream->op1 = BITS(inst, 20, 22);
2418 inst_cream->op2 = BITS(inst, 5, 7);
2419
2420 return inst_base;
2421}
2422static ARM_INST_PTR INTERPRETER_TRANSLATE(smmls)(unsigned int inst, int index)
2423{
2424 return INTERPRETER_TRANSLATE(smmla)(inst, index);
2425}
2426static ARM_INST_PTR INTERPRETER_TRANSLATE(smmul)(unsigned int inst, int index)
2427{
2428 return INTERPRETER_TRANSLATE(smmla)(inst, index);
2429}
2430
2431static ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index)
2432{
2433 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smul_inst));
2434 smul_inst *inst_cream = (smul_inst *)inst_base->component;
2435
2436 inst_base->cond = BITS(inst, 28, 31);
2437 inst_base->idx = index;
2438 inst_base->br = NON_BRANCH;
2439
2440 inst_cream->Rd = BITS(inst, 16, 19);
2441 inst_cream->Rs = BITS(inst, 8, 11);
2442 inst_cream->Rm = BITS(inst, 0, 3);
2443
2444 inst_cream->x = BIT(inst, 5);
2445 inst_cream->y = BIT(inst, 6);
2446
2447 return inst_base;
2448
2449}
2450static ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index)
2451{
2452 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst));
2453 umull_inst *inst_cream = (umull_inst *)inst_base->component;
2454
2455 inst_base->cond = BITS(inst, 28, 31);
2456 inst_base->idx = index;
2457 inst_base->br = NON_BRANCH;
2458
2459 inst_cream->S = BIT(inst, 20);
2460 inst_cream->Rm = BITS(inst, 0, 3);
2461 inst_cream->Rs = BITS(inst, 8, 11);
2462 inst_cream->RdHi = BITS(inst, 16, 19);
2463 inst_cream->RdLo = BITS(inst, 12, 15);
2464
2465 return inst_base;
2466}
2467
2468static ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index)
2469{
2470 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
2471 smlad_inst *inst_cream = (smlad_inst *)inst_base->component;
2472
2473 inst_base->cond = BITS(inst, 28, 31);
2474 inst_base->idx = index;
2475 inst_base->br = NON_BRANCH;
2476
2477 inst_cream->m = BIT(inst, 6);
2478 inst_cream->Rm = BITS(inst, 8, 11);
2479 inst_cream->Rn = BITS(inst, 0, 3);
2480 inst_cream->Rd = BITS(inst, 16, 19);
2481
2482 return inst_base;
2483}
2484
2485static ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index)
2486{
2487 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2488 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
2489
2490 inst_base->cond = AL;
2491 inst_base->idx = index;
2492 inst_base->br = NON_BRANCH;
2493
2494 inst_cream->inst = inst;
2495 inst_cream->get_addr = get_calc_addr_op(inst);
2496
2497 return inst_base;
2498}
2499
2500static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index)
2501{
2502 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst));
2503 ssat_inst* const inst_cream = (ssat_inst*)inst_base->component;
2504
2505 inst_base->cond = BITS(inst, 28, 31);
2506 inst_base->idx = index;
2507 inst_base->br = NON_BRANCH;
2508
2509 inst_cream->Rn = BITS(inst, 0, 3);
2510 inst_cream->Rd = BITS(inst, 12, 15);
2511 inst_cream->imm5 = BITS(inst, 7, 11);
2512 inst_cream->sat_imm = BITS(inst, 16, 20);
2513 inst_cream->shift_type = BIT(inst, 6);
2514
2515 return inst_base;
2516}
2517static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index)
2518{
2519 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst));
2520 ssat_inst* const inst_cream = (ssat_inst*)inst_base->component;
2521
2522 inst_base->cond = BITS(inst, 28, 31);
2523 inst_base->idx = index;
2524 inst_base->br = NON_BRANCH;
2525
2526 inst_cream->Rn = BITS(inst, 0, 3);
2527 inst_cream->Rd = BITS(inst, 12, 15);
2528 inst_cream->sat_imm = BITS(inst, 16, 19);
2529
2530 return inst_base;
2531}
2532
2533static ARM_INST_PTR INTERPRETER_TRANSLATE(stc)(unsigned int inst, int index)
2534{
2535 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(stc_inst));
2536 inst_base->cond = BITS(inst, 28, 31);
2537 inst_base->idx = index;
2538 inst_base->br = NON_BRANCH;
2539
2540 return inst_base;
2541}
2542static ARM_INST_PTR INTERPRETER_TRANSLATE(stm)(unsigned int inst, int index)
2543{
2544 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2545 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
2546
2547 inst_base->cond = BITS(inst, 28, 31);
2548 inst_base->idx = index;
2549 inst_base->br = NON_BRANCH;
2550
2551 inst_cream->inst = inst;
2552 inst_cream->get_addr = get_calc_addr_op(inst);
2553 return inst_base;
2554}
2555static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb)(unsigned int inst, int index)
2556{
2557 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst));
2558 sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component;
2559
2560 inst_base->cond = BITS(inst, 28, 31);
2561 inst_base->idx = index;
2562 inst_base->br = NON_BRANCH;
2563
2564 inst_cream->Rd = BITS(inst, 12, 15);
2565 inst_cream->Rm = BITS(inst, 0, 3);
2566 inst_cream->rotate = BITS(inst, 10, 11);
2567
2568 return inst_base;
2569}
2570static ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index)
2571{
2572 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2573 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
2574
2575 inst_base->cond = BITS(inst, 28, 31);
2576 inst_base->idx = index;
2577 inst_base->br = NON_BRANCH;
2578
2579 inst_cream->inst = inst;
2580 inst_cream->get_addr = get_calc_addr_op(inst);
2581
2582 return inst_base;
2583}
2584static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb)(unsigned int inst, int index)
2585{
2586 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst));
2587 uxth_inst *inst_cream = (uxth_inst *)inst_base->component;
2588
2589 inst_base->cond = BITS(inst, 28, 31);
2590 inst_base->idx = index;
2591 inst_base->br = NON_BRANCH;
2592
2593 inst_cream->Rd = BITS(inst, 12, 15);
2594 inst_cream->rotate = BITS(inst, 10, 11);
2595 inst_cream->Rm = BITS(inst, 0, 3);
2596
2597 return inst_base;
2598}
2599static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index)
2600{
2601 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst));
2602 uxtab_inst *inst_cream = (uxtab_inst *)inst_base->component;
2603
2604 inst_base->cond = BITS(inst, 28, 31);
2605 inst_base->idx = index;
2606 inst_base->br = NON_BRANCH;
2607
2608 inst_cream->Rd = BITS(inst, 12, 15);
2609 inst_cream->rotate = BITS(inst, 10, 11);
2610 inst_cream->Rm = BITS(inst, 0, 3);
2611 inst_cream->Rn = BITS(inst, 16, 19);
2612
2613 return inst_base;
2614}
2615static ARM_INST_PTR INTERPRETER_TRANSLATE(strb)(unsigned int inst, int index)
2616{
2617 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2618 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
2619
2620 inst_base->cond = BITS(inst, 28, 31);
2621 inst_base->idx = index;
2622 inst_base->br = NON_BRANCH;
2623
2624 inst_cream->inst = inst;
2625 inst_cream->get_addr = get_calc_addr_op(inst);
2626
2627 return inst_base;
2628}
2629static ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index)
2630{
2631 arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2632 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
2633
2634 inst_base->cond = BITS(inst, 28, 31);
2635 inst_base->idx = index;
2636 inst_base->br = NON_BRANCH;
2637
2638 inst_cream->inst = inst;
2639
2640 if (BITS(inst, 25, 27) == 2) {
2641 inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
2642 } else if (BITS(inst, 25, 27) == 3) {
2643 inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
2644 } else {
2645 DEBUG_MSG;
2646 }
2647
2648 return inst_base;
2649}
2650static ARM_INST_PTR INTERPRETER_TRANSLATE(strd)(unsigned int inst, int index){
2651 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2652 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
2653
2654 inst_base->cond = BITS(inst, 28, 31);
2655 inst_base->idx = index;
2656 inst_base->br = NON_BRANCH;
2657
2658 inst_cream->inst = inst;
2659 inst_cream->get_addr = get_calc_addr_op(inst);
2660
2661 return inst_base;
2662}
2663static ARM_INST_PTR INTERPRETER_TRANSLATE(strex)(unsigned int inst, int index)
2664{
2665 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2666 generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component;
2667
2668 inst_base->cond = BITS(inst, 28, 31);
2669 inst_base->idx = index;
2670 inst_base->br = NON_BRANCH;
2671
2672 inst_cream->Rn = BITS(inst, 16, 19);
2673 inst_cream->Rd = BITS(inst, 12, 15);
2674 inst_cream->Rm = BITS(inst, 0, 3);
2675
2676 return inst_base;
2677}
2678static ARM_INST_PTR INTERPRETER_TRANSLATE(strexb)(unsigned int inst, int index)
2679{
2680 return INTERPRETER_TRANSLATE(strex)(inst, index);
2681}
2682static ARM_INST_PTR INTERPRETER_TRANSLATE(strexh)(unsigned int inst, int index)
2683{
2684 return INTERPRETER_TRANSLATE(strex)(inst, index);
2685}
2686static ARM_INST_PTR INTERPRETER_TRANSLATE(strexd)(unsigned int inst, int index)
2687{
2688 return INTERPRETER_TRANSLATE(strex)(inst, index);
2689}
2690static ARM_INST_PTR INTERPRETER_TRANSLATE(strh)(unsigned int inst, int index)
2691{
2692 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2693 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
2694
2695 inst_base->cond = BITS(inst, 28, 31);
2696 inst_base->idx = index;
2697 inst_base->br = NON_BRANCH;
2698
2699 inst_cream->inst = inst;
2700 inst_cream->get_addr = get_calc_addr_op(inst);
2701
2702 return inst_base;
2703}
2704static ARM_INST_PTR INTERPRETER_TRANSLATE(strt)(unsigned int inst, int index)
2705{
2706 arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2707 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
2708
2709 inst_base->cond = BITS(inst, 28, 31);
2710 inst_base->idx = index;
2711 inst_base->br = NON_BRANCH;
2712
2713 inst_cream->inst = inst;
2714 if (BITS(inst, 25, 27) == 2) {
2715 inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
2716 } else if (BITS(inst, 25, 27) == 3) {
2717 inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
2718 } else {
2719 // Reaching this would indicate the thumb version
2720 // of this instruction, however the 3DS CPU doesn't
2721 // support this variant (the 3DS CPU is only ARMv6K,
2722 // while this variant is added in ARMv6T2).
2723 // So it's sufficient for citra to not implement this.
2724 DEBUG_MSG;
2725 }
2726
2727 return inst_base;
2728}
2729static ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index)
2730{
2731 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sub_inst));
2732 sub_inst *inst_cream = (sub_inst *)inst_base->component;
2733
2734 inst_base->cond = BITS(inst, 28, 31);
2735 inst_base->idx = index;
2736 inst_base->br = NON_BRANCH;
2737
2738 inst_cream->I = BIT(inst, 25);
2739 inst_cream->S = BIT(inst, 20);
2740 inst_cream->Rn = BITS(inst, 16, 19);
2741 inst_cream->Rd = BITS(inst, 12, 15);
2742 inst_cream->shifter_operand = BITS(inst, 0, 11);
2743 inst_cream->shtop_func = get_shtop(inst);
2744
2745 if (inst_cream->Rd == 15)
2746 inst_base->br = INDIRECT_BRANCH;
2747
2748 return inst_base;
2749}
2750static ARM_INST_PTR INTERPRETER_TRANSLATE(swi)(unsigned int inst, int index)
2751{
2752 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swi_inst));
2753 swi_inst *inst_cream = (swi_inst *)inst_base->component;
2754
2755 inst_base->cond = BITS(inst, 28, 31);
2756 inst_base->idx = index;
2757 inst_base->br = NON_BRANCH;
2758
2759 inst_cream->num = BITS(inst, 0, 23);
2760 return inst_base;
2761}
2762static ARM_INST_PTR INTERPRETER_TRANSLATE(swp)(unsigned int inst, int index)
2763{
2764 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst));
2765 swp_inst *inst_cream = (swp_inst *)inst_base->component;
2766
2767 inst_base->cond = BITS(inst, 28, 31);
2768 inst_base->idx = index;
2769 inst_base->br = NON_BRANCH;
2770
2771 inst_cream->Rn = BITS(inst, 16, 19);
2772 inst_cream->Rd = BITS(inst, 12, 15);
2773 inst_cream->Rm = BITS(inst, 0, 3);
2774
2775 return inst_base;
2776}
2777static ARM_INST_PTR INTERPRETER_TRANSLATE(swpb)(unsigned int inst, int index){
2778 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst));
2779 swp_inst *inst_cream = (swp_inst *)inst_base->component;
2780
2781 inst_base->cond = BITS(inst, 28, 31);
2782 inst_base->idx = index;
2783 inst_base->br = NON_BRANCH;
2784
2785 inst_cream->Rn = BITS(inst, 16, 19);
2786 inst_cream->Rd = BITS(inst, 12, 15);
2787 inst_cream->Rm = BITS(inst, 0, 3);
2788
2789 return inst_base;
2790}
2791static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){
2792 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst));
2793 sxtab_inst *inst_cream = (sxtab_inst *)inst_base->component;
2794
2795 inst_base->cond = BITS(inst, 28, 31);
2796 inst_base->idx = index;
2797 inst_base->br = NON_BRANCH;
2798
2799 inst_cream->Rd = BITS(inst, 12, 15);
2800 inst_cream->rotate = BITS(inst, 10, 11);
2801 inst_cream->Rm = BITS(inst, 0, 3);
2802 inst_cream->Rn = BITS(inst, 16, 19);
2803
2804 return inst_base;
2805}
2806
2807static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index)
2808{
2809 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst));
2810 sxtab_inst* const inst_cream = (sxtab_inst*)inst_base->component;
2811
2812 inst_base->cond = BITS(inst, 28, 31);
2813 inst_base->idx = index;
2814 inst_base->br = NON_BRANCH;
2815
2816 inst_cream->Rm = BITS(inst, 0, 3);
2817 inst_cream->Rn = BITS(inst, 16, 19);
2818 inst_cream->Rd = BITS(inst, 12, 15);
2819 inst_cream->rotate = BITS(inst, 10, 11);
2820
2821 return inst_base;
2822}
2823static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index)
2824{
2825 return INTERPRETER_TRANSLATE(sxtab16)(inst, index);
2826}
2827
2828static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index) {
2829 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst));
2830 sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component;
2831
2832 inst_base->cond = BITS(inst, 28, 31);
2833 inst_base->idx = index;
2834 inst_base->br = NON_BRANCH;
2835
2836 inst_cream->Rd = BITS(inst, 12, 15);
2837 inst_cream->rotate = BITS(inst, 10, 11);
2838 inst_cream->Rm = BITS(inst, 0, 3);
2839 inst_cream->Rn = BITS(inst, 16, 19);
2840
2841 return inst_base;
2842}
2843
2844static ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index)
2845{
2846 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst));
2847 teq_inst *inst_cream = (teq_inst *)inst_base->component;
2848
2849 inst_base->cond = BITS(inst, 28, 31);
2850 inst_base->idx = index;
2851 inst_base->br = NON_BRANCH;
2852
2853 inst_cream->I = BIT(inst, 25);
2854 inst_cream->Rn = BITS(inst, 16, 19);
2855 inst_cream->shifter_operand = BITS(inst, 0, 11);
2856 inst_cream->shtop_func = get_shtop(inst);
2857
2858 return inst_base;
2859}
2860static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index)
2861{
2862 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(tst_inst));
2863 tst_inst *inst_cream = (tst_inst *)inst_base->component;
2864
2865 inst_base->cond = BITS(inst, 28, 31);
2866 inst_base->idx = index;
2867 inst_base->br = NON_BRANCH;
2868
2869 inst_cream->I = BIT(inst, 25);
2870 inst_cream->S = BIT(inst, 20);
2871 inst_cream->Rn = BITS(inst, 16, 19);
2872 inst_cream->Rd = BITS(inst, 12, 15);
2873 inst_cream->shifter_operand = BITS(inst, 0, 11);
2874 inst_cream->shtop_func = get_shtop(inst);
2875
2876 return inst_base;
2877}
2878
2879static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index)
2880{
2881 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2882 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2883
2884 inst_base->cond = BITS(inst, 28, 31);
2885 inst_base->idx = index;
2886 inst_base->br = NON_BRANCH;
2887
2888 inst_cream->op1 = BITS(inst, 20, 21);
2889 inst_cream->op2 = BITS(inst, 5, 7);
2890 inst_cream->Rm = BITS(inst, 0, 3);
2891 inst_cream->Rn = BITS(inst, 16, 19);
2892 inst_cream->Rd = BITS(inst, 12, 15);
2893
2894 return inst_base;
2895}
2896static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index)
2897{
2898 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
2899}
2900static ARM_INST_PTR INTERPRETER_TRANSLATE(uaddsubx)(unsigned int inst, int index)
2901{
2902 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
2903}
2904static ARM_INST_PTR INTERPRETER_TRANSLATE(usub8)(unsigned int inst, int index)
2905{
2906 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
2907}
2908static ARM_INST_PTR INTERPRETER_TRANSLATE(usub16)(unsigned int inst, int index)
2909{
2910 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
2911}
2912static ARM_INST_PTR INTERPRETER_TRANSLATE(usubaddx)(unsigned int inst, int index)
2913{
2914 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
2915}
2916
2917static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index)
2918{
2919 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2920 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2921
2922 inst_base->cond = BITS(inst, 28, 31);
2923 inst_base->idx = index;
2924 inst_base->br = NON_BRANCH;
2925
2926 inst_cream->op1 = BITS(inst, 20, 21);
2927 inst_cream->op2 = BITS(inst, 5, 7);
2928 inst_cream->Rm = BITS(inst, 0, 3);
2929 inst_cream->Rn = BITS(inst, 16, 19);
2930 inst_cream->Rd = BITS(inst, 12, 15);
2931
2932 return inst_base;
2933}
2934static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index)
2935{
2936 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
2937}
2938static ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index)
2939{
2940 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
2941}
2942static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index)
2943{
2944 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
2945}
2946static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index)
2947{
2948 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
2949}
2950static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index)
2951{
2952 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
2953}
2954static ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index)
2955{
2956 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(umaal_inst));
2957 umaal_inst* const inst_cream = (umaal_inst*)inst_base->component;
2958
2959 inst_base->cond = BITS(inst, 28, 31);
2960 inst_base->idx = index;
2961 inst_base->br = NON_BRANCH;
2962
2963 inst_cream->Rm = BITS(inst, 8, 11);
2964 inst_cream->Rn = BITS(inst, 0, 3);
2965 inst_cream->RdLo = BITS(inst, 12, 15);
2966 inst_cream->RdHi = BITS(inst, 16, 19);
2967
2968 return inst_base;
2969}
2970static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index)
2971{
2972 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst));
2973 umlal_inst *inst_cream = (umlal_inst *)inst_base->component;
2974
2975 inst_base->cond = BITS(inst, 28, 31);
2976 inst_base->idx = index;
2977 inst_base->br = NON_BRANCH;
2978
2979 inst_cream->S = BIT(inst, 20);
2980 inst_cream->Rm = BITS(inst, 0, 3);
2981 inst_cream->Rs = BITS(inst, 8, 11);
2982 inst_cream->RdHi = BITS(inst, 16, 19);
2983 inst_cream->RdLo = BITS(inst, 12, 15);
2984
2985 return inst_base;
2986}
2987static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index)
2988{
2989 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst));
2990 umull_inst *inst_cream = (umull_inst *)inst_base->component;
2991
2992 inst_base->cond = BITS(inst, 28, 31);
2993 inst_base->idx = index;
2994 inst_base->br = NON_BRANCH;
2995
2996 inst_cream->S = BIT(inst, 20);
2997 inst_cream->Rm = BITS(inst, 0, 3);
2998 inst_cream->Rs = BITS(inst, 8, 11);
2999 inst_cream->RdHi = BITS(inst, 16, 19);
3000 inst_cream->RdLo = BITS(inst, 12, 15);
3001
3002 return inst_base;
3003}
3004
3005static ARM_INST_PTR INTERPRETER_TRANSLATE(b_2_thumb)(unsigned int tinst, int index)
3006{
3007 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_2_thumb));
3008 b_2_thumb *inst_cream = (b_2_thumb *)inst_base->component;
3009
3010 inst_cream->imm = ((tinst & 0x3FF) << 1) | ((tinst & (1 << 10)) ? 0xFFFFF800 : 0);
3011
3012 inst_base->idx = index;
3013 inst_base->br = DIRECT_BRANCH;
3014
3015 return inst_base;
3016}
3017
3018static ARM_INST_PTR INTERPRETER_TRANSLATE(b_cond_thumb)(unsigned int tinst, int index)
3019{
3020 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_cond_thumb));
3021 b_cond_thumb *inst_cream = (b_cond_thumb *)inst_base->component;
3022
3023 inst_cream->imm = (((tinst & 0x7F) << 1) | ((tinst & (1 << 7)) ? 0xFFFFFF00 : 0));
3024 inst_cream->cond = ((tinst >> 8) & 0xf);
3025 inst_base->idx = index;
3026 inst_base->br = DIRECT_BRANCH;
3027
3028 return inst_base;
3029}
3030
3031static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_1_thumb)(unsigned int tinst, int index)
3032{
3033 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_1_thumb));
3034 bl_1_thumb *inst_cream = (bl_1_thumb *)inst_base->component;
3035
3036 inst_cream->imm = (((tinst & 0x07FF) << 12) | ((tinst & (1 << 10)) ? 0xFF800000 : 0));
3037
3038 inst_base->idx = index;
3039 inst_base->br = NON_BRANCH;
3040 return inst_base;
3041}
3042static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_2_thumb)(unsigned int tinst, int index)
3043{
3044 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_2_thumb));
3045 bl_2_thumb *inst_cream = (bl_2_thumb *)inst_base->component;
3046
3047 inst_cream->imm = (tinst & 0x07FF) << 1;
3048
3049 inst_base->idx = index;
3050 inst_base->br = DIRECT_BRANCH;
3051 return inst_base;
3052}
3053static ARM_INST_PTR INTERPRETER_TRANSLATE(blx_1_thumb)(unsigned int tinst, int index)
3054{
3055 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_1_thumb));
3056 blx_1_thumb *inst_cream = (blx_1_thumb *)inst_base->component;
3057
3058 inst_cream->imm = (tinst & 0x07FF) << 1;
3059 inst_cream->instr = tinst;
3060
3061 inst_base->idx = index;
3062 inst_base->br = DIRECT_BRANCH;
3063 return inst_base;
3064}
3065
3066static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index)
3067{
3068 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
3069 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
3070
3071 inst_base->cond = BITS(inst, 28, 31);
3072 inst_base->idx = index;
3073 inst_base->br = NON_BRANCH;
3074
3075 inst_cream->Rm = BITS(inst, 0, 3);
3076 inst_cream->Rn = BITS(inst, 16, 19);
3077 inst_cream->Rd = BITS(inst, 12, 15);
3078 inst_cream->op1 = BITS(inst, 20, 21);
3079 inst_cream->op2 = BITS(inst, 5, 7);
3080
3081 return inst_base;
3082}
3083static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index)
3084{
3085 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
3086}
3087static ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index)
3088{
3089 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
3090}
3091static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index)
3092{
3093 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
3094}
3095static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index)
3096{
3097 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
3098}
3099static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index)
3100{
3101 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
3102}
3103static ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index)
3104{
3105 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
3106 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
3107
3108 inst_base->cond = BITS(inst, 28, 31);
3109 inst_base->idx = index;
3110 inst_base->br = NON_BRANCH;
3111
3112 inst_cream->op1 = BITS(inst, 20, 24);
3113 inst_cream->op2 = BITS(inst, 5, 7);
3114 inst_cream->Rd = BITS(inst, 16, 19);
3115 inst_cream->Rm = BITS(inst, 8, 11);
3116 inst_cream->Rn = BITS(inst, 0, 3);
3117 inst_cream->Ra = BITS(inst, 12, 15);
3118
3119 return inst_base;
3120}
3121static ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index)
3122{
3123 return INTERPRETER_TRANSLATE(usada8)(inst, index);
3124}
3125static ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index)
3126{
3127 return INTERPRETER_TRANSLATE(ssat)(inst, index);
3128}
3129static ARM_INST_PTR INTERPRETER_TRANSLATE(usat16)(unsigned int inst, int index)
3130{
3131 return INTERPRETER_TRANSLATE(ssat16)(inst, index);
3132}
3133
3134static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index)
3135{
3136 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst));
3137 uxtab_inst* const inst_cream = (uxtab_inst*)inst_base->component;
3138
3139 inst_base->cond = BITS(inst, 28, 31);
3140 inst_base->idx = index;
3141 inst_base->br = NON_BRANCH;
3142
3143 inst_cream->Rm = BITS(inst, 0, 3);
3144 inst_cream->Rn = BITS(inst, 16, 19);
3145 inst_cream->Rd = BITS(inst, 12, 15);
3146 inst_cream->rotate = BITS(inst, 10, 11);
3147
3148 return inst_base;
3149}
3150static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb16)(unsigned int inst, int index)
3151{
3152 return INTERPRETER_TRANSLATE(uxtab16)(inst, index);
3153}
3154
3155static ARM_INST_PTR INTERPRETER_TRANSLATE(wfe)(unsigned int inst, int index)
3156{
3157 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
3158
3159 inst_base->cond = BITS(inst, 28, 31);
3160 inst_base->idx = index;
3161 inst_base->br = NON_BRANCH;
3162
3163 return inst_base;
3164}
3165static ARM_INST_PTR INTERPRETER_TRANSLATE(wfi)(unsigned int inst, int index)
3166{
3167 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
3168
3169 inst_base->cond = BITS(inst, 28, 31);
3170 inst_base->idx = index;
3171 inst_base->br = NON_BRANCH;
3172
3173 return inst_base;
3174}
3175static ARM_INST_PTR INTERPRETER_TRANSLATE(yield)(unsigned int inst, int index)
3176{
3177 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
3178
3179 inst_base->cond = BITS(inst, 28, 31);
3180 inst_base->idx = index;
3181 inst_base->br = NON_BRANCH;
3182
3183 return inst_base;
3184}
3185
3186// Floating point VFPv3 structures and instructions
3187
3188#define VFP_INTERPRETER_STRUCT
3189#include "core/arm/skyeye_common/vfp/vfpinstr.cpp"
3190#undef VFP_INTERPRETER_STRUCT
3191
3192#define VFP_INTERPRETER_TRANS
3193#include "core/arm/skyeye_common/vfp/vfpinstr.cpp"
3194#undef VFP_INTERPRETER_TRANS
3195
3196typedef ARM_INST_PTR (*transop_fp_t)(unsigned int, int); 756typedef ARM_INST_PTR (*transop_fp_t)(unsigned int, int);
3197 757
3198const transop_fp_t arm_instruction_trans[] = { 758#include "arm_dyncom_trans.inc"
3199 INTERPRETER_TRANSLATE(vmla),
3200 INTERPRETER_TRANSLATE(vmls),
3201 INTERPRETER_TRANSLATE(vnmla),
3202 INTERPRETER_TRANSLATE(vnmls),
3203 INTERPRETER_TRANSLATE(vnmul),
3204 INTERPRETER_TRANSLATE(vmul),
3205 INTERPRETER_TRANSLATE(vadd),
3206 INTERPRETER_TRANSLATE(vsub),
3207 INTERPRETER_TRANSLATE(vdiv),
3208 INTERPRETER_TRANSLATE(vmovi),
3209 INTERPRETER_TRANSLATE(vmovr),
3210 INTERPRETER_TRANSLATE(vabs),
3211 INTERPRETER_TRANSLATE(vneg),
3212 INTERPRETER_TRANSLATE(vsqrt),
3213 INTERPRETER_TRANSLATE(vcmp),
3214 INTERPRETER_TRANSLATE(vcmp2),
3215 INTERPRETER_TRANSLATE(vcvtbds),
3216 INTERPRETER_TRANSLATE(vcvtbff),
3217 INTERPRETER_TRANSLATE(vcvtbfi),
3218 INTERPRETER_TRANSLATE(vmovbrs),
3219 INTERPRETER_TRANSLATE(vmsr),
3220 INTERPRETER_TRANSLATE(vmovbrc),
3221 INTERPRETER_TRANSLATE(vmrs),
3222 INTERPRETER_TRANSLATE(vmovbcr),
3223 INTERPRETER_TRANSLATE(vmovbrrss),
3224 INTERPRETER_TRANSLATE(vmovbrrd),
3225 INTERPRETER_TRANSLATE(vstr),
3226 INTERPRETER_TRANSLATE(vpush),
3227 INTERPRETER_TRANSLATE(vstm),
3228 INTERPRETER_TRANSLATE(vpop),
3229 INTERPRETER_TRANSLATE(vldr),
3230 INTERPRETER_TRANSLATE(vldm),
3231
3232 INTERPRETER_TRANSLATE(srs),
3233 INTERPRETER_TRANSLATE(rfe),
3234 INTERPRETER_TRANSLATE(bkpt),
3235 INTERPRETER_TRANSLATE(blx),
3236 INTERPRETER_TRANSLATE(cps),
3237 INTERPRETER_TRANSLATE(pld),
3238 INTERPRETER_TRANSLATE(setend),
3239 INTERPRETER_TRANSLATE(clrex),
3240 INTERPRETER_TRANSLATE(rev16),
3241 INTERPRETER_TRANSLATE(usad8),
3242 INTERPRETER_TRANSLATE(sxtb),
3243 INTERPRETER_TRANSLATE(uxtb),
3244 INTERPRETER_TRANSLATE(sxth),
3245 INTERPRETER_TRANSLATE(sxtb16),
3246 INTERPRETER_TRANSLATE(uxth),
3247 INTERPRETER_TRANSLATE(uxtb16),
3248 INTERPRETER_TRANSLATE(cpy),
3249 INTERPRETER_TRANSLATE(uxtab),
3250 INTERPRETER_TRANSLATE(ssub8),
3251 INTERPRETER_TRANSLATE(shsub8),
3252 INTERPRETER_TRANSLATE(ssubaddx),
3253 INTERPRETER_TRANSLATE(strex),
3254 INTERPRETER_TRANSLATE(strexb),
3255 INTERPRETER_TRANSLATE(swp),
3256 INTERPRETER_TRANSLATE(swpb),
3257 INTERPRETER_TRANSLATE(ssub16),
3258 INTERPRETER_TRANSLATE(ssat16),
3259 INTERPRETER_TRANSLATE(shsubaddx),
3260 INTERPRETER_TRANSLATE(qsubaddx),
3261 INTERPRETER_TRANSLATE(shaddsubx),
3262 INTERPRETER_TRANSLATE(shadd8),
3263 INTERPRETER_TRANSLATE(shadd16),
3264 INTERPRETER_TRANSLATE(sel),
3265 INTERPRETER_TRANSLATE(saddsubx),
3266 INTERPRETER_TRANSLATE(sadd8),
3267 INTERPRETER_TRANSLATE(sadd16),
3268 INTERPRETER_TRANSLATE(shsub16),
3269 INTERPRETER_TRANSLATE(umaal),
3270 INTERPRETER_TRANSLATE(uxtab16),
3271 INTERPRETER_TRANSLATE(usubaddx),
3272 INTERPRETER_TRANSLATE(usub8),
3273 INTERPRETER_TRANSLATE(usub16),
3274 INTERPRETER_TRANSLATE(usat16),
3275 INTERPRETER_TRANSLATE(usada8),
3276 INTERPRETER_TRANSLATE(uqsubaddx),
3277 INTERPRETER_TRANSLATE(uqsub8),
3278 INTERPRETER_TRANSLATE(uqsub16),
3279 INTERPRETER_TRANSLATE(uqaddsubx),
3280 INTERPRETER_TRANSLATE(uqadd8),
3281 INTERPRETER_TRANSLATE(uqadd16),
3282 INTERPRETER_TRANSLATE(sxtab),
3283 INTERPRETER_TRANSLATE(uhsubaddx),
3284 INTERPRETER_TRANSLATE(uhsub8),
3285 INTERPRETER_TRANSLATE(uhsub16),
3286 INTERPRETER_TRANSLATE(uhaddsubx),
3287 INTERPRETER_TRANSLATE(uhadd8),
3288 INTERPRETER_TRANSLATE(uhadd16),
3289 INTERPRETER_TRANSLATE(uaddsubx),
3290 INTERPRETER_TRANSLATE(uadd8),
3291 INTERPRETER_TRANSLATE(uadd16),
3292 INTERPRETER_TRANSLATE(sxtah),
3293 INTERPRETER_TRANSLATE(sxtab16),
3294 INTERPRETER_TRANSLATE(qadd8),
3295 INTERPRETER_TRANSLATE(bxj),
3296 INTERPRETER_TRANSLATE(clz),
3297 INTERPRETER_TRANSLATE(uxtah),
3298 INTERPRETER_TRANSLATE(bx),
3299 INTERPRETER_TRANSLATE(rev),
3300 INTERPRETER_TRANSLATE(blx),
3301 INTERPRETER_TRANSLATE(revsh),
3302 INTERPRETER_TRANSLATE(qadd),
3303 INTERPRETER_TRANSLATE(qadd16),
3304 INTERPRETER_TRANSLATE(qaddsubx),
3305 INTERPRETER_TRANSLATE(ldrex),
3306 INTERPRETER_TRANSLATE(qdadd),
3307 INTERPRETER_TRANSLATE(qdsub),
3308 INTERPRETER_TRANSLATE(qsub),
3309 INTERPRETER_TRANSLATE(ldrexb),
3310 INTERPRETER_TRANSLATE(qsub8),
3311 INTERPRETER_TRANSLATE(qsub16),
3312 INTERPRETER_TRANSLATE(smuad),
3313 INTERPRETER_TRANSLATE(smmul),
3314 INTERPRETER_TRANSLATE(smusd),
3315 INTERPRETER_TRANSLATE(smlsd),
3316 INTERPRETER_TRANSLATE(smlsld),
3317 INTERPRETER_TRANSLATE(smmla),
3318 INTERPRETER_TRANSLATE(smmls),
3319 INTERPRETER_TRANSLATE(smlald),
3320 INTERPRETER_TRANSLATE(smlad),
3321 INTERPRETER_TRANSLATE(smlaw),
3322 INTERPRETER_TRANSLATE(smulw),
3323 INTERPRETER_TRANSLATE(pkhtb),
3324 INTERPRETER_TRANSLATE(pkhbt),
3325 INTERPRETER_TRANSLATE(smul),
3326 INTERPRETER_TRANSLATE(smlalxy),
3327 INTERPRETER_TRANSLATE(smla),
3328 INTERPRETER_TRANSLATE(mcrr),
3329 INTERPRETER_TRANSLATE(mrrc),
3330 INTERPRETER_TRANSLATE(cmp),
3331 INTERPRETER_TRANSLATE(tst),
3332 INTERPRETER_TRANSLATE(teq),
3333 INTERPRETER_TRANSLATE(cmn),
3334 INTERPRETER_TRANSLATE(smull),
3335 INTERPRETER_TRANSLATE(umull),
3336 INTERPRETER_TRANSLATE(umlal),
3337 INTERPRETER_TRANSLATE(smlal),
3338 INTERPRETER_TRANSLATE(mul),
3339 INTERPRETER_TRANSLATE(mla),
3340 INTERPRETER_TRANSLATE(ssat),
3341 INTERPRETER_TRANSLATE(usat),
3342 INTERPRETER_TRANSLATE(mrs),
3343 INTERPRETER_TRANSLATE(msr),
3344 INTERPRETER_TRANSLATE(and),
3345 INTERPRETER_TRANSLATE(bic),
3346 INTERPRETER_TRANSLATE(ldm),
3347 INTERPRETER_TRANSLATE(eor),
3348 INTERPRETER_TRANSLATE(add),
3349 INTERPRETER_TRANSLATE(rsb),
3350 INTERPRETER_TRANSLATE(rsc),
3351 INTERPRETER_TRANSLATE(sbc),
3352 INTERPRETER_TRANSLATE(adc),
3353 INTERPRETER_TRANSLATE(sub),
3354 INTERPRETER_TRANSLATE(orr),
3355 INTERPRETER_TRANSLATE(mvn),
3356 INTERPRETER_TRANSLATE(mov),
3357 INTERPRETER_TRANSLATE(stm),
3358 INTERPRETER_TRANSLATE(ldm),
3359 INTERPRETER_TRANSLATE(ldrsh),
3360 INTERPRETER_TRANSLATE(stm),
3361 INTERPRETER_TRANSLATE(ldm),
3362 INTERPRETER_TRANSLATE(ldrsb),
3363 INTERPRETER_TRANSLATE(strd),
3364 INTERPRETER_TRANSLATE(ldrh),
3365 INTERPRETER_TRANSLATE(strh),
3366 INTERPRETER_TRANSLATE(ldrd),
3367 INTERPRETER_TRANSLATE(strt),
3368 INTERPRETER_TRANSLATE(strbt),
3369 INTERPRETER_TRANSLATE(ldrbt),
3370 INTERPRETER_TRANSLATE(ldrt),
3371 INTERPRETER_TRANSLATE(mrc),
3372 INTERPRETER_TRANSLATE(mcr),
3373 INTERPRETER_TRANSLATE(msr),
3374 INTERPRETER_TRANSLATE(msr),
3375 INTERPRETER_TRANSLATE(msr),
3376 INTERPRETER_TRANSLATE(msr),
3377 INTERPRETER_TRANSLATE(msr),
3378 INTERPRETER_TRANSLATE(ldrb),
3379 INTERPRETER_TRANSLATE(strb),
3380 INTERPRETER_TRANSLATE(ldr),
3381 INTERPRETER_TRANSLATE(ldrcond),
3382 INTERPRETER_TRANSLATE(str),
3383 INTERPRETER_TRANSLATE(cdp),
3384 INTERPRETER_TRANSLATE(stc),
3385 INTERPRETER_TRANSLATE(ldc),
3386 INTERPRETER_TRANSLATE(ldrexd),
3387 INTERPRETER_TRANSLATE(strexd),
3388 INTERPRETER_TRANSLATE(ldrexh),
3389 INTERPRETER_TRANSLATE(strexh),
3390 INTERPRETER_TRANSLATE(nop),
3391 INTERPRETER_TRANSLATE(yield),
3392 INTERPRETER_TRANSLATE(wfe),
3393 INTERPRETER_TRANSLATE(wfi),
3394 INTERPRETER_TRANSLATE(sev),
3395 INTERPRETER_TRANSLATE(swi),
3396 INTERPRETER_TRANSLATE(bbl),
3397
3398 // All the thumb instructions should be placed the end of table
3399 INTERPRETER_TRANSLATE(b_2_thumb),
3400 INTERPRETER_TRANSLATE(b_cond_thumb),
3401 INTERPRETER_TRANSLATE(bl_1_thumb),
3402 INTERPRETER_TRANSLATE(bl_2_thumb),
3403 INTERPRETER_TRANSLATE(blx_1_thumb)
3404};
3405 759
3406enum { 760enum {
3407 FETCH_SUCCESS, 761 FETCH_SUCCESS,
diff --git a/src/core/arm/dyncom/arm_dyncom_trans.inc b/src/core/arm/dyncom/arm_dyncom_trans.inc
new file mode 100644
index 000000000..b4bf79240
--- /dev/null
+++ b/src/core/arm/dyncom/arm_dyncom_trans.inc
@@ -0,0 +1,2188 @@
1#define INTERPRETER_TRANSLATE(s) glue(InterpreterTranslate_, s)
2
3static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index)
4{
5 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(adc_inst));
6 adc_inst *inst_cream = (adc_inst *)inst_base->component;
7
8 inst_base->cond = BITS(inst, 28, 31);
9 inst_base->idx = index;
10 inst_base->br = NON_BRANCH;
11
12 inst_cream->I = BIT(inst, 25);
13 inst_cream->S = BIT(inst, 20);
14 inst_cream->Rn = BITS(inst, 16, 19);
15 inst_cream->Rd = BITS(inst, 12, 15);
16 inst_cream->shifter_operand = BITS(inst, 0, 11);
17 inst_cream->shtop_func = get_shtop(inst);
18
19 if (inst_cream->Rd == 15)
20 inst_base->br = INDIRECT_BRANCH;
21
22 return inst_base;
23}
24static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index)
25{
26 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(add_inst));
27 add_inst *inst_cream = (add_inst *)inst_base->component;
28
29 inst_base->cond = BITS(inst, 28, 31);
30 inst_base->idx = index;
31 inst_base->br = NON_BRANCH;
32
33 inst_cream->I = BIT(inst, 25);
34 inst_cream->S = BIT(inst, 20);
35 inst_cream->Rn = BITS(inst, 16, 19);
36 inst_cream->Rd = BITS(inst, 12, 15);
37 inst_cream->shifter_operand = BITS(inst, 0, 11);
38 inst_cream->shtop_func = get_shtop(inst);
39
40 if (inst_cream->Rd == 15)
41 inst_base->br = INDIRECT_BRANCH;
42
43 return inst_base;
44}
45static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index)
46{
47 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(and_inst));
48 and_inst *inst_cream = (and_inst *)inst_base->component;
49
50 inst_base->cond = BITS(inst, 28, 31);
51 inst_base->idx = index;
52 inst_base->br = NON_BRANCH;
53
54 inst_cream->I = BIT(inst, 25);
55 inst_cream->S = BIT(inst, 20);
56 inst_cream->Rn = BITS(inst, 16, 19);
57 inst_cream->Rd = BITS(inst, 12, 15);
58 inst_cream->shifter_operand = BITS(inst, 0, 11);
59 inst_cream->shtop_func = get_shtop(inst);
60
61 if (inst_cream->Rd == 15)
62 inst_base->br = INDIRECT_BRANCH;
63
64 return inst_base;
65}
66static ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index)
67{
68 #define POSBRANCH ((inst & 0x7fffff) << 2)
69 #define NEGBRANCH ((0xff000000 |(inst & 0xffffff)) << 2)
70
71 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bbl_inst));
72 bbl_inst *inst_cream = (bbl_inst *)inst_base->component;
73
74 inst_base->cond = BITS(inst, 28, 31);
75 inst_base->idx = index;
76 inst_base->br = DIRECT_BRANCH;
77
78 if (BIT(inst, 24))
79 inst_base->br = CALL;
80 if (BITS(inst, 28, 31) <= 0xe)
81 inst_base->br |= COND;
82
83 inst_cream->L = BIT(inst, 24);
84 inst_cream->signed_immed_24 = BIT(inst, 23) ? NEGBRANCH : POSBRANCH;
85
86 return inst_base;
87}
88static ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index)
89{
90 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bic_inst));
91 bic_inst *inst_cream = (bic_inst *)inst_base->component;
92
93 inst_base->cond = BITS(inst, 28, 31);
94 inst_base->idx = index;
95 inst_base->br = NON_BRANCH;
96
97 inst_cream->I = BIT(inst, 25);
98 inst_cream->S = BIT(inst, 20);
99 inst_cream->Rn = BITS(inst, 16, 19);
100 inst_cream->Rd = BITS(inst, 12, 15);
101 inst_cream->shifter_operand = BITS(inst, 0, 11);
102 inst_cream->shtop_func = get_shtop(inst);
103
104 if (inst_cream->Rd == 15)
105 inst_base->br = INDIRECT_BRANCH;
106 return inst_base;
107}
108
109static ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index)
110{
111 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(bkpt_inst));
112 bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component;
113
114 inst_base->cond = BITS(inst, 28, 31);
115 inst_base->idx = index;
116 inst_base->br = NON_BRANCH;
117
118 inst_cream->imm = (BITS(inst, 8, 19) << 4) | BITS(inst, 0, 3);
119
120 return inst_base;
121}
122
123static ARM_INST_PTR INTERPRETER_TRANSLATE(blx)(unsigned int inst, int index)
124{
125 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_inst));
126 blx_inst *inst_cream = (blx_inst *)inst_base->component;
127
128 inst_base->cond = BITS(inst, 28, 31);
129 inst_base->idx = index;
130 inst_base->br = INDIRECT_BRANCH;
131
132 inst_cream->inst = inst;
133 if (BITS(inst, 20, 27) == 0x12 && BITS(inst, 4, 7) == 0x3) {
134 inst_cream->val.Rm = BITS(inst, 0, 3);
135 } else {
136 inst_cream->val.signed_immed_24 = BITS(inst, 0, 23);
137 }
138
139 return inst_base;
140}
141static ARM_INST_PTR INTERPRETER_TRANSLATE(bx)(unsigned int inst, int index)
142{
143 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bx_inst));
144 bx_inst *inst_cream = (bx_inst *)inst_base->component;
145
146 inst_base->cond = BITS(inst, 28, 31);
147 inst_base->idx = index;
148 inst_base->br = INDIRECT_BRANCH;
149
150 inst_cream->Rm = BITS(inst, 0, 3);
151
152 return inst_base;
153}
154static ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index)
155{
156 return INTERPRETER_TRANSLATE(bx)(inst, index);
157}
158
159static ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index) {
160 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst));
161 cdp_inst *inst_cream = (cdp_inst *)inst_base->component;
162
163 inst_base->cond = BITS(inst, 28, 31);
164 inst_base->idx = index;
165 inst_base->br = NON_BRANCH;
166
167 inst_cream->CRm = BITS(inst, 0, 3);
168 inst_cream->CRd = BITS(inst, 12, 15);
169 inst_cream->CRn = BITS(inst, 16, 19);
170 inst_cream->cp_num = BITS(inst, 8, 11);
171 inst_cream->opcode_2 = BITS(inst, 5, 7);
172 inst_cream->opcode_1 = BITS(inst, 20, 23);
173 inst_cream->inst = inst;
174
175 LOG_TRACE(Core_ARM11, "inst %x index %x", inst, index);
176 return inst_base;
177}
178static ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index)
179{
180 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clrex_inst));
181 inst_base->cond = BITS(inst, 28, 31);
182 inst_base->idx = index;
183 inst_base->br = NON_BRANCH;
184
185 return inst_base;
186}
187static ARM_INST_PTR INTERPRETER_TRANSLATE(clz)(unsigned int inst, int index)
188{
189 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clz_inst));
190 clz_inst *inst_cream = (clz_inst *)inst_base->component;
191
192 inst_base->cond = BITS(inst, 28, 31);
193 inst_base->idx = index;
194 inst_base->br = NON_BRANCH;
195
196 inst_cream->Rm = BITS(inst, 0, 3);
197 inst_cream->Rd = BITS(inst, 12, 15);
198
199 return inst_base;
200}
201static ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index)
202{
203 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmn_inst));
204 cmn_inst *inst_cream = (cmn_inst *)inst_base->component;
205
206 inst_base->cond = BITS(inst, 28, 31);
207 inst_base->idx = index;
208 inst_base->br = NON_BRANCH;
209
210 inst_cream->I = BIT(inst, 25);
211 inst_cream->Rn = BITS(inst, 16, 19);
212 inst_cream->shifter_operand = BITS(inst, 0, 11);
213 inst_cream->shtop_func = get_shtop(inst);
214
215 return inst_base;
216}
217static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index)
218{
219 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmp_inst));
220 cmp_inst *inst_cream = (cmp_inst *)inst_base->component;
221
222 inst_base->cond = BITS(inst, 28, 31);
223 inst_base->idx = index;
224 inst_base->br = NON_BRANCH;
225
226 inst_cream->I = BIT(inst, 25);
227 inst_cream->Rn = BITS(inst, 16, 19);
228 inst_cream->shifter_operand = BITS(inst, 0, 11);
229 inst_cream->shtop_func = get_shtop(inst);
230
231 return inst_base;
232}
233static ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index)
234{
235 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cps_inst));
236 cps_inst *inst_cream = (cps_inst *)inst_base->component;
237
238 inst_base->cond = BITS(inst, 28, 31);
239 inst_base->idx = index;
240 inst_base->br = NON_BRANCH;
241
242 inst_cream->imod0 = BIT(inst, 18);
243 inst_cream->imod1 = BIT(inst, 19);
244 inst_cream->mmod = BIT(inst, 17);
245 inst_cream->A = BIT(inst, 8);
246 inst_cream->I = BIT(inst, 7);
247 inst_cream->F = BIT(inst, 6);
248 inst_cream->mode = BITS(inst, 0, 4);
249
250 return inst_base;
251}
252static ARM_INST_PTR INTERPRETER_TRANSLATE(cpy)(unsigned int inst, int index)
253{
254 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst));
255 mov_inst *inst_cream = (mov_inst *)inst_base->component;
256
257 inst_base->cond = BITS(inst, 28, 31);
258 inst_base->idx = index;
259 inst_base->br = NON_BRANCH;
260
261 inst_cream->I = BIT(inst, 25);
262 inst_cream->S = BIT(inst, 20);
263 inst_cream->Rd = BITS(inst, 12, 15);
264 inst_cream->shifter_operand = BITS(inst, 0, 11);
265 inst_cream->shtop_func = get_shtop(inst);
266
267 if (inst_cream->Rd == 15) {
268 inst_base->br = INDIRECT_BRANCH;
269 }
270 return inst_base;
271}
272static ARM_INST_PTR INTERPRETER_TRANSLATE(eor)(unsigned int inst, int index)
273{
274 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(eor_inst));
275 eor_inst *inst_cream = (eor_inst *)inst_base->component;
276
277 inst_base->cond = BITS(inst, 28, 31);
278 inst_base->idx = index;
279 inst_base->br = NON_BRANCH;
280
281 inst_cream->I = BIT(inst, 25);
282 inst_cream->S = BIT(inst, 20);
283 inst_cream->Rn = BITS(inst, 16, 19);
284 inst_cream->Rd = BITS(inst, 12, 15);
285 inst_cream->shifter_operand = BITS(inst, 0, 11);
286 inst_cream->shtop_func = get_shtop(inst);
287
288 if (inst_cream->Rd == 15)
289 inst_base->br = INDIRECT_BRANCH;
290
291 return inst_base;
292}
293static ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index)
294{
295 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldc_inst));
296 inst_base->cond = BITS(inst, 28, 31);
297 inst_base->idx = index;
298 inst_base->br = NON_BRANCH;
299
300 return inst_base;
301}
302static ARM_INST_PTR INTERPRETER_TRANSLATE(ldm)(unsigned int inst, int index)
303{
304 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
305 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
306
307 inst_base->cond = BITS(inst, 28, 31);
308 inst_base->idx = index;
309 inst_base->br = NON_BRANCH;
310
311 inst_cream->inst = inst;
312 inst_cream->get_addr = get_calc_addr_op(inst);
313
314 if (BIT(inst, 15)) {
315 inst_base->br = INDIRECT_BRANCH;
316 }
317 return inst_base;
318}
319static ARM_INST_PTR INTERPRETER_TRANSLATE(sxth)(unsigned int inst, int index)
320{
321 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst));
322 sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component;
323
324 inst_base->cond = BITS(inst, 28, 31);
325 inst_base->idx = index;
326 inst_base->br = NON_BRANCH;
327
328 inst_cream->Rd = BITS(inst, 12, 15);
329 inst_cream->Rm = BITS(inst, 0, 3);
330 inst_cream->rotate = BITS(inst, 10, 11);
331
332 return inst_base;
333}
334static ARM_INST_PTR INTERPRETER_TRANSLATE(ldr)(unsigned int inst, int index)
335{
336 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
337 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
338
339 inst_base->cond = BITS(inst, 28, 31);
340 inst_base->idx = index;
341 inst_base->br = NON_BRANCH;
342
343 inst_cream->inst = inst;
344 inst_cream->get_addr = get_calc_addr_op(inst);
345
346 if (BITS(inst, 12, 15) == 15)
347 inst_base->br = INDIRECT_BRANCH;
348
349 return inst_base;
350}
351
352static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrcond)(unsigned int inst, int index)
353{
354 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
355 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
356
357 inst_base->cond = BITS(inst, 28, 31);
358 inst_base->idx = index;
359 inst_base->br = NON_BRANCH;
360
361 inst_cream->inst = inst;
362 inst_cream->get_addr = get_calc_addr_op(inst);
363
364 if (BITS(inst, 12, 15) == 15)
365 inst_base->br = INDIRECT_BRANCH;
366
367 return inst_base;
368}
369
370static ARM_INST_PTR INTERPRETER_TRANSLATE(uxth)(unsigned int inst, int index)
371{
372 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst));
373 uxth_inst *inst_cream = (uxth_inst *)inst_base->component;
374
375 inst_base->cond = BITS(inst, 28, 31);
376 inst_base->idx = index;
377 inst_base->br = NON_BRANCH;
378
379 inst_cream->Rd = BITS(inst, 12, 15);
380 inst_cream->rotate = BITS(inst, 10, 11);
381 inst_cream->Rm = BITS(inst, 0, 3);
382
383 return inst_base;
384}
385static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtah)(unsigned int inst, int index)
386{
387 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtah_inst));
388 uxtah_inst *inst_cream = (uxtah_inst *)inst_base->component;
389
390 inst_base->cond = BITS(inst, 28, 31);
391 inst_base->idx = index;
392 inst_base->br = NON_BRANCH;
393
394 inst_cream->Rn = BITS(inst, 16, 19);
395 inst_cream->Rd = BITS(inst, 12, 15);
396 inst_cream->rotate = BITS(inst, 10, 11);
397 inst_cream->Rm = BITS(inst, 0, 3);
398
399 return inst_base;
400}
401static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrb)(unsigned int inst, int index)
402{
403 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
404 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
405
406 inst_base->cond = BITS(inst, 28, 31);
407 inst_base->idx = index;
408 inst_base->br = NON_BRANCH;
409
410 inst_cream->inst = inst;
411 inst_cream->get_addr = get_calc_addr_op(inst);
412
413 return inst_base;
414}
415static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index)
416{
417 arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
418 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
419
420 inst_base->cond = BITS(inst, 28, 31);
421 inst_base->idx = index;
422 inst_base->br = NON_BRANCH;
423
424 inst_cream->inst = inst;
425 if (BITS(inst, 25, 27) == 2) {
426 inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
427 } else if (BITS(inst, 25, 27) == 3) {
428 inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
429 } else {
430 DEBUG_MSG;
431 }
432
433 return inst_base;
434}
435static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrd)(unsigned int inst, int index)
436{
437 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
438 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
439
440 inst_base->cond = BITS(inst, 28, 31);
441 inst_base->idx = index;
442 inst_base->br = NON_BRANCH;
443
444 inst_cream->inst = inst;
445 inst_cream->get_addr = get_calc_addr_op(inst);
446
447 return inst_base;
448}
449static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrex)(unsigned int inst, int index)
450{
451 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
452 generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component;
453
454 inst_base->cond = BITS(inst, 28, 31);
455 inst_base->idx = index;
456 inst_base->br = (BITS(inst, 12, 15) == 15) ? INDIRECT_BRANCH : NON_BRANCH; // Branch if dest is R15
457
458 inst_cream->Rn = BITS(inst, 16, 19);
459 inst_cream->Rd = BITS(inst, 12, 15);
460
461 return inst_base;
462}
463static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexb)(unsigned int inst, int index)
464{
465 return INTERPRETER_TRANSLATE(ldrex)(inst, index);
466}
467static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexh)(unsigned int inst, int index)
468{
469 return INTERPRETER_TRANSLATE(ldrex)(inst, index);
470}
471static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexd)(unsigned int inst, int index)
472{
473 return INTERPRETER_TRANSLATE(ldrex)(inst, index);
474}
475static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrh)(unsigned int inst, int index)
476{
477 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
478 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
479
480 inst_base->cond = BITS(inst, 28, 31);
481 inst_base->idx = index;
482 inst_base->br = NON_BRANCH;
483
484 inst_cream->inst = inst;
485 inst_cream->get_addr = get_calc_addr_op(inst);
486
487 return inst_base;
488}
489static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsb)(unsigned int inst, int index)
490{
491 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
492 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
493
494 inst_base->cond = BITS(inst, 28, 31);
495 inst_base->idx = index;
496 inst_base->br = NON_BRANCH;
497
498 inst_cream->inst = inst;
499 inst_cream->get_addr = get_calc_addr_op(inst);
500
501 return inst_base;
502}
503static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsh)(unsigned int inst, int index)
504{
505 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
506 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
507
508 inst_base->cond = BITS(inst, 28, 31);
509 inst_base->idx = index;
510 inst_base->br = NON_BRANCH;
511
512 inst_cream->inst = inst;
513 inst_cream->get_addr = get_calc_addr_op(inst);
514
515 return inst_base;
516}
517static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrt)(unsigned int inst, int index)
518{
519 arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
520 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
521
522 inst_base->cond = BITS(inst, 28, 31);
523 inst_base->idx = index;
524 inst_base->br = NON_BRANCH;
525
526 inst_cream->inst = inst;
527 if (BITS(inst, 25, 27) == 2) {
528 inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
529 } else if (BITS(inst, 25, 27) == 3) {
530 inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
531 } else {
532 // Reaching this would indicate the thumb version
533 // of this instruction, however the 3DS CPU doesn't
534 // support this variant (the 3DS CPU is only ARMv6K,
535 // while this variant is added in ARMv6T2).
536 // So it's sufficient for citra to not implement this.
537 DEBUG_MSG;
538 }
539
540 if (BITS(inst, 12, 15) == 15) {
541 inst_base->br = INDIRECT_BRANCH;
542 }
543 return inst_base;
544}
545static ARM_INST_PTR INTERPRETER_TRANSLATE(mcr)(unsigned int inst, int index)
546{
547 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mcr_inst));
548 mcr_inst *inst_cream = (mcr_inst *)inst_base->component;
549 inst_base->cond = BITS(inst, 28, 31);
550 inst_base->idx = index;
551 inst_base->br = NON_BRANCH;
552
553 inst_cream->crn = BITS(inst, 16, 19);
554 inst_cream->crm = BITS(inst, 0, 3);
555 inst_cream->opcode_1 = BITS(inst, 21, 23);
556 inst_cream->opcode_2 = BITS(inst, 5, 7);
557 inst_cream->Rd = BITS(inst, 12, 15);
558 inst_cream->cp_num = BITS(inst, 8, 11);
559 inst_cream->inst = inst;
560 return inst_base;
561}
562
563static ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index)
564{
565 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(mcrr_inst));
566 mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component;
567
568 inst_base->cond = BITS(inst, 28, 31);
569 inst_base->idx = index;
570 inst_base->br = NON_BRANCH;
571
572 inst_cream->crm = BITS(inst, 0, 3);
573 inst_cream->opcode_1 = BITS(inst, 4, 7);
574 inst_cream->cp_num = BITS(inst, 8, 11);
575 inst_cream->rt = BITS(inst, 12, 15);
576 inst_cream->rt2 = BITS(inst, 16, 19);
577
578 return inst_base;
579}
580
581static ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index)
582{
583 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mla_inst));
584 mla_inst *inst_cream = (mla_inst *)inst_base->component;
585
586 inst_base->cond = BITS(inst, 28, 31);
587 inst_base->idx = index;
588 inst_base->br = NON_BRANCH;
589
590 inst_cream->S = BIT(inst, 20);
591 inst_cream->Rn = BITS(inst, 12, 15);
592 inst_cream->Rd = BITS(inst, 16, 19);
593 inst_cream->Rs = BITS(inst, 8, 11);
594 inst_cream->Rm = BITS(inst, 0, 3);
595
596 return inst_base;
597}
598static ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index)
599{
600 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst));
601 mov_inst *inst_cream = (mov_inst *)inst_base->component;
602
603 inst_base->cond = BITS(inst, 28, 31);
604 inst_base->idx = index;
605 inst_base->br = NON_BRANCH;
606
607 inst_cream->I = BIT(inst, 25);
608 inst_cream->S = BIT(inst, 20);
609 inst_cream->Rd = BITS(inst, 12, 15);
610 inst_cream->shifter_operand = BITS(inst, 0, 11);
611 inst_cream->shtop_func = get_shtop(inst);
612
613 if (inst_cream->Rd == 15) {
614 inst_base->br = INDIRECT_BRANCH;
615 }
616 return inst_base;
617}
618static ARM_INST_PTR INTERPRETER_TRANSLATE(mrc)(unsigned int inst, int index)
619{
620 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrc_inst));
621 mrc_inst *inst_cream = (mrc_inst *)inst_base->component;
622 inst_base->cond = BITS(inst, 28, 31);
623 inst_base->idx = index;
624 inst_base->br = NON_BRANCH;
625
626 inst_cream->crn = BITS(inst, 16, 19);
627 inst_cream->crm = BITS(inst, 0, 3);
628 inst_cream->opcode_1 = BITS(inst, 21, 23);
629 inst_cream->opcode_2 = BITS(inst, 5, 7);
630 inst_cream->Rd = BITS(inst, 12, 15);
631 inst_cream->cp_num = BITS(inst, 8, 11);
632 inst_cream->inst = inst;
633 return inst_base;
634}
635
636static ARM_INST_PTR INTERPRETER_TRANSLATE(mrrc)(unsigned int inst, int index)
637{
638 return INTERPRETER_TRANSLATE(mcrr)(inst, index);
639}
640
641static ARM_INST_PTR INTERPRETER_TRANSLATE(mrs)(unsigned int inst, int index)
642{
643 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrs_inst));
644 mrs_inst *inst_cream = (mrs_inst *)inst_base->component;
645
646 inst_base->cond = BITS(inst, 28, 31);
647 inst_base->idx = index;
648 inst_base->br = NON_BRANCH;
649
650 inst_cream->Rd = BITS(inst, 12, 15);
651 inst_cream->R = BIT(inst, 22);
652
653 return inst_base;
654}
655static ARM_INST_PTR INTERPRETER_TRANSLATE(msr)(unsigned int inst, int index)
656{
657 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(msr_inst));
658 msr_inst *inst_cream = (msr_inst *)inst_base->component;
659
660 inst_base->cond = BITS(inst, 28, 31);
661 inst_base->idx = index;
662 inst_base->br = NON_BRANCH;
663
664 inst_cream->field_mask = BITS(inst, 16, 19);
665 inst_cream->R = BIT(inst, 22);
666 inst_cream->inst = inst;
667
668 return inst_base;
669}
670static ARM_INST_PTR INTERPRETER_TRANSLATE(mul)(unsigned int inst, int index)
671{
672 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mul_inst));
673 mul_inst *inst_cream = (mul_inst *)inst_base->component;
674
675 inst_base->cond = BITS(inst, 28, 31);
676 inst_base->idx = index;
677 inst_base->br = NON_BRANCH;
678
679 inst_cream->S = BIT(inst, 20);
680 inst_cream->Rm = BITS(inst, 0, 3);
681 inst_cream->Rs = BITS(inst, 8, 11);
682 inst_cream->Rd = BITS(inst, 16, 19);
683
684 return inst_base;
685}
686static ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index)
687{
688 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mvn_inst));
689 mvn_inst *inst_cream = (mvn_inst *)inst_base->component;
690
691 inst_base->cond = BITS(inst, 28, 31);
692 inst_base->idx = index;
693 inst_base->br = NON_BRANCH;
694
695 inst_cream->I = BIT(inst, 25);
696 inst_cream->S = BIT(inst, 20);
697 inst_cream->Rd = BITS(inst, 12, 15);
698 inst_cream->shifter_operand = BITS(inst, 0, 11);
699 inst_cream->shtop_func = get_shtop(inst);
700
701 if (inst_cream->Rd == 15) {
702 inst_base->br = INDIRECT_BRANCH;
703 }
704 return inst_base;
705
706}
707static ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index)
708{
709 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(orr_inst));
710 orr_inst *inst_cream = (orr_inst *)inst_base->component;
711
712 inst_base->cond = BITS(inst, 28, 31);
713 inst_base->idx = index;
714 inst_base->br = NON_BRANCH;
715
716 inst_cream->I = BIT(inst, 25);
717 inst_cream->S = BIT(inst, 20);
718 inst_cream->Rd = BITS(inst, 12, 15);
719 inst_cream->Rn = BITS(inst, 16, 19);
720 inst_cream->shifter_operand = BITS(inst, 0, 11);
721 inst_cream->shtop_func = get_shtop(inst);
722
723 if (inst_cream->Rd == 15)
724 inst_base->br = INDIRECT_BRANCH;
725
726 return inst_base;
727}
728
729// NOP introduced in ARMv6K.
730static ARM_INST_PTR INTERPRETER_TRANSLATE(nop)(unsigned int inst, int index)
731{
732 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
733
734 inst_base->cond = BITS(inst, 28, 31);
735 inst_base->idx = index;
736 inst_base->br = NON_BRANCH;
737
738 return inst_base;
739}
740
741static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index)
742{
743 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pkh_inst));
744 pkh_inst *inst_cream = (pkh_inst *)inst_base->component;
745
746 inst_base->cond = BITS(inst, 28, 31);
747 inst_base->idx = index;
748 inst_base->br = NON_BRANCH;
749
750 inst_cream->Rd = BITS(inst, 12, 15);
751 inst_cream->Rn = BITS(inst, 16, 19);
752 inst_cream->Rm = BITS(inst, 0, 3);
753 inst_cream->imm = BITS(inst, 7, 11);
754
755 return inst_base;
756}
757
758static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index)
759{
760 return INTERPRETER_TRANSLATE(pkhbt)(inst, index);
761}
762
763static ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index)
764{
765 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst));
766
767 inst_base->cond = BITS(inst, 28, 31);
768 inst_base->idx = index;
769 inst_base->br = NON_BRANCH;
770
771 return inst_base;
772}
773
774static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index)
775{
776 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
777 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
778
779 inst_base->cond = BITS(inst, 28, 31);
780 inst_base->idx = index;
781 inst_base->br = NON_BRANCH;
782
783 inst_cream->op1 = BITS(inst, 21, 22);
784 inst_cream->Rm = BITS(inst, 0, 3);
785 inst_cream->Rn = BITS(inst, 16, 19);
786 inst_cream->Rd = BITS(inst, 12, 15);
787
788 return inst_base;
789}
790static ARM_INST_PTR INTERPRETER_TRANSLATE(qdadd)(unsigned int inst, int index)
791{
792 return INTERPRETER_TRANSLATE(qadd)(inst, index);
793}
794static ARM_INST_PTR INTERPRETER_TRANSLATE(qdsub)(unsigned int inst, int index)
795{
796 return INTERPRETER_TRANSLATE(qadd)(inst, index);
797}
798static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub)(unsigned int inst, int index)
799{
800 return INTERPRETER_TRANSLATE(qadd)(inst, index);
801}
802
803static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index)
804{
805 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
806 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
807
808 inst_base->cond = BITS(inst, 28, 31);
809 inst_base->idx = index;
810 inst_base->br = NON_BRANCH;
811
812 inst_cream->Rm = BITS(inst, 0, 3);
813 inst_cream->Rn = BITS(inst, 16, 19);
814 inst_cream->Rd = BITS(inst, 12, 15);
815 inst_cream->op1 = BITS(inst, 20, 21);
816 inst_cream->op2 = BITS(inst, 5, 7);
817
818 return inst_base;
819}
820static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index)
821{
822 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
823}
824static ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index)
825{
826 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
827}
828static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub8)(unsigned int inst, int index)
829{
830 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
831}
832static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index)
833{
834 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
835}
836static ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index)
837{
838 return INTERPRETER_TRANSLATE(qadd8)(inst, index);
839}
840
841static ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index)
842{
843 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(rev_inst));
844 rev_inst* const inst_cream = (rev_inst*)inst_base->component;
845
846 inst_base->cond = BITS(inst, 28, 31);
847 inst_base->idx = index;
848 inst_base->br = NON_BRANCH;
849
850 inst_cream->Rm = BITS(inst, 0, 3);
851 inst_cream->Rd = BITS(inst, 12, 15);
852 inst_cream->op1 = BITS(inst, 20, 22);
853 inst_cream->op2 = BITS(inst, 5, 7);
854
855 return inst_base;
856}
857static ARM_INST_PTR INTERPRETER_TRANSLATE(rev16)(unsigned int inst, int index)
858{
859 return INTERPRETER_TRANSLATE(rev)(inst, index);
860}
861static ARM_INST_PTR INTERPRETER_TRANSLATE(revsh)(unsigned int inst, int index)
862{
863 return INTERPRETER_TRANSLATE(rev)(inst, index);
864}
865
866static ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index)
867{
868 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
869 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
870
871 inst_base->cond = AL;
872 inst_base->idx = index;
873 inst_base->br = INDIRECT_BRANCH;
874
875 inst_cream->inst = inst;
876 inst_cream->get_addr = get_calc_addr_op(inst);
877
878 return inst_base;
879}
880
881static ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index)
882{
883 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsb_inst));
884 rsb_inst *inst_cream = (rsb_inst *)inst_base->component;
885
886 inst_base->cond = BITS(inst, 28, 31);
887 inst_base->idx = index;
888 inst_base->br = NON_BRANCH;
889
890 inst_cream->I = BIT(inst, 25);
891 inst_cream->S = BIT(inst, 20);
892 inst_cream->Rn = BITS(inst, 16, 19);
893 inst_cream->Rd = BITS(inst, 12, 15);
894 inst_cream->shifter_operand = BITS(inst, 0, 11);
895 inst_cream->shtop_func = get_shtop(inst);
896
897 if (inst_cream->Rd == 15)
898 inst_base->br = INDIRECT_BRANCH;
899
900 return inst_base;
901}
902static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index)
903{
904 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsc_inst));
905 rsc_inst *inst_cream = (rsc_inst *)inst_base->component;
906
907 inst_base->cond = BITS(inst, 28, 31);
908 inst_base->idx = index;
909 inst_base->br = NON_BRANCH;
910
911 inst_cream->I = BIT(inst, 25);
912 inst_cream->S = BIT(inst, 20);
913 inst_cream->Rn = BITS(inst, 16, 19);
914 inst_cream->Rd = BITS(inst, 12, 15);
915 inst_cream->shifter_operand = BITS(inst, 0, 11);
916 inst_cream->shtop_func = get_shtop(inst);
917
918 if (inst_cream->Rd == 15)
919 inst_base->br = INDIRECT_BRANCH;
920
921 return inst_base;
922}
923static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index)
924{
925 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
926 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
927
928 inst_base->cond = BITS(inst, 28, 31);
929 inst_base->idx = index;
930 inst_base->br = NON_BRANCH;
931
932 inst_cream->Rm = BITS(inst, 0, 3);
933 inst_cream->Rn = BITS(inst, 16, 19);
934 inst_cream->Rd = BITS(inst, 12, 15);
935 inst_cream->op1 = BITS(inst, 20, 21);
936 inst_cream->op2 = BITS(inst, 5, 7);
937
938 return inst_base;
939}
940static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index)
941{
942 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
943}
944static ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index)
945{
946 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
947}
948static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub8)(unsigned int inst, int index)
949{
950 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
951}
952static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index)
953{
954 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
955}
956static ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index)
957{
958 return INTERPRETER_TRANSLATE(sadd8)(inst, index);
959}
960
961static ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index)
962{
963 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sbc_inst));
964 sbc_inst *inst_cream = (sbc_inst *)inst_base->component;
965
966 inst_base->cond = BITS(inst, 28, 31);
967 inst_base->idx = index;
968 inst_base->br = NON_BRANCH;
969
970 inst_cream->I = BIT(inst, 25);
971 inst_cream->S = BIT(inst, 20);
972 inst_cream->Rn = BITS(inst, 16, 19);
973 inst_cream->Rd = BITS(inst, 12, 15);
974 inst_cream->shifter_operand = BITS(inst, 0, 11);
975 inst_cream->shtop_func = get_shtop(inst);
976
977 if (inst_cream->Rd == 15)
978 inst_base->br = INDIRECT_BRANCH;
979
980 return inst_base;
981}
982static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index)
983{
984 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
985 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
986
987 inst_base->cond = BITS(inst, 28, 31);
988 inst_base->idx = index;
989 inst_base->br = NON_BRANCH;
990
991 inst_cream->Rm = BITS(inst, 0, 3);
992 inst_cream->Rn = BITS(inst, 16, 19);
993 inst_cream->Rd = BITS(inst, 12, 15);
994 inst_cream->op1 = BITS(inst, 20, 22);
995 inst_cream->op2 = BITS(inst, 5, 7);
996
997 return inst_base;
998}
999
1000static ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index)
1001{
1002 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(setend_inst));
1003 setend_inst* const inst_cream = (setend_inst*)inst_base->component;
1004
1005 inst_base->cond = AL;
1006 inst_base->idx = index;
1007 inst_base->br = NON_BRANCH;
1008
1009 inst_cream->set_bigend = BIT(inst, 9);
1010
1011 return inst_base;
1012}
1013
1014static ARM_INST_PTR INTERPRETER_TRANSLATE(sev)(unsigned int inst, int index)
1015{
1016 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
1017
1018 inst_base->cond = BITS(inst, 28, 31);
1019 inst_base->idx = index;
1020 inst_base->br = NON_BRANCH;
1021
1022 return inst_base;
1023}
1024
1025static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index)
1026{
1027 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
1028 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
1029
1030 inst_base->cond = BITS(inst, 28, 31);
1031 inst_base->idx = index;
1032 inst_base->br = NON_BRANCH;
1033
1034 inst_cream->op1 = BITS(inst, 20, 21);
1035 inst_cream->op2 = BITS(inst, 5, 7);
1036 inst_cream->Rm = BITS(inst, 0, 3);
1037 inst_cream->Rn = BITS(inst, 16, 19);
1038 inst_cream->Rd = BITS(inst, 12, 15);
1039
1040 return inst_base;
1041}
1042static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd16)(unsigned int inst, int index)
1043{
1044 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
1045}
1046static ARM_INST_PTR INTERPRETER_TRANSLATE(shaddsubx)(unsigned int inst, int index)
1047{
1048 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
1049}
1050static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub8)(unsigned int inst, int index)
1051{
1052 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
1053}
1054static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub16)(unsigned int inst, int index)
1055{
1056 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
1057}
1058static ARM_INST_PTR INTERPRETER_TRANSLATE(shsubaddx)(unsigned int inst, int index)
1059{
1060 return INTERPRETER_TRANSLATE(shadd8)(inst, index);
1061}
1062
1063static ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index)
1064{
1065 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smla_inst));
1066 smla_inst *inst_cream = (smla_inst *)inst_base->component;
1067
1068 inst_base->cond = BITS(inst, 28, 31);
1069 inst_base->idx = index;
1070 inst_base->br = NON_BRANCH;
1071
1072 inst_cream->x = BIT(inst, 5);
1073 inst_cream->y = BIT(inst, 6);
1074 inst_cream->Rm = BITS(inst, 0, 3);
1075 inst_cream->Rs = BITS(inst, 8, 11);
1076 inst_cream->Rd = BITS(inst, 16, 19);
1077 inst_cream->Rn = BITS(inst, 12, 15);
1078
1079 return inst_base;
1080}
1081
1082static ARM_INST_PTR INTERPRETER_TRANSLATE(smlad)(unsigned int inst, int index)
1083{
1084 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
1085 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
1086
1087 inst_base->cond = BITS(inst, 28, 31);
1088 inst_base->idx = index;
1089 inst_base->br = NON_BRANCH;
1090
1091 inst_cream->m = BIT(inst, 5);
1092 inst_cream->Rn = BITS(inst, 0, 3);
1093 inst_cream->Rm = BITS(inst, 8, 11);
1094 inst_cream->Rd = BITS(inst, 16, 19);
1095 inst_cream->Ra = BITS(inst, 12, 15);
1096 inst_cream->op1 = BITS(inst, 20, 22);
1097 inst_cream->op2 = BITS(inst, 5, 7);
1098
1099 return inst_base;
1100}
1101static ARM_INST_PTR INTERPRETER_TRANSLATE(smuad)(unsigned int inst, int index)
1102{
1103 return INTERPRETER_TRANSLATE(smlad)(inst, index);
1104}
1105static ARM_INST_PTR INTERPRETER_TRANSLATE(smusd)(unsigned int inst, int index)
1106{
1107 return INTERPRETER_TRANSLATE(smlad)(inst, index);
1108}
1109static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsd)(unsigned int inst, int index)
1110{
1111 return INTERPRETER_TRANSLATE(smlad)(inst, index);
1112}
1113
1114static ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index)
1115{
1116 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst));
1117 umlal_inst *inst_cream = (umlal_inst *)inst_base->component;
1118
1119 inst_base->cond = BITS(inst, 28, 31);
1120 inst_base->idx = index;
1121 inst_base->br = NON_BRANCH;
1122
1123 inst_cream->S = BIT(inst, 20);
1124 inst_cream->Rm = BITS(inst, 0, 3);
1125 inst_cream->Rs = BITS(inst, 8, 11);
1126 inst_cream->RdHi = BITS(inst, 16, 19);
1127 inst_cream->RdLo = BITS(inst, 12, 15);
1128
1129 return inst_base;
1130}
1131
1132static ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index)
1133{
1134 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlalxy_inst));
1135 smlalxy_inst* const inst_cream = (smlalxy_inst*)inst_base->component;
1136
1137 inst_base->cond = BITS(inst, 28, 31);
1138 inst_base->idx = index;
1139 inst_base->br = NON_BRANCH;
1140
1141 inst_cream->x = BIT(inst, 5);
1142 inst_cream->y = BIT(inst, 6);
1143 inst_cream->RdLo = BITS(inst, 12, 15);
1144 inst_cream->RdHi = BITS(inst, 16, 19);
1145 inst_cream->Rn = BITS(inst, 0, 4);
1146 inst_cream->Rm = BITS(inst, 8, 11);
1147
1148 return inst_base;
1149}
1150
1151static ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index)
1152{
1153 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
1154 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
1155
1156 inst_base->cond = BITS(inst, 28, 31);
1157 inst_base->idx = index;
1158 inst_base->br = NON_BRANCH;
1159
1160 inst_cream->Ra = BITS(inst, 12, 15);
1161 inst_cream->Rm = BITS(inst, 8, 11);
1162 inst_cream->Rn = BITS(inst, 0, 3);
1163 inst_cream->Rd = BITS(inst, 16, 19);
1164 inst_cream->m = BIT(inst, 6);
1165
1166 return inst_base;
1167}
1168
1169static ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index)
1170{
1171 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlald_inst));
1172 smlald_inst* const inst_cream = (smlald_inst*)inst_base->component;
1173
1174 inst_base->cond = BITS(inst, 28, 31);
1175 inst_base->idx = index;
1176 inst_base->br = NON_BRANCH;
1177
1178 inst_cream->Rm = BITS(inst, 8, 11);
1179 inst_cream->Rn = BITS(inst, 0, 3);
1180 inst_cream->RdLo = BITS(inst, 12, 15);
1181 inst_cream->RdHi = BITS(inst, 16, 19);
1182 inst_cream->swap = BIT(inst, 5);
1183 inst_cream->op1 = BITS(inst, 20, 22);
1184 inst_cream->op2 = BITS(inst, 5, 7);
1185
1186 return inst_base;
1187}
1188static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsld)(unsigned int inst, int index)
1189{
1190 return INTERPRETER_TRANSLATE(smlald)(inst, index);
1191}
1192
1193static ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index)
1194{
1195 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
1196 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
1197
1198 inst_base->cond = BITS(inst, 28, 31);
1199 inst_base->idx = index;
1200 inst_base->br = NON_BRANCH;
1201
1202 inst_cream->m = BIT(inst, 5);
1203 inst_cream->Ra = BITS(inst, 12, 15);
1204 inst_cream->Rm = BITS(inst, 8, 11);
1205 inst_cream->Rn = BITS(inst, 0, 3);
1206 inst_cream->Rd = BITS(inst, 16, 19);
1207 inst_cream->op1 = BITS(inst, 20, 22);
1208 inst_cream->op2 = BITS(inst, 5, 7);
1209
1210 return inst_base;
1211}
1212static ARM_INST_PTR INTERPRETER_TRANSLATE(smmls)(unsigned int inst, int index)
1213{
1214 return INTERPRETER_TRANSLATE(smmla)(inst, index);
1215}
1216static ARM_INST_PTR INTERPRETER_TRANSLATE(smmul)(unsigned int inst, int index)
1217{
1218 return INTERPRETER_TRANSLATE(smmla)(inst, index);
1219}
1220
1221static ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index)
1222{
1223 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smul_inst));
1224 smul_inst *inst_cream = (smul_inst *)inst_base->component;
1225
1226 inst_base->cond = BITS(inst, 28, 31);
1227 inst_base->idx = index;
1228 inst_base->br = NON_BRANCH;
1229
1230 inst_cream->Rd = BITS(inst, 16, 19);
1231 inst_cream->Rs = BITS(inst, 8, 11);
1232 inst_cream->Rm = BITS(inst, 0, 3);
1233
1234 inst_cream->x = BIT(inst, 5);
1235 inst_cream->y = BIT(inst, 6);
1236
1237 return inst_base;
1238
1239}
1240static ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index)
1241{
1242 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst));
1243 umull_inst *inst_cream = (umull_inst *)inst_base->component;
1244
1245 inst_base->cond = BITS(inst, 28, 31);
1246 inst_base->idx = index;
1247 inst_base->br = NON_BRANCH;
1248
1249 inst_cream->S = BIT(inst, 20);
1250 inst_cream->Rm = BITS(inst, 0, 3);
1251 inst_cream->Rs = BITS(inst, 8, 11);
1252 inst_cream->RdHi = BITS(inst, 16, 19);
1253 inst_cream->RdLo = BITS(inst, 12, 15);
1254
1255 return inst_base;
1256}
1257
1258static ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index)
1259{
1260 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
1261 smlad_inst *inst_cream = (smlad_inst *)inst_base->component;
1262
1263 inst_base->cond = BITS(inst, 28, 31);
1264 inst_base->idx = index;
1265 inst_base->br = NON_BRANCH;
1266
1267 inst_cream->m = BIT(inst, 6);
1268 inst_cream->Rm = BITS(inst, 8, 11);
1269 inst_cream->Rn = BITS(inst, 0, 3);
1270 inst_cream->Rd = BITS(inst, 16, 19);
1271
1272 return inst_base;
1273}
1274
1275static ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index)
1276{
1277 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1278 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
1279
1280 inst_base->cond = AL;
1281 inst_base->idx = index;
1282 inst_base->br = NON_BRANCH;
1283
1284 inst_cream->inst = inst;
1285 inst_cream->get_addr = get_calc_addr_op(inst);
1286
1287 return inst_base;
1288}
1289
1290static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index)
1291{
1292 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst));
1293 ssat_inst* const inst_cream = (ssat_inst*)inst_base->component;
1294
1295 inst_base->cond = BITS(inst, 28, 31);
1296 inst_base->idx = index;
1297 inst_base->br = NON_BRANCH;
1298
1299 inst_cream->Rn = BITS(inst, 0, 3);
1300 inst_cream->Rd = BITS(inst, 12, 15);
1301 inst_cream->imm5 = BITS(inst, 7, 11);
1302 inst_cream->sat_imm = BITS(inst, 16, 20);
1303 inst_cream->shift_type = BIT(inst, 6);
1304
1305 return inst_base;
1306}
1307static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index)
1308{
1309 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst));
1310 ssat_inst* const inst_cream = (ssat_inst*)inst_base->component;
1311
1312 inst_base->cond = BITS(inst, 28, 31);
1313 inst_base->idx = index;
1314 inst_base->br = NON_BRANCH;
1315
1316 inst_cream->Rn = BITS(inst, 0, 3);
1317 inst_cream->Rd = BITS(inst, 12, 15);
1318 inst_cream->sat_imm = BITS(inst, 16, 19);
1319
1320 return inst_base;
1321}
1322
1323static ARM_INST_PTR INTERPRETER_TRANSLATE(stc)(unsigned int inst, int index)
1324{
1325 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(stc_inst));
1326 inst_base->cond = BITS(inst, 28, 31);
1327 inst_base->idx = index;
1328 inst_base->br = NON_BRANCH;
1329
1330 return inst_base;
1331}
1332static ARM_INST_PTR INTERPRETER_TRANSLATE(stm)(unsigned int inst, int index)
1333{
1334 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1335 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1336
1337 inst_base->cond = BITS(inst, 28, 31);
1338 inst_base->idx = index;
1339 inst_base->br = NON_BRANCH;
1340
1341 inst_cream->inst = inst;
1342 inst_cream->get_addr = get_calc_addr_op(inst);
1343 return inst_base;
1344}
1345static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb)(unsigned int inst, int index)
1346{
1347 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst));
1348 sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component;
1349
1350 inst_base->cond = BITS(inst, 28, 31);
1351 inst_base->idx = index;
1352 inst_base->br = NON_BRANCH;
1353
1354 inst_cream->Rd = BITS(inst, 12, 15);
1355 inst_cream->Rm = BITS(inst, 0, 3);
1356 inst_cream->rotate = BITS(inst, 10, 11);
1357
1358 return inst_base;
1359}
1360static ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index)
1361{
1362 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1363 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1364
1365 inst_base->cond = BITS(inst, 28, 31);
1366 inst_base->idx = index;
1367 inst_base->br = NON_BRANCH;
1368
1369 inst_cream->inst = inst;
1370 inst_cream->get_addr = get_calc_addr_op(inst);
1371
1372 return inst_base;
1373}
1374static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb)(unsigned int inst, int index)
1375{
1376 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst));
1377 uxth_inst *inst_cream = (uxth_inst *)inst_base->component;
1378
1379 inst_base->cond = BITS(inst, 28, 31);
1380 inst_base->idx = index;
1381 inst_base->br = NON_BRANCH;
1382
1383 inst_cream->Rd = BITS(inst, 12, 15);
1384 inst_cream->rotate = BITS(inst, 10, 11);
1385 inst_cream->Rm = BITS(inst, 0, 3);
1386
1387 return inst_base;
1388}
1389static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index)
1390{
1391 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst));
1392 uxtab_inst *inst_cream = (uxtab_inst *)inst_base->component;
1393
1394 inst_base->cond = BITS(inst, 28, 31);
1395 inst_base->idx = index;
1396 inst_base->br = NON_BRANCH;
1397
1398 inst_cream->Rd = BITS(inst, 12, 15);
1399 inst_cream->rotate = BITS(inst, 10, 11);
1400 inst_cream->Rm = BITS(inst, 0, 3);
1401 inst_cream->Rn = BITS(inst, 16, 19);
1402
1403 return inst_base;
1404}
1405static ARM_INST_PTR INTERPRETER_TRANSLATE(strb)(unsigned int inst, int index)
1406{
1407 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1408 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1409
1410 inst_base->cond = BITS(inst, 28, 31);
1411 inst_base->idx = index;
1412 inst_base->br = NON_BRANCH;
1413
1414 inst_cream->inst = inst;
1415 inst_cream->get_addr = get_calc_addr_op(inst);
1416
1417 return inst_base;
1418}
1419static ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index)
1420{
1421 arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1422 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
1423
1424 inst_base->cond = BITS(inst, 28, 31);
1425 inst_base->idx = index;
1426 inst_base->br = NON_BRANCH;
1427
1428 inst_cream->inst = inst;
1429
1430 if (BITS(inst, 25, 27) == 2) {
1431 inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
1432 } else if (BITS(inst, 25, 27) == 3) {
1433 inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
1434 } else {
1435 DEBUG_MSG;
1436 }
1437
1438 return inst_base;
1439}
1440static ARM_INST_PTR INTERPRETER_TRANSLATE(strd)(unsigned int inst, int index){
1441 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1442 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1443
1444 inst_base->cond = BITS(inst, 28, 31);
1445 inst_base->idx = index;
1446 inst_base->br = NON_BRANCH;
1447
1448 inst_cream->inst = inst;
1449 inst_cream->get_addr = get_calc_addr_op(inst);
1450
1451 return inst_base;
1452}
1453static ARM_INST_PTR INTERPRETER_TRANSLATE(strex)(unsigned int inst, int index)
1454{
1455 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
1456 generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component;
1457
1458 inst_base->cond = BITS(inst, 28, 31);
1459 inst_base->idx = index;
1460 inst_base->br = NON_BRANCH;
1461
1462 inst_cream->Rn = BITS(inst, 16, 19);
1463 inst_cream->Rd = BITS(inst, 12, 15);
1464 inst_cream->Rm = BITS(inst, 0, 3);
1465
1466 return inst_base;
1467}
1468static ARM_INST_PTR INTERPRETER_TRANSLATE(strexb)(unsigned int inst, int index)
1469{
1470 return INTERPRETER_TRANSLATE(strex)(inst, index);
1471}
1472static ARM_INST_PTR INTERPRETER_TRANSLATE(strexh)(unsigned int inst, int index)
1473{
1474 return INTERPRETER_TRANSLATE(strex)(inst, index);
1475}
1476static ARM_INST_PTR INTERPRETER_TRANSLATE(strexd)(unsigned int inst, int index)
1477{
1478 return INTERPRETER_TRANSLATE(strex)(inst, index);
1479}
1480static ARM_INST_PTR INTERPRETER_TRANSLATE(strh)(unsigned int inst, int index)
1481{
1482 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1483 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1484
1485 inst_base->cond = BITS(inst, 28, 31);
1486 inst_base->idx = index;
1487 inst_base->br = NON_BRANCH;
1488
1489 inst_cream->inst = inst;
1490 inst_cream->get_addr = get_calc_addr_op(inst);
1491
1492 return inst_base;
1493}
1494static ARM_INST_PTR INTERPRETER_TRANSLATE(strt)(unsigned int inst, int index)
1495{
1496 arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1497 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
1498
1499 inst_base->cond = BITS(inst, 28, 31);
1500 inst_base->idx = index;
1501 inst_base->br = NON_BRANCH;
1502
1503 inst_cream->inst = inst;
1504 if (BITS(inst, 25, 27) == 2) {
1505 inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
1506 } else if (BITS(inst, 25, 27) == 3) {
1507 inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
1508 } else {
1509 // Reaching this would indicate the thumb version
1510 // of this instruction, however the 3DS CPU doesn't
1511 // support this variant (the 3DS CPU is only ARMv6K,
1512 // while this variant is added in ARMv6T2).
1513 // So it's sufficient for citra to not implement this.
1514 DEBUG_MSG;
1515 }
1516
1517 return inst_base;
1518}
1519static ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index)
1520{
1521 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sub_inst));
1522 sub_inst *inst_cream = (sub_inst *)inst_base->component;
1523
1524 inst_base->cond = BITS(inst, 28, 31);
1525 inst_base->idx = index;
1526 inst_base->br = NON_BRANCH;
1527
1528 inst_cream->I = BIT(inst, 25);
1529 inst_cream->S = BIT(inst, 20);
1530 inst_cream->Rn = BITS(inst, 16, 19);
1531 inst_cream->Rd = BITS(inst, 12, 15);
1532 inst_cream->shifter_operand = BITS(inst, 0, 11);
1533 inst_cream->shtop_func = get_shtop(inst);
1534
1535 if (inst_cream->Rd == 15)
1536 inst_base->br = INDIRECT_BRANCH;
1537
1538 return inst_base;
1539}
1540static ARM_INST_PTR INTERPRETER_TRANSLATE(swi)(unsigned int inst, int index)
1541{
1542 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swi_inst));
1543 swi_inst *inst_cream = (swi_inst *)inst_base->component;
1544
1545 inst_base->cond = BITS(inst, 28, 31);
1546 inst_base->idx = index;
1547 inst_base->br = NON_BRANCH;
1548
1549 inst_cream->num = BITS(inst, 0, 23);
1550 return inst_base;
1551}
1552static ARM_INST_PTR INTERPRETER_TRANSLATE(swp)(unsigned int inst, int index)
1553{
1554 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst));
1555 swp_inst *inst_cream = (swp_inst *)inst_base->component;
1556
1557 inst_base->cond = BITS(inst, 28, 31);
1558 inst_base->idx = index;
1559 inst_base->br = NON_BRANCH;
1560
1561 inst_cream->Rn = BITS(inst, 16, 19);
1562 inst_cream->Rd = BITS(inst, 12, 15);
1563 inst_cream->Rm = BITS(inst, 0, 3);
1564
1565 return inst_base;
1566}
1567static ARM_INST_PTR INTERPRETER_TRANSLATE(swpb)(unsigned int inst, int index){
1568 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst));
1569 swp_inst *inst_cream = (swp_inst *)inst_base->component;
1570
1571 inst_base->cond = BITS(inst, 28, 31);
1572 inst_base->idx = index;
1573 inst_base->br = NON_BRANCH;
1574
1575 inst_cream->Rn = BITS(inst, 16, 19);
1576 inst_cream->Rd = BITS(inst, 12, 15);
1577 inst_cream->Rm = BITS(inst, 0, 3);
1578
1579 return inst_base;
1580}
1581static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){
1582 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst));
1583 sxtab_inst *inst_cream = (sxtab_inst *)inst_base->component;
1584
1585 inst_base->cond = BITS(inst, 28, 31);
1586 inst_base->idx = index;
1587 inst_base->br = NON_BRANCH;
1588
1589 inst_cream->Rd = BITS(inst, 12, 15);
1590 inst_cream->rotate = BITS(inst, 10, 11);
1591 inst_cream->Rm = BITS(inst, 0, 3);
1592 inst_cream->Rn = BITS(inst, 16, 19);
1593
1594 return inst_base;
1595}
1596
1597static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index)
1598{
1599 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst));
1600 sxtab_inst* const inst_cream = (sxtab_inst*)inst_base->component;
1601
1602 inst_base->cond = BITS(inst, 28, 31);
1603 inst_base->idx = index;
1604 inst_base->br = NON_BRANCH;
1605
1606 inst_cream->Rm = BITS(inst, 0, 3);
1607 inst_cream->Rn = BITS(inst, 16, 19);
1608 inst_cream->Rd = BITS(inst, 12, 15);
1609 inst_cream->rotate = BITS(inst, 10, 11);
1610
1611 return inst_base;
1612}
1613static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index)
1614{
1615 return INTERPRETER_TRANSLATE(sxtab16)(inst, index);
1616}
1617
1618static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index) {
1619 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst));
1620 sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component;
1621
1622 inst_base->cond = BITS(inst, 28, 31);
1623 inst_base->idx = index;
1624 inst_base->br = NON_BRANCH;
1625
1626 inst_cream->Rd = BITS(inst, 12, 15);
1627 inst_cream->rotate = BITS(inst, 10, 11);
1628 inst_cream->Rm = BITS(inst, 0, 3);
1629 inst_cream->Rn = BITS(inst, 16, 19);
1630
1631 return inst_base;
1632}
1633
1634static ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index)
1635{
1636 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst));
1637 teq_inst *inst_cream = (teq_inst *)inst_base->component;
1638
1639 inst_base->cond = BITS(inst, 28, 31);
1640 inst_base->idx = index;
1641 inst_base->br = NON_BRANCH;
1642
1643 inst_cream->I = BIT(inst, 25);
1644 inst_cream->Rn = BITS(inst, 16, 19);
1645 inst_cream->shifter_operand = BITS(inst, 0, 11);
1646 inst_cream->shtop_func = get_shtop(inst);
1647
1648 return inst_base;
1649}
1650static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index)
1651{
1652 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(tst_inst));
1653 tst_inst *inst_cream = (tst_inst *)inst_base->component;
1654
1655 inst_base->cond = BITS(inst, 28, 31);
1656 inst_base->idx = index;
1657 inst_base->br = NON_BRANCH;
1658
1659 inst_cream->I = BIT(inst, 25);
1660 inst_cream->S = BIT(inst, 20);
1661 inst_cream->Rn = BITS(inst, 16, 19);
1662 inst_cream->Rd = BITS(inst, 12, 15);
1663 inst_cream->shifter_operand = BITS(inst, 0, 11);
1664 inst_cream->shtop_func = get_shtop(inst);
1665
1666 return inst_base;
1667}
1668
1669static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index)
1670{
1671 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
1672 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
1673
1674 inst_base->cond = BITS(inst, 28, 31);
1675 inst_base->idx = index;
1676 inst_base->br = NON_BRANCH;
1677
1678 inst_cream->op1 = BITS(inst, 20, 21);
1679 inst_cream->op2 = BITS(inst, 5, 7);
1680 inst_cream->Rm = BITS(inst, 0, 3);
1681 inst_cream->Rn = BITS(inst, 16, 19);
1682 inst_cream->Rd = BITS(inst, 12, 15);
1683
1684 return inst_base;
1685}
1686static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index)
1687{
1688 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
1689}
1690static ARM_INST_PTR INTERPRETER_TRANSLATE(uaddsubx)(unsigned int inst, int index)
1691{
1692 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
1693}
1694static ARM_INST_PTR INTERPRETER_TRANSLATE(usub8)(unsigned int inst, int index)
1695{
1696 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
1697}
1698static ARM_INST_PTR INTERPRETER_TRANSLATE(usub16)(unsigned int inst, int index)
1699{
1700 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
1701}
1702static ARM_INST_PTR INTERPRETER_TRANSLATE(usubaddx)(unsigned int inst, int index)
1703{
1704 return INTERPRETER_TRANSLATE(uadd8)(inst, index);
1705}
1706
1707static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index)
1708{
1709 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
1710 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
1711
1712 inst_base->cond = BITS(inst, 28, 31);
1713 inst_base->idx = index;
1714 inst_base->br = NON_BRANCH;
1715
1716 inst_cream->op1 = BITS(inst, 20, 21);
1717 inst_cream->op2 = BITS(inst, 5, 7);
1718 inst_cream->Rm = BITS(inst, 0, 3);
1719 inst_cream->Rn = BITS(inst, 16, 19);
1720 inst_cream->Rd = BITS(inst, 12, 15);
1721
1722 return inst_base;
1723}
1724static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index)
1725{
1726 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
1727}
1728static ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index)
1729{
1730 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
1731}
1732static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index)
1733{
1734 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
1735}
1736static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index)
1737{
1738 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
1739}
1740static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index)
1741{
1742 return INTERPRETER_TRANSLATE(uhadd8)(inst, index);
1743}
1744static ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index)
1745{
1746 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(umaal_inst));
1747 umaal_inst* const inst_cream = (umaal_inst*)inst_base->component;
1748
1749 inst_base->cond = BITS(inst, 28, 31);
1750 inst_base->idx = index;
1751 inst_base->br = NON_BRANCH;
1752
1753 inst_cream->Rm = BITS(inst, 8, 11);
1754 inst_cream->Rn = BITS(inst, 0, 3);
1755 inst_cream->RdLo = BITS(inst, 12, 15);
1756 inst_cream->RdHi = BITS(inst, 16, 19);
1757
1758 return inst_base;
1759}
1760static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index)
1761{
1762 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst));
1763 umlal_inst *inst_cream = (umlal_inst *)inst_base->component;
1764
1765 inst_base->cond = BITS(inst, 28, 31);
1766 inst_base->idx = index;
1767 inst_base->br = NON_BRANCH;
1768
1769 inst_cream->S = BIT(inst, 20);
1770 inst_cream->Rm = BITS(inst, 0, 3);
1771 inst_cream->Rs = BITS(inst, 8, 11);
1772 inst_cream->RdHi = BITS(inst, 16, 19);
1773 inst_cream->RdLo = BITS(inst, 12, 15);
1774
1775 return inst_base;
1776}
1777static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index)
1778{
1779 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst));
1780 umull_inst *inst_cream = (umull_inst *)inst_base->component;
1781
1782 inst_base->cond = BITS(inst, 28, 31);
1783 inst_base->idx = index;
1784 inst_base->br = NON_BRANCH;
1785
1786 inst_cream->S = BIT(inst, 20);
1787 inst_cream->Rm = BITS(inst, 0, 3);
1788 inst_cream->Rs = BITS(inst, 8, 11);
1789 inst_cream->RdHi = BITS(inst, 16, 19);
1790 inst_cream->RdLo = BITS(inst, 12, 15);
1791
1792 return inst_base;
1793}
1794
1795static ARM_INST_PTR INTERPRETER_TRANSLATE(b_2_thumb)(unsigned int tinst, int index)
1796{
1797 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_2_thumb));
1798 b_2_thumb *inst_cream = (b_2_thumb *)inst_base->component;
1799
1800 inst_cream->imm = ((tinst & 0x3FF) << 1) | ((tinst & (1 << 10)) ? 0xFFFFF800 : 0);
1801
1802 inst_base->idx = index;
1803 inst_base->br = DIRECT_BRANCH;
1804
1805 return inst_base;
1806}
1807
1808static ARM_INST_PTR INTERPRETER_TRANSLATE(b_cond_thumb)(unsigned int tinst, int index)
1809{
1810 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_cond_thumb));
1811 b_cond_thumb *inst_cream = (b_cond_thumb *)inst_base->component;
1812
1813 inst_cream->imm = (((tinst & 0x7F) << 1) | ((tinst & (1 << 7)) ? 0xFFFFFF00 : 0));
1814 inst_cream->cond = ((tinst >> 8) & 0xf);
1815 inst_base->idx = index;
1816 inst_base->br = DIRECT_BRANCH;
1817
1818 return inst_base;
1819}
1820
1821static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_1_thumb)(unsigned int tinst, int index)
1822{
1823 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_1_thumb));
1824 bl_1_thumb *inst_cream = (bl_1_thumb *)inst_base->component;
1825
1826 inst_cream->imm = (((tinst & 0x07FF) << 12) | ((tinst & (1 << 10)) ? 0xFF800000 : 0));
1827
1828 inst_base->idx = index;
1829 inst_base->br = NON_BRANCH;
1830 return inst_base;
1831}
1832static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_2_thumb)(unsigned int tinst, int index)
1833{
1834 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_2_thumb));
1835 bl_2_thumb *inst_cream = (bl_2_thumb *)inst_base->component;
1836
1837 inst_cream->imm = (tinst & 0x07FF) << 1;
1838
1839 inst_base->idx = index;
1840 inst_base->br = DIRECT_BRANCH;
1841 return inst_base;
1842}
1843static ARM_INST_PTR INTERPRETER_TRANSLATE(blx_1_thumb)(unsigned int tinst, int index)
1844{
1845 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_1_thumb));
1846 blx_1_thumb *inst_cream = (blx_1_thumb *)inst_base->component;
1847
1848 inst_cream->imm = (tinst & 0x07FF) << 1;
1849 inst_cream->instr = tinst;
1850
1851 inst_base->idx = index;
1852 inst_base->br = DIRECT_BRANCH;
1853 return inst_base;
1854}
1855
1856static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index)
1857{
1858 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
1859 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
1860
1861 inst_base->cond = BITS(inst, 28, 31);
1862 inst_base->idx = index;
1863 inst_base->br = NON_BRANCH;
1864
1865 inst_cream->Rm = BITS(inst, 0, 3);
1866 inst_cream->Rn = BITS(inst, 16, 19);
1867 inst_cream->Rd = BITS(inst, 12, 15);
1868 inst_cream->op1 = BITS(inst, 20, 21);
1869 inst_cream->op2 = BITS(inst, 5, 7);
1870
1871 return inst_base;
1872}
1873static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index)
1874{
1875 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
1876}
1877static ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index)
1878{
1879 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
1880}
1881static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index)
1882{
1883 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
1884}
1885static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index)
1886{
1887 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
1888}
1889static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index)
1890{
1891 return INTERPRETER_TRANSLATE(uqadd8)(inst, index);
1892}
1893static ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index)
1894{
1895 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
1896 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
1897
1898 inst_base->cond = BITS(inst, 28, 31);
1899 inst_base->idx = index;
1900 inst_base->br = NON_BRANCH;
1901
1902 inst_cream->op1 = BITS(inst, 20, 24);
1903 inst_cream->op2 = BITS(inst, 5, 7);
1904 inst_cream->Rd = BITS(inst, 16, 19);
1905 inst_cream->Rm = BITS(inst, 8, 11);
1906 inst_cream->Rn = BITS(inst, 0, 3);
1907 inst_cream->Ra = BITS(inst, 12, 15);
1908
1909 return inst_base;
1910}
1911static ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index)
1912{
1913 return INTERPRETER_TRANSLATE(usada8)(inst, index);
1914}
1915static ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index)
1916{
1917 return INTERPRETER_TRANSLATE(ssat)(inst, index);
1918}
1919static ARM_INST_PTR INTERPRETER_TRANSLATE(usat16)(unsigned int inst, int index)
1920{
1921 return INTERPRETER_TRANSLATE(ssat16)(inst, index);
1922}
1923
1924static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index)
1925{
1926 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst));
1927 uxtab_inst* const inst_cream = (uxtab_inst*)inst_base->component;
1928
1929 inst_base->cond = BITS(inst, 28, 31);
1930 inst_base->idx = index;
1931 inst_base->br = NON_BRANCH;
1932
1933 inst_cream->Rm = BITS(inst, 0, 3);
1934 inst_cream->Rn = BITS(inst, 16, 19);
1935 inst_cream->Rd = BITS(inst, 12, 15);
1936 inst_cream->rotate = BITS(inst, 10, 11);
1937
1938 return inst_base;
1939}
1940static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb16)(unsigned int inst, int index)
1941{
1942 return INTERPRETER_TRANSLATE(uxtab16)(inst, index);
1943}
1944
1945static ARM_INST_PTR INTERPRETER_TRANSLATE(wfe)(unsigned int inst, int index)
1946{
1947 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
1948
1949 inst_base->cond = BITS(inst, 28, 31);
1950 inst_base->idx = index;
1951 inst_base->br = NON_BRANCH;
1952
1953 return inst_base;
1954}
1955static ARM_INST_PTR INTERPRETER_TRANSLATE(wfi)(unsigned int inst, int index)
1956{
1957 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
1958
1959 inst_base->cond = BITS(inst, 28, 31);
1960 inst_base->idx = index;
1961 inst_base->br = NON_BRANCH;
1962
1963 return inst_base;
1964}
1965static ARM_INST_PTR INTERPRETER_TRANSLATE(yield)(unsigned int inst, int index)
1966{
1967 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
1968
1969 inst_base->cond = BITS(inst, 28, 31);
1970 inst_base->idx = index;
1971 inst_base->br = NON_BRANCH;
1972
1973 return inst_base;
1974}
1975
1976// Floating point VFPv3 instructions
1977
1978#define VFP_INTERPRETER_TRANS
1979#include "core/arm/skyeye_common/vfp/vfpinstr.cpp"
1980#undef VFP_INTERPRETER_TRANS
1981
1982const transop_fp_t arm_instruction_trans[] = {
1983 INTERPRETER_TRANSLATE(vmla),
1984 INTERPRETER_TRANSLATE(vmls),
1985 INTERPRETER_TRANSLATE(vnmla),
1986 INTERPRETER_TRANSLATE(vnmls),
1987 INTERPRETER_TRANSLATE(vnmul),
1988 INTERPRETER_TRANSLATE(vmul),
1989 INTERPRETER_TRANSLATE(vadd),
1990 INTERPRETER_TRANSLATE(vsub),
1991 INTERPRETER_TRANSLATE(vdiv),
1992 INTERPRETER_TRANSLATE(vmovi),
1993 INTERPRETER_TRANSLATE(vmovr),
1994 INTERPRETER_TRANSLATE(vabs),
1995 INTERPRETER_TRANSLATE(vneg),
1996 INTERPRETER_TRANSLATE(vsqrt),
1997 INTERPRETER_TRANSLATE(vcmp),
1998 INTERPRETER_TRANSLATE(vcmp2),
1999 INTERPRETER_TRANSLATE(vcvtbds),
2000 INTERPRETER_TRANSLATE(vcvtbff),
2001 INTERPRETER_TRANSLATE(vcvtbfi),
2002 INTERPRETER_TRANSLATE(vmovbrs),
2003 INTERPRETER_TRANSLATE(vmsr),
2004 INTERPRETER_TRANSLATE(vmovbrc),
2005 INTERPRETER_TRANSLATE(vmrs),
2006 INTERPRETER_TRANSLATE(vmovbcr),
2007 INTERPRETER_TRANSLATE(vmovbrrss),
2008 INTERPRETER_TRANSLATE(vmovbrrd),
2009 INTERPRETER_TRANSLATE(vstr),
2010 INTERPRETER_TRANSLATE(vpush),
2011 INTERPRETER_TRANSLATE(vstm),
2012 INTERPRETER_TRANSLATE(vpop),
2013 INTERPRETER_TRANSLATE(vldr),
2014 INTERPRETER_TRANSLATE(vldm),
2015
2016 INTERPRETER_TRANSLATE(srs),
2017 INTERPRETER_TRANSLATE(rfe),
2018 INTERPRETER_TRANSLATE(bkpt),
2019 INTERPRETER_TRANSLATE(blx),
2020 INTERPRETER_TRANSLATE(cps),
2021 INTERPRETER_TRANSLATE(pld),
2022 INTERPRETER_TRANSLATE(setend),
2023 INTERPRETER_TRANSLATE(clrex),
2024 INTERPRETER_TRANSLATE(rev16),
2025 INTERPRETER_TRANSLATE(usad8),
2026 INTERPRETER_TRANSLATE(sxtb),
2027 INTERPRETER_TRANSLATE(uxtb),
2028 INTERPRETER_TRANSLATE(sxth),
2029 INTERPRETER_TRANSLATE(sxtb16),
2030 INTERPRETER_TRANSLATE(uxth),
2031 INTERPRETER_TRANSLATE(uxtb16),
2032 INTERPRETER_TRANSLATE(cpy),
2033 INTERPRETER_TRANSLATE(uxtab),
2034 INTERPRETER_TRANSLATE(ssub8),
2035 INTERPRETER_TRANSLATE(shsub8),
2036 INTERPRETER_TRANSLATE(ssubaddx),
2037 INTERPRETER_TRANSLATE(strex),
2038 INTERPRETER_TRANSLATE(strexb),
2039 INTERPRETER_TRANSLATE(swp),
2040 INTERPRETER_TRANSLATE(swpb),
2041 INTERPRETER_TRANSLATE(ssub16),
2042 INTERPRETER_TRANSLATE(ssat16),
2043 INTERPRETER_TRANSLATE(shsubaddx),
2044 INTERPRETER_TRANSLATE(qsubaddx),
2045 INTERPRETER_TRANSLATE(shaddsubx),
2046 INTERPRETER_TRANSLATE(shadd8),
2047 INTERPRETER_TRANSLATE(shadd16),
2048 INTERPRETER_TRANSLATE(sel),
2049 INTERPRETER_TRANSLATE(saddsubx),
2050 INTERPRETER_TRANSLATE(sadd8),
2051 INTERPRETER_TRANSLATE(sadd16),
2052 INTERPRETER_TRANSLATE(shsub16),
2053 INTERPRETER_TRANSLATE(umaal),
2054 INTERPRETER_TRANSLATE(uxtab16),
2055 INTERPRETER_TRANSLATE(usubaddx),
2056 INTERPRETER_TRANSLATE(usub8),
2057 INTERPRETER_TRANSLATE(usub16),
2058 INTERPRETER_TRANSLATE(usat16),
2059 INTERPRETER_TRANSLATE(usada8),
2060 INTERPRETER_TRANSLATE(uqsubaddx),
2061 INTERPRETER_TRANSLATE(uqsub8),
2062 INTERPRETER_TRANSLATE(uqsub16),
2063 INTERPRETER_TRANSLATE(uqaddsubx),
2064 INTERPRETER_TRANSLATE(uqadd8),
2065 INTERPRETER_TRANSLATE(uqadd16),
2066 INTERPRETER_TRANSLATE(sxtab),
2067 INTERPRETER_TRANSLATE(uhsubaddx),
2068 INTERPRETER_TRANSLATE(uhsub8),
2069 INTERPRETER_TRANSLATE(uhsub16),
2070 INTERPRETER_TRANSLATE(uhaddsubx),
2071 INTERPRETER_TRANSLATE(uhadd8),
2072 INTERPRETER_TRANSLATE(uhadd16),
2073 INTERPRETER_TRANSLATE(uaddsubx),
2074 INTERPRETER_TRANSLATE(uadd8),
2075 INTERPRETER_TRANSLATE(uadd16),
2076 INTERPRETER_TRANSLATE(sxtah),
2077 INTERPRETER_TRANSLATE(sxtab16),
2078 INTERPRETER_TRANSLATE(qadd8),
2079 INTERPRETER_TRANSLATE(bxj),
2080 INTERPRETER_TRANSLATE(clz),
2081 INTERPRETER_TRANSLATE(uxtah),
2082 INTERPRETER_TRANSLATE(bx),
2083 INTERPRETER_TRANSLATE(rev),
2084 INTERPRETER_TRANSLATE(blx),
2085 INTERPRETER_TRANSLATE(revsh),
2086 INTERPRETER_TRANSLATE(qadd),
2087 INTERPRETER_TRANSLATE(qadd16),
2088 INTERPRETER_TRANSLATE(qaddsubx),
2089 INTERPRETER_TRANSLATE(ldrex),
2090 INTERPRETER_TRANSLATE(qdadd),
2091 INTERPRETER_TRANSLATE(qdsub),
2092 INTERPRETER_TRANSLATE(qsub),
2093 INTERPRETER_TRANSLATE(ldrexb),
2094 INTERPRETER_TRANSLATE(qsub8),
2095 INTERPRETER_TRANSLATE(qsub16),
2096 INTERPRETER_TRANSLATE(smuad),
2097 INTERPRETER_TRANSLATE(smmul),
2098 INTERPRETER_TRANSLATE(smusd),
2099 INTERPRETER_TRANSLATE(smlsd),
2100 INTERPRETER_TRANSLATE(smlsld),
2101 INTERPRETER_TRANSLATE(smmla),
2102 INTERPRETER_TRANSLATE(smmls),
2103 INTERPRETER_TRANSLATE(smlald),
2104 INTERPRETER_TRANSLATE(smlad),
2105 INTERPRETER_TRANSLATE(smlaw),
2106 INTERPRETER_TRANSLATE(smulw),
2107 INTERPRETER_TRANSLATE(pkhtb),
2108 INTERPRETER_TRANSLATE(pkhbt),
2109 INTERPRETER_TRANSLATE(smul),
2110 INTERPRETER_TRANSLATE(smlalxy),
2111 INTERPRETER_TRANSLATE(smla),
2112 INTERPRETER_TRANSLATE(mcrr),
2113 INTERPRETER_TRANSLATE(mrrc),
2114 INTERPRETER_TRANSLATE(cmp),
2115 INTERPRETER_TRANSLATE(tst),
2116 INTERPRETER_TRANSLATE(teq),
2117 INTERPRETER_TRANSLATE(cmn),
2118 INTERPRETER_TRANSLATE(smull),
2119 INTERPRETER_TRANSLATE(umull),
2120 INTERPRETER_TRANSLATE(umlal),
2121 INTERPRETER_TRANSLATE(smlal),
2122 INTERPRETER_TRANSLATE(mul),
2123 INTERPRETER_TRANSLATE(mla),
2124 INTERPRETER_TRANSLATE(ssat),
2125 INTERPRETER_TRANSLATE(usat),
2126 INTERPRETER_TRANSLATE(mrs),
2127 INTERPRETER_TRANSLATE(msr),
2128 INTERPRETER_TRANSLATE(and),
2129 INTERPRETER_TRANSLATE(bic),
2130 INTERPRETER_TRANSLATE(ldm),
2131 INTERPRETER_TRANSLATE(eor),
2132 INTERPRETER_TRANSLATE(add),
2133 INTERPRETER_TRANSLATE(rsb),
2134 INTERPRETER_TRANSLATE(rsc),
2135 INTERPRETER_TRANSLATE(sbc),
2136 INTERPRETER_TRANSLATE(adc),
2137 INTERPRETER_TRANSLATE(sub),
2138 INTERPRETER_TRANSLATE(orr),
2139 INTERPRETER_TRANSLATE(mvn),
2140 INTERPRETER_TRANSLATE(mov),
2141 INTERPRETER_TRANSLATE(stm),
2142 INTERPRETER_TRANSLATE(ldm),
2143 INTERPRETER_TRANSLATE(ldrsh),
2144 INTERPRETER_TRANSLATE(stm),
2145 INTERPRETER_TRANSLATE(ldm),
2146 INTERPRETER_TRANSLATE(ldrsb),
2147 INTERPRETER_TRANSLATE(strd),
2148 INTERPRETER_TRANSLATE(ldrh),
2149 INTERPRETER_TRANSLATE(strh),
2150 INTERPRETER_TRANSLATE(ldrd),
2151 INTERPRETER_TRANSLATE(strt),
2152 INTERPRETER_TRANSLATE(strbt),
2153 INTERPRETER_TRANSLATE(ldrbt),
2154 INTERPRETER_TRANSLATE(ldrt),
2155 INTERPRETER_TRANSLATE(mrc),
2156 INTERPRETER_TRANSLATE(mcr),
2157 INTERPRETER_TRANSLATE(msr),
2158 INTERPRETER_TRANSLATE(msr),
2159 INTERPRETER_TRANSLATE(msr),
2160 INTERPRETER_TRANSLATE(msr),
2161 INTERPRETER_TRANSLATE(msr),
2162 INTERPRETER_TRANSLATE(ldrb),
2163 INTERPRETER_TRANSLATE(strb),
2164 INTERPRETER_TRANSLATE(ldr),
2165 INTERPRETER_TRANSLATE(ldrcond),
2166 INTERPRETER_TRANSLATE(str),
2167 INTERPRETER_TRANSLATE(cdp),
2168 INTERPRETER_TRANSLATE(stc),
2169 INTERPRETER_TRANSLATE(ldc),
2170 INTERPRETER_TRANSLATE(ldrexd),
2171 INTERPRETER_TRANSLATE(strexd),
2172 INTERPRETER_TRANSLATE(ldrexh),
2173 INTERPRETER_TRANSLATE(strexh),
2174 INTERPRETER_TRANSLATE(nop),
2175 INTERPRETER_TRANSLATE(yield),
2176 INTERPRETER_TRANSLATE(wfe),
2177 INTERPRETER_TRANSLATE(wfi),
2178 INTERPRETER_TRANSLATE(sev),
2179 INTERPRETER_TRANSLATE(swi),
2180 INTERPRETER_TRANSLATE(bbl),
2181
2182 // All the thumb instructions should be placed the end of table
2183 INTERPRETER_TRANSLATE(b_2_thumb),
2184 INTERPRETER_TRANSLATE(b_cond_thumb),
2185 INTERPRETER_TRANSLATE(bl_1_thumb),
2186 INTERPRETER_TRANSLATE(bl_2_thumb),
2187 INTERPRETER_TRANSLATE(blx_1_thumb)
2188}; \ No newline at end of file
diff --git a/src/core/arm/dyncom/arm_dyncom_trans_struct.inc b/src/core/arm/dyncom/arm_dyncom_trans_struct.inc
new file mode 100644
index 000000000..0a7f3ab6e
--- /dev/null
+++ b/src/core/arm/dyncom/arm_dyncom_trans_struct.inc
@@ -0,0 +1,462 @@
1struct arm_inst {
2 unsigned int idx;
3 unsigned int cond;
4 int br;
5 char component[0];
6};
7
8struct generic_arm_inst {
9 u32 Ra;
10 u32 Rm;
11 u32 Rn;
12 u32 Rd;
13 u8 op1;
14 u8 op2;
15};
16
17struct adc_inst {
18 unsigned int I;
19 unsigned int S;
20 unsigned int Rn;
21 unsigned int Rd;
22 unsigned int shifter_operand;
23 shtop_fp_t shtop_func;
24};
25
26struct add_inst {
27 unsigned int I;
28 unsigned int S;
29 unsigned int Rn;
30 unsigned int Rd;
31 unsigned int shifter_operand;
32 shtop_fp_t shtop_func;
33};
34
35struct orr_inst {
36 unsigned int I;
37 unsigned int S;
38 unsigned int Rn;
39 unsigned int Rd;
40 unsigned int shifter_operand;
41 shtop_fp_t shtop_func;
42};
43
44struct and_inst {
45 unsigned int I;
46 unsigned int S;
47 unsigned int Rn;
48 unsigned int Rd;
49 unsigned int shifter_operand;
50 shtop_fp_t shtop_func;
51};
52
53struct eor_inst {
54 unsigned int I;
55 unsigned int S;
56 unsigned int Rn;
57 unsigned int Rd;
58 unsigned int shifter_operand;
59 shtop_fp_t shtop_func;
60};
61
62struct bbl_inst {
63 unsigned int L;
64 int signed_immed_24;
65 unsigned int next_addr;
66 unsigned int jmp_addr;
67};
68
69struct bx_inst {
70 unsigned int Rm;
71};
72
73struct blx_inst {
74 union {
75 s32 signed_immed_24;
76 u32 Rm;
77 } val;
78 unsigned int inst;
79};
80
81struct clz_inst {
82 unsigned int Rm;
83 unsigned int Rd;
84};
85
86struct cps_inst {
87 unsigned int imod0;
88 unsigned int imod1;
89 unsigned int mmod;
90 unsigned int A, I, F;
91 unsigned int mode;
92};
93
94struct clrex_inst {
95};
96
97struct cpy_inst {
98 unsigned int Rm;
99 unsigned int Rd;
100};
101
102struct bic_inst {
103 unsigned int I;
104 unsigned int S;
105 unsigned int Rn;
106 unsigned int Rd;
107 unsigned int shifter_operand;
108 shtop_fp_t shtop_func;
109};
110
111struct sub_inst {
112 unsigned int I;
113 unsigned int S;
114 unsigned int Rn;
115 unsigned int Rd;
116 unsigned int shifter_operand;
117 shtop_fp_t shtop_func;
118};
119
120struct tst_inst {
121 unsigned int I;
122 unsigned int S;
123 unsigned int Rn;
124 unsigned int Rd;
125 unsigned int shifter_operand;
126 shtop_fp_t shtop_func;
127};
128
129struct cmn_inst {
130 unsigned int I;
131 unsigned int Rn;
132 unsigned int shifter_operand;
133 shtop_fp_t shtop_func;
134};
135
136struct teq_inst {
137 unsigned int I;
138 unsigned int Rn;
139 unsigned int shifter_operand;
140 shtop_fp_t shtop_func;
141};
142
143struct stm_inst {
144 unsigned int inst;
145};
146
147struct bkpt_inst {
148 u32 imm;
149};
150
151struct stc_inst {
152};
153
154struct ldc_inst {
155};
156
157struct swi_inst {
158 unsigned int num;
159};
160
161struct cmp_inst {
162 unsigned int I;
163 unsigned int Rn;
164 unsigned int shifter_operand;
165 shtop_fp_t shtop_func;
166};
167
168struct mov_inst {
169 unsigned int I;
170 unsigned int S;
171 unsigned int Rd;
172 unsigned int shifter_operand;
173 shtop_fp_t shtop_func;
174};
175
176struct mvn_inst {
177 unsigned int I;
178 unsigned int S;
179 unsigned int Rd;
180 unsigned int shifter_operand;
181 shtop_fp_t shtop_func;
182};
183
184struct rev_inst {
185 unsigned int Rd;
186 unsigned int Rm;
187 unsigned int op1;
188 unsigned int op2;
189};
190
191struct rsb_inst {
192 unsigned int I;
193 unsigned int S;
194 unsigned int Rn;
195 unsigned int Rd;
196 unsigned int shifter_operand;
197 shtop_fp_t shtop_func;
198};
199
200struct rsc_inst {
201 unsigned int I;
202 unsigned int S;
203 unsigned int Rn;
204 unsigned int Rd;
205 unsigned int shifter_operand;
206 shtop_fp_t shtop_func;
207};
208
209struct sbc_inst {
210 unsigned int I;
211 unsigned int S;
212 unsigned int Rn;
213 unsigned int Rd;
214 unsigned int shifter_operand;
215 shtop_fp_t shtop_func;
216};
217
218struct mul_inst {
219 unsigned int S;
220 unsigned int Rd;
221 unsigned int Rs;
222 unsigned int Rm;
223};
224
225struct smul_inst {
226 unsigned int Rd;
227 unsigned int Rs;
228 unsigned int Rm;
229 unsigned int x;
230 unsigned int y;
231};
232
233struct umull_inst {
234 unsigned int S;
235 unsigned int RdHi;
236 unsigned int RdLo;
237 unsigned int Rs;
238 unsigned int Rm;
239};
240
241struct smlad_inst {
242 unsigned int m;
243 unsigned int Rm;
244 unsigned int Rd;
245 unsigned int Ra;
246 unsigned int Rn;
247 unsigned int op1;
248 unsigned int op2;
249};
250
251struct smla_inst {
252 unsigned int x;
253 unsigned int y;
254 unsigned int Rm;
255 unsigned int Rd;
256 unsigned int Rs;
257 unsigned int Rn;
258};
259
260struct smlalxy_inst {
261 unsigned int x;
262 unsigned int y;
263 unsigned int RdLo;
264 unsigned int RdHi;
265 unsigned int Rm;
266 unsigned int Rn;
267};
268
269struct ssat_inst {
270 unsigned int Rn;
271 unsigned int Rd;
272 unsigned int imm5;
273 unsigned int sat_imm;
274 unsigned int shift_type;
275};
276
277struct umaal_inst {
278 unsigned int Rn;
279 unsigned int Rm;
280 unsigned int RdHi;
281 unsigned int RdLo;
282};
283
284struct umlal_inst {
285 unsigned int S;
286 unsigned int Rm;
287 unsigned int Rs;
288 unsigned int RdHi;
289 unsigned int RdLo;
290};
291
292struct smlal_inst {
293 unsigned int S;
294 unsigned int Rm;
295 unsigned int Rs;
296 unsigned int RdHi;
297 unsigned int RdLo;
298};
299
300struct smlald_inst {
301 unsigned int RdLo;
302 unsigned int RdHi;
303 unsigned int Rm;
304 unsigned int Rn;
305 unsigned int swap;
306 unsigned int op1;
307 unsigned int op2;
308};
309
310struct mla_inst {
311 unsigned int S;
312 unsigned int Rn;
313 unsigned int Rd;
314 unsigned int Rs;
315 unsigned int Rm;
316};
317
318struct mrc_inst {
319 unsigned int opcode_1;
320 unsigned int opcode_2;
321 unsigned int cp_num;
322 unsigned int crn;
323 unsigned int crm;
324 unsigned int Rd;
325 unsigned int inst;
326};
327
328struct mcr_inst {
329 unsigned int opcode_1;
330 unsigned int opcode_2;
331 unsigned int cp_num;
332 unsigned int crn;
333 unsigned int crm;
334 unsigned int Rd;
335 unsigned int inst;
336};
337
338struct mcrr_inst {
339 unsigned int opcode_1;
340 unsigned int cp_num;
341 unsigned int crm;
342 unsigned int rt;
343 unsigned int rt2;
344};
345
346struct mrs_inst {
347 unsigned int R;
348 unsigned int Rd;
349};
350
351struct msr_inst {
352 unsigned int field_mask;
353 unsigned int R;
354 unsigned int inst;
355};
356
357struct pld_inst {
358};
359
360struct sxtb_inst {
361 unsigned int Rd;
362 unsigned int Rm;
363 unsigned int rotate;
364};
365
366struct sxtab_inst {
367 unsigned int Rd;
368 unsigned int Rn;
369 unsigned int Rm;
370 unsigned rotate;
371};
372
373struct sxtah_inst {
374 unsigned int Rd;
375 unsigned int Rn;
376 unsigned int Rm;
377 unsigned int rotate;
378};
379
380struct sxth_inst {
381 unsigned int Rd;
382 unsigned int Rm;
383 unsigned int rotate;
384};
385
386struct uxtab_inst {
387 unsigned int Rn;
388 unsigned int Rd;
389 unsigned int rotate;
390 unsigned int Rm;
391};
392
393struct uxtah_inst {
394 unsigned int Rn;
395 unsigned int Rd;
396 unsigned int rotate;
397 unsigned int Rm;
398};
399
400struct uxth_inst {
401 unsigned int Rd;
402 unsigned int Rm;
403 unsigned int rotate;
404};
405
406struct cdp_inst {
407 unsigned int opcode_1;
408 unsigned int CRn;
409 unsigned int CRd;
410 unsigned int cp_num;
411 unsigned int opcode_2;
412 unsigned int CRm;
413 unsigned int inst;
414};
415
416struct uxtb_inst {
417 unsigned int Rd;
418 unsigned int Rm;
419 unsigned int rotate;
420};
421
422struct swp_inst {
423 unsigned int Rn;
424 unsigned int Rd;
425 unsigned int Rm;
426};
427
428struct setend_inst {
429 unsigned int set_bigend;
430};
431
432struct b_2_thumb {
433 unsigned int imm;
434};
435struct b_cond_thumb {
436 unsigned int imm;
437 unsigned int cond;
438};
439
440struct bl_1_thumb {
441 unsigned int imm;
442};
443struct bl_2_thumb {
444 unsigned int imm;
445};
446struct blx_1_thumb {
447 unsigned int imm;
448 unsigned int instr;
449};
450
451struct pkh_inst {
452 unsigned int Rm;
453 unsigned int Rn;
454 unsigned int Rd;
455 unsigned char imm;
456};
457
458// Floating point VFPv3 structures
459
460#define VFP_INTERPRETER_STRUCT
461#include "core/arm/skyeye_common/vfp/vfpinstr.cpp"
462#undef VFP_INTERPRETER_STRUCT \ No newline at end of file
HIC SVNT DRACONES