diff options
Diffstat (limited to 'src/core/hw/hw.cpp')
| -rw-r--r-- | src/core/hw/hw.cpp | 23 |
1 files changed, 5 insertions, 18 deletions
diff --git a/src/core/hw/hw.cpp b/src/core/hw/hw.cpp index 4d0719263..848ab5348 100644 --- a/src/core/hw/hw.cpp +++ b/src/core/hw/hw.cpp | |||
| @@ -1,12 +1,11 @@ | |||
| 1 | // Copyright 2014 Citra Emulator Project | 1 | // Copyright 2014 Citra Emulator Project |
| 2 | // Licensed under GPLv2 | 2 | // Licensed under GPLv2 or any later version |
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "common/common_types.h" | 5 | #include "common/common_types.h" |
| 6 | 6 | ||
| 7 | #include "core/hw/hw.h" | 7 | #include "core/hw/hw.h" |
| 8 | #include "core/hw/gpu.h" | 8 | #include "core/hw/gpu.h" |
| 9 | #include "core/hw/ndma.h" | ||
| 10 | 9 | ||
| 11 | namespace HW { | 10 | namespace HW { |
| 12 | 11 | ||
| @@ -40,17 +39,12 @@ template <typename T> | |||
| 40 | inline void Read(T &var, const u32 addr) { | 39 | inline void Read(T &var, const u32 addr) { |
| 41 | switch (addr & 0xFFFFF000) { | 40 | switch (addr & 0xFFFFF000) { |
| 42 | 41 | ||
| 43 | // TODO(bunnei): What is the virtual address of NDMA? | ||
| 44 | // case VADDR_NDMA: | ||
| 45 | // NDMA::Read(var, addr); | ||
| 46 | // break; | ||
| 47 | |||
| 48 | case VADDR_GPU: | 42 | case VADDR_GPU: |
| 49 | GPU::Read(var, addr); | 43 | GPU::Read(var, addr); |
| 50 | break; | 44 | break; |
| 51 | 45 | ||
| 52 | default: | 46 | default: |
| 53 | ERROR_LOG(HW, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr); | 47 | LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr); |
| 54 | } | 48 | } |
| 55 | } | 49 | } |
| 56 | 50 | ||
| @@ -58,17 +52,12 @@ template <typename T> | |||
| 58 | inline void Write(u32 addr, const T data) { | 52 | inline void Write(u32 addr, const T data) { |
| 59 | switch (addr & 0xFFFFF000) { | 53 | switch (addr & 0xFFFFF000) { |
| 60 | 54 | ||
| 61 | // TODO(bunnei): What is the virtual address of NDMA? | ||
| 62 | // case VADDR_NDMA | ||
| 63 | // NDMA::Write(addr, data); | ||
| 64 | // break; | ||
| 65 | |||
| 66 | case VADDR_GPU: | 55 | case VADDR_GPU: |
| 67 | GPU::Write(addr, data); | 56 | GPU::Write(addr, data); |
| 68 | break; | 57 | break; |
| 69 | 58 | ||
| 70 | default: | 59 | default: |
| 71 | ERROR_LOG(HW, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr); | 60 | LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr); |
| 72 | } | 61 | } |
| 73 | } | 62 | } |
| 74 | 63 | ||
| @@ -87,19 +76,17 @@ template void Write<u8>(u32 addr, const u8 data); | |||
| 87 | /// Update hardware | 76 | /// Update hardware |
| 88 | void Update() { | 77 | void Update() { |
| 89 | GPU::Update(); | 78 | GPU::Update(); |
| 90 | NDMA::Update(); | ||
| 91 | } | 79 | } |
| 92 | 80 | ||
| 93 | /// Initialize hardware | 81 | /// Initialize hardware |
| 94 | void Init() { | 82 | void Init() { |
| 95 | GPU::Init(); | 83 | GPU::Init(); |
| 96 | NDMA::Init(); | 84 | LOG_DEBUG(HW, "initialized OK"); |
| 97 | NOTICE_LOG(HW, "initialized OK"); | ||
| 98 | } | 85 | } |
| 99 | 86 | ||
| 100 | /// Shutdown hardware | 87 | /// Shutdown hardware |
| 101 | void Shutdown() { | 88 | void Shutdown() { |
| 102 | NOTICE_LOG(HW, "shutdown OK"); | 89 | LOG_DEBUG(HW, "shutdown OK"); |
| 103 | } | 90 | } |
| 104 | 91 | ||
| 105 | } \ No newline at end of file | 92 | } \ No newline at end of file |