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-rw-r--r--src/core/hw/gpu.h14
1 files changed, 5 insertions, 9 deletions
diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h
index c853429a0..92097d182 100644
--- a/src/core/hw/gpu.h
+++ b/src/core/hw/gpu.h
@@ -56,7 +56,7 @@ struct Regs {
56 "Structure size and register block length don't match") 56 "Structure size and register block length don't match")
57#endif 57#endif
58 58
59 enum class FramebufferFormat : u32 { 59 enum class PixelFormat : u32 {
60 RGBA8 = 0, 60 RGBA8 = 0,
61 RGB8 = 1, 61 RGB8 = 1,
62 RGB565 = 2, 62 RGB565 = 2,
@@ -84,9 +84,7 @@ struct Regs {
84 84
85 INSERT_PADDING_WORDS(0x10b); 85 INSERT_PADDING_WORDS(0x10b);
86 86
87 struct { 87 struct FramebufferConfig {
88 using Format = Regs::FramebufferFormat;
89
90 union { 88 union {
91 u32 size; 89 u32 size;
92 90
@@ -102,7 +100,7 @@ struct Regs {
102 union { 100 union {
103 u32 format; 101 u32 format;
104 102
105 BitField< 0, 3, Format> color_format; 103 BitField< 0, 3, PixelFormat> color_format;
106 }; 104 };
107 105
108 INSERT_PADDING_WORDS(0x1); 106 INSERT_PADDING_WORDS(0x1);
@@ -130,8 +128,6 @@ struct Regs {
130 INSERT_PADDING_WORDS(0x169); 128 INSERT_PADDING_WORDS(0x169);
131 129
132 struct { 130 struct {
133 using Format = Regs::FramebufferFormat;
134
135 u32 input_address; 131 u32 input_address;
136 u32 output_address; 132 u32 output_address;
137 133
@@ -161,8 +157,8 @@ struct Regs {
161 u32 flags; 157 u32 flags;
162 158
163 BitField< 0, 1, u32> flip_data; // flips input data horizontally (TODO) if true 159 BitField< 0, 1, u32> flip_data; // flips input data horizontally (TODO) if true
164 BitField< 8, 3, Format> input_format; 160 BitField< 8, 3, PixelFormat> input_format;
165 BitField<12, 3, Format> output_format; 161 BitField<12, 3, PixelFormat> output_format;
166 BitField<16, 1, u32> output_tiled; // stores output in a tiled format 162 BitField<16, 1, u32> output_tiled; // stores output in a tiled format
167 }; 163 };
168 164