diff options
Diffstat (limited to 'src/core/hle/kernel/thread.cpp')
| -rw-r--r-- | src/core/hle/kernel/thread.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/core/hle/kernel/thread.cpp b/src/core/hle/kernel/thread.cpp index b7f094f46..f77c39d18 100644 --- a/src/core/hle/kernel/thread.cpp +++ b/src/core/hle/kernel/thread.cpp | |||
| @@ -171,6 +171,8 @@ static void SwitchContext(Thread* new_thread) { | |||
| 171 | // Cancel any outstanding wakeup events for this thread | 171 | // Cancel any outstanding wakeup events for this thread |
| 172 | CoreTiming::UnscheduleEvent(ThreadWakeupEventType, new_thread->callback_handle); | 172 | CoreTiming::UnscheduleEvent(ThreadWakeupEventType, new_thread->callback_handle); |
| 173 | 173 | ||
| 174 | auto previous_process = Kernel::g_current_process; | ||
| 175 | |||
| 174 | current_thread = new_thread; | 176 | current_thread = new_thread; |
| 175 | 177 | ||
| 176 | ready_queue.remove(new_thread->current_priority, new_thread); | 178 | ready_queue.remove(new_thread->current_priority, new_thread); |
| @@ -179,7 +181,7 @@ static void SwitchContext(Thread* new_thread) { | |||
| 179 | Core::CPU().LoadContext(new_thread->context); | 181 | Core::CPU().LoadContext(new_thread->context); |
| 180 | Core::CPU().SetCP15Register(CP15_THREAD_URO, new_thread->GetTLSAddress()); | 182 | Core::CPU().SetCP15Register(CP15_THREAD_URO, new_thread->GetTLSAddress()); |
| 181 | 183 | ||
| 182 | if (!previous_thread || previous_thread->owner_process != current_thread->owner_process) { | 184 | if (previous_process != current_thread->owner_process) { |
| 183 | Kernel::g_current_process = current_thread->owner_process; | 185 | Kernel::g_current_process = current_thread->owner_process; |
| 184 | Memory::current_page_table = &Kernel::g_current_process->vm_manager.page_table; | 186 | Memory::current_page_table = &Kernel::g_current_process->vm_manager.page_table; |
| 185 | // We have switched processes and thus, page tables, clear the instruction cache so we | 187 | // We have switched processes and thus, page tables, clear the instruction cache so we |