diff options
Diffstat (limited to 'src/core/arm')
| -rw-r--r-- | src/core/arm/arm_interface.h | 57 | ||||
| -rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.cpp | 62 | ||||
| -rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.h | 32 | ||||
| -rw-r--r-- | src/core/arm/exclusive_monitor.h | 12 | ||||
| -rw-r--r-- | src/core/arm/unicorn/arm_unicorn.cpp | 31 | ||||
| -rw-r--r-- | src/core/arm/unicorn/arm_unicorn.h | 14 |
6 files changed, 98 insertions, 110 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index c368745b1..867e34932 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | 10 | ||
| 11 | namespace Core { | 11 | namespace Core { |
| 12 | 12 | ||
| 13 | /// Generic ARM11 CPU interface | 13 | /// Generic ARMv8 CPU interface |
| 14 | class ARM_Interface : NonCopyable { | 14 | class ARM_Interface : NonCopyable { |
| 15 | public: | 15 | public: |
| 16 | virtual ~ARM_Interface() {} | 16 | virtual ~ARM_Interface() {} |
| @@ -19,9 +19,9 @@ public: | |||
| 19 | std::array<u64, 31> cpu_registers; | 19 | std::array<u64, 31> cpu_registers; |
| 20 | u64 sp; | 20 | u64 sp; |
| 21 | u64 pc; | 21 | u64 pc; |
| 22 | u64 cpsr; | 22 | u64 pstate; |
| 23 | std::array<u128, 32> fpu_registers; | 23 | std::array<u128, 32> vector_registers; |
| 24 | u64 fpscr; | 24 | u64 fpcr; |
| 25 | }; | 25 | }; |
| 26 | 26 | ||
| 27 | /// Runs the CPU until an event happens | 27 | /// Runs the CPU until an event happens |
| @@ -31,11 +31,11 @@ public: | |||
| 31 | virtual void Step() = 0; | 31 | virtual void Step() = 0; |
| 32 | 32 | ||
| 33 | /// Maps a backing memory region for the CPU | 33 | /// Maps a backing memory region for the CPU |
| 34 | virtual void MapBackingMemory(VAddr address, size_t size, u8* memory, | 34 | virtual void MapBackingMemory(VAddr address, std::size_t size, u8* memory, |
| 35 | Kernel::VMAPermission perms) = 0; | 35 | Kernel::VMAPermission perms) = 0; |
| 36 | 36 | ||
| 37 | /// Unmaps a region of memory that was previously mapped using MapBackingMemory | 37 | /// Unmaps a region of memory that was previously mapped using MapBackingMemory |
| 38 | virtual void UnmapMemory(VAddr address, size_t size) = 0; | 38 | virtual void UnmapMemory(VAddr address, std::size_t size) = 0; |
| 39 | 39 | ||
| 40 | /// Clear all instruction cache | 40 | /// Clear all instruction cache |
| 41 | virtual void ClearInstructionCache() = 0; | 41 | virtual void ClearInstructionCache() = 0; |
| @@ -69,42 +69,50 @@ public: | |||
| 69 | */ | 69 | */ |
| 70 | virtual void SetReg(int index, u64 value) = 0; | 70 | virtual void SetReg(int index, u64 value) = 0; |
| 71 | 71 | ||
| 72 | virtual u128 GetExtReg(int index) const = 0; | ||
| 73 | |||
| 74 | virtual void SetExtReg(int index, u128 value) = 0; | ||
| 75 | |||
| 76 | /** | 72 | /** |
| 77 | * Gets the value of a VFP register | 73 | * Gets the value of a specified vector register. |
| 78 | * @param index Register index (0-31) | 74 | * |
| 79 | * @return Returns the value in the register | 75 | * @param index The index of the vector register. |
| 76 | * @return the value within the vector register. | ||
| 80 | */ | 77 | */ |
| 81 | virtual u32 GetVFPReg(int index) const = 0; | 78 | virtual u128 GetVectorReg(int index) const = 0; |
| 82 | 79 | ||
| 83 | /** | 80 | /** |
| 84 | * Sets a VFP register to the given value | 81 | * Sets a given value into a vector register. |
| 85 | * @param index Register index (0-31) | 82 | * |
| 86 | * @param value Value to set register to | 83 | * @param index The index of the vector register. |
| 84 | * @param value The new value to place in the register. | ||
| 87 | */ | 85 | */ |
| 88 | virtual void SetVFPReg(int index, u32 value) = 0; | 86 | virtual void SetVectorReg(int index, u128 value) = 0; |
| 89 | 87 | ||
| 90 | /** | 88 | /** |
| 91 | * Get the current CPSR register | 89 | * Get the current PSTATE register |
| 92 | * @return Returns the value of the CPSR register | 90 | * @return Returns the value of the PSTATE register |
| 93 | */ | 91 | */ |
| 94 | virtual u32 GetCPSR() const = 0; | 92 | virtual u32 GetPSTATE() const = 0; |
| 95 | 93 | ||
| 96 | /** | 94 | /** |
| 97 | * Set the current CPSR register | 95 | * Set the current PSTATE register |
| 98 | * @param cpsr Value to set CPSR to | 96 | * @param pstate Value to set PSTATE to |
| 99 | */ | 97 | */ |
| 100 | virtual void SetCPSR(u32 cpsr) = 0; | 98 | virtual void SetPSTATE(u32 pstate) = 0; |
| 101 | 99 | ||
| 102 | virtual VAddr GetTlsAddress() const = 0; | 100 | virtual VAddr GetTlsAddress() const = 0; |
| 103 | 101 | ||
| 104 | virtual void SetTlsAddress(VAddr address) = 0; | 102 | virtual void SetTlsAddress(VAddr address) = 0; |
| 105 | 103 | ||
| 104 | /** | ||
| 105 | * Gets the value within the TPIDR_EL0 (read/write software thread ID) register. | ||
| 106 | * | ||
| 107 | * @return the value within the register. | ||
| 108 | */ | ||
| 106 | virtual u64 GetTPIDR_EL0() const = 0; | 109 | virtual u64 GetTPIDR_EL0() const = 0; |
| 107 | 110 | ||
| 111 | /** | ||
| 112 | * Sets a new value within the TPIDR_EL0 (read/write software thread ID) register. | ||
| 113 | * | ||
| 114 | * @param value The new value to place in the register. | ||
| 115 | */ | ||
| 108 | virtual void SetTPIDR_EL0(u64 value) = 0; | 116 | virtual void SetTPIDR_EL0(u64 value) = 0; |
| 109 | 117 | ||
| 110 | /** | 118 | /** |
| @@ -119,6 +127,7 @@ public: | |||
| 119 | */ | 127 | */ |
| 120 | virtual void LoadContext(const ThreadContext& ctx) = 0; | 128 | virtual void LoadContext(const ThreadContext& ctx) = 0; |
| 121 | 129 | ||
| 130 | /// Clears the exclusive monitor's state. | ||
| 122 | virtual void ClearExclusiveState() = 0; | 131 | virtual void ClearExclusiveState() = 0; |
| 123 | 132 | ||
| 124 | /// Prepare core for thread reschedule (if needed to correctly handle state) | 133 | /// Prepare core for thread reschedule (if needed to correctly handle state) |
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index b47f04988..3f072c51f 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp | |||
| @@ -58,7 +58,7 @@ public: | |||
| 58 | Memory::Write64(vaddr + 8, value[1]); | 58 | Memory::Write64(vaddr + 8, value[1]); |
| 59 | } | 59 | } |
| 60 | 60 | ||
| 61 | void InterpreterFallback(u64 pc, size_t num_instructions) override { | 61 | void InterpreterFallback(u64 pc, std::size_t num_instructions) override { |
| 62 | LOG_INFO(Core_ARM, "Unicorn fallback @ 0x{:X} for {} instructions (instr = {:08X})", pc, | 62 | LOG_INFO(Core_ARM, "Unicorn fallback @ 0x{:X} for {} instructions (instr = {:08X})", pc, |
| 63 | num_instructions, MemoryReadCode(pc)); | 63 | num_instructions, MemoryReadCode(pc)); |
| 64 | 64 | ||
| @@ -81,7 +81,7 @@ public: | |||
| 81 | return; | 81 | return; |
| 82 | default: | 82 | default: |
| 83 | ASSERT_MSG(false, "ExceptionRaised(exception = {}, pc = {:X})", | 83 | ASSERT_MSG(false, "ExceptionRaised(exception = {}, pc = {:X})", |
| 84 | static_cast<size_t>(exception), pc); | 84 | static_cast<std::size_t>(exception), pc); |
| 85 | } | 85 | } |
| 86 | } | 86 | } |
| 87 | 87 | ||
| @@ -110,7 +110,7 @@ public: | |||
| 110 | } | 110 | } |
| 111 | 111 | ||
| 112 | ARM_Dynarmic& parent; | 112 | ARM_Dynarmic& parent; |
| 113 | size_t num_interpreted_instructions = 0; | 113 | std::size_t num_interpreted_instructions = 0; |
| 114 | u64 tpidrro_el0 = 0; | 114 | u64 tpidrro_el0 = 0; |
| 115 | u64 tpidr_el0 = 0; | 115 | u64 tpidr_el0 = 0; |
| 116 | }; | 116 | }; |
| @@ -157,7 +157,8 @@ void ARM_Dynarmic::Step() { | |||
| 157 | cb->InterpreterFallback(jit->GetPC(), 1); | 157 | cb->InterpreterFallback(jit->GetPC(), 1); |
| 158 | } | 158 | } |
| 159 | 159 | ||
| 160 | ARM_Dynarmic::ARM_Dynarmic(std::shared_ptr<ExclusiveMonitor> exclusive_monitor, size_t core_index) | 160 | ARM_Dynarmic::ARM_Dynarmic(std::shared_ptr<ExclusiveMonitor> exclusive_monitor, |
| 161 | std::size_t core_index) | ||
| 161 | : cb(std::make_unique<ARM_Dynarmic_Callbacks>(*this)), core_index{core_index}, | 162 | : cb(std::make_unique<ARM_Dynarmic_Callbacks>(*this)), core_index{core_index}, |
| 162 | exclusive_monitor{std::dynamic_pointer_cast<DynarmicExclusiveMonitor>(exclusive_monitor)} { | 163 | exclusive_monitor{std::dynamic_pointer_cast<DynarmicExclusiveMonitor>(exclusive_monitor)} { |
| 163 | ThreadContext ctx; | 164 | ThreadContext ctx; |
| @@ -168,12 +169,12 @@ ARM_Dynarmic::ARM_Dynarmic(std::shared_ptr<ExclusiveMonitor> exclusive_monitor, | |||
| 168 | 169 | ||
| 169 | ARM_Dynarmic::~ARM_Dynarmic() = default; | 170 | ARM_Dynarmic::~ARM_Dynarmic() = default; |
| 170 | 171 | ||
| 171 | void ARM_Dynarmic::MapBackingMemory(u64 address, size_t size, u8* memory, | 172 | void ARM_Dynarmic::MapBackingMemory(u64 address, std::size_t size, u8* memory, |
| 172 | Kernel::VMAPermission perms) { | 173 | Kernel::VMAPermission perms) { |
| 173 | inner_unicorn.MapBackingMemory(address, size, memory, perms); | 174 | inner_unicorn.MapBackingMemory(address, size, memory, perms); |
| 174 | } | 175 | } |
| 175 | 176 | ||
| 176 | void ARM_Dynarmic::UnmapMemory(u64 address, size_t size) { | 177 | void ARM_Dynarmic::UnmapMemory(u64 address, std::size_t size) { |
| 177 | inner_unicorn.UnmapMemory(address, size); | 178 | inner_unicorn.UnmapMemory(address, size); |
| 178 | } | 179 | } |
| 179 | 180 | ||
| @@ -193,29 +194,20 @@ void ARM_Dynarmic::SetReg(int index, u64 value) { | |||
| 193 | jit->SetRegister(index, value); | 194 | jit->SetRegister(index, value); |
| 194 | } | 195 | } |
| 195 | 196 | ||
| 196 | u128 ARM_Dynarmic::GetExtReg(int index) const { | 197 | u128 ARM_Dynarmic::GetVectorReg(int index) const { |
| 197 | return jit->GetVector(index); | 198 | return jit->GetVector(index); |
| 198 | } | 199 | } |
| 199 | 200 | ||
| 200 | void ARM_Dynarmic::SetExtReg(int index, u128 value) { | 201 | void ARM_Dynarmic::SetVectorReg(int index, u128 value) { |
| 201 | jit->SetVector(index, value); | 202 | jit->SetVector(index, value); |
| 202 | } | 203 | } |
| 203 | 204 | ||
| 204 | u32 ARM_Dynarmic::GetVFPReg(int /*index*/) const { | 205 | u32 ARM_Dynarmic::GetPSTATE() const { |
| 205 | UNIMPLEMENTED(); | ||
| 206 | return {}; | ||
| 207 | } | ||
| 208 | |||
| 209 | void ARM_Dynarmic::SetVFPReg(int /*index*/, u32 /*value*/) { | ||
| 210 | UNIMPLEMENTED(); | ||
| 211 | } | ||
| 212 | |||
| 213 | u32 ARM_Dynarmic::GetCPSR() const { | ||
| 214 | return jit->GetPstate(); | 206 | return jit->GetPstate(); |
| 215 | } | 207 | } |
| 216 | 208 | ||
| 217 | void ARM_Dynarmic::SetCPSR(u32 cpsr) { | 209 | void ARM_Dynarmic::SetPSTATE(u32 pstate) { |
| 218 | jit->SetPstate(cpsr); | 210 | jit->SetPstate(pstate); |
| 219 | } | 211 | } |
| 220 | 212 | ||
| 221 | u64 ARM_Dynarmic::GetTlsAddress() const { | 213 | u64 ARM_Dynarmic::GetTlsAddress() const { |
| @@ -238,18 +230,18 @@ void ARM_Dynarmic::SaveContext(ThreadContext& ctx) { | |||
| 238 | ctx.cpu_registers = jit->GetRegisters(); | 230 | ctx.cpu_registers = jit->GetRegisters(); |
| 239 | ctx.sp = jit->GetSP(); | 231 | ctx.sp = jit->GetSP(); |
| 240 | ctx.pc = jit->GetPC(); | 232 | ctx.pc = jit->GetPC(); |
| 241 | ctx.cpsr = jit->GetPstate(); | 233 | ctx.pstate = jit->GetPstate(); |
| 242 | ctx.fpu_registers = jit->GetVectors(); | 234 | ctx.vector_registers = jit->GetVectors(); |
| 243 | ctx.fpscr = jit->GetFpcr(); | 235 | ctx.fpcr = jit->GetFpcr(); |
| 244 | } | 236 | } |
| 245 | 237 | ||
| 246 | void ARM_Dynarmic::LoadContext(const ThreadContext& ctx) { | 238 | void ARM_Dynarmic::LoadContext(const ThreadContext& ctx) { |
| 247 | jit->SetRegisters(ctx.cpu_registers); | 239 | jit->SetRegisters(ctx.cpu_registers); |
| 248 | jit->SetSP(ctx.sp); | 240 | jit->SetSP(ctx.sp); |
| 249 | jit->SetPC(ctx.pc); | 241 | jit->SetPC(ctx.pc); |
| 250 | jit->SetPstate(static_cast<u32>(ctx.cpsr)); | 242 | jit->SetPstate(static_cast<u32>(ctx.pstate)); |
| 251 | jit->SetVectors(ctx.fpu_registers); | 243 | jit->SetVectors(ctx.vector_registers); |
| 252 | jit->SetFpcr(static_cast<u32>(ctx.fpscr)); | 244 | jit->SetFpcr(static_cast<u32>(ctx.fpcr)); |
| 253 | } | 245 | } |
| 254 | 246 | ||
| 255 | void ARM_Dynarmic::PrepareReschedule() { | 247 | void ARM_Dynarmic::PrepareReschedule() { |
| @@ -269,10 +261,10 @@ void ARM_Dynarmic::PageTableChanged() { | |||
| 269 | current_page_table = Memory::GetCurrentPageTable(); | 261 | current_page_table = Memory::GetCurrentPageTable(); |
| 270 | } | 262 | } |
| 271 | 263 | ||
| 272 | DynarmicExclusiveMonitor::DynarmicExclusiveMonitor(size_t core_count) : monitor(core_count) {} | 264 | DynarmicExclusiveMonitor::DynarmicExclusiveMonitor(std::size_t core_count) : monitor(core_count) {} |
| 273 | DynarmicExclusiveMonitor::~DynarmicExclusiveMonitor() = default; | 265 | DynarmicExclusiveMonitor::~DynarmicExclusiveMonitor() = default; |
| 274 | 266 | ||
| 275 | void DynarmicExclusiveMonitor::SetExclusive(size_t core_index, VAddr addr) { | 267 | void DynarmicExclusiveMonitor::SetExclusive(std::size_t core_index, VAddr addr) { |
| 276 | // Size doesn't actually matter. | 268 | // Size doesn't actually matter. |
| 277 | monitor.Mark(core_index, addr, 16); | 269 | monitor.Mark(core_index, addr, 16); |
| 278 | } | 270 | } |
| @@ -281,30 +273,30 @@ void DynarmicExclusiveMonitor::ClearExclusive() { | |||
| 281 | monitor.Clear(); | 273 | monitor.Clear(); |
| 282 | } | 274 | } |
| 283 | 275 | ||
| 284 | bool DynarmicExclusiveMonitor::ExclusiveWrite8(size_t core_index, VAddr vaddr, u8 value) { | 276 | bool DynarmicExclusiveMonitor::ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) { |
| 285 | return monitor.DoExclusiveOperation(core_index, vaddr, 1, | 277 | return monitor.DoExclusiveOperation(core_index, vaddr, 1, |
| 286 | [&] { Memory::Write8(vaddr, value); }); | 278 | [&] { Memory::Write8(vaddr, value); }); |
| 287 | } | 279 | } |
| 288 | 280 | ||
| 289 | bool DynarmicExclusiveMonitor::ExclusiveWrite16(size_t core_index, VAddr vaddr, u16 value) { | 281 | bool DynarmicExclusiveMonitor::ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) { |
| 290 | return monitor.DoExclusiveOperation(core_index, vaddr, 2, | 282 | return monitor.DoExclusiveOperation(core_index, vaddr, 2, |
| 291 | [&] { Memory::Write16(vaddr, value); }); | 283 | [&] { Memory::Write16(vaddr, value); }); |
| 292 | } | 284 | } |
| 293 | 285 | ||
| 294 | bool DynarmicExclusiveMonitor::ExclusiveWrite32(size_t core_index, VAddr vaddr, u32 value) { | 286 | bool DynarmicExclusiveMonitor::ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) { |
| 295 | return monitor.DoExclusiveOperation(core_index, vaddr, 4, | 287 | return monitor.DoExclusiveOperation(core_index, vaddr, 4, |
| 296 | [&] { Memory::Write32(vaddr, value); }); | 288 | [&] { Memory::Write32(vaddr, value); }); |
| 297 | } | 289 | } |
| 298 | 290 | ||
| 299 | bool DynarmicExclusiveMonitor::ExclusiveWrite64(size_t core_index, VAddr vaddr, u64 value) { | 291 | bool DynarmicExclusiveMonitor::ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) { |
| 300 | return monitor.DoExclusiveOperation(core_index, vaddr, 8, | 292 | return monitor.DoExclusiveOperation(core_index, vaddr, 8, |
| 301 | [&] { Memory::Write64(vaddr, value); }); | 293 | [&] { Memory::Write64(vaddr, value); }); |
| 302 | } | 294 | } |
| 303 | 295 | ||
| 304 | bool DynarmicExclusiveMonitor::ExclusiveWrite128(size_t core_index, VAddr vaddr, u128 value) { | 296 | bool DynarmicExclusiveMonitor::ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) { |
| 305 | return monitor.DoExclusiveOperation(core_index, vaddr, 16, [&] { | 297 | return monitor.DoExclusiveOperation(core_index, vaddr, 16, [&] { |
| 306 | Memory::Write64(vaddr, value[0]); | 298 | Memory::Write64(vaddr + 0, value[0]); |
| 307 | Memory::Write64(vaddr, value[1]); | 299 | Memory::Write64(vaddr + 8, value[1]); |
| 308 | }); | 300 | }); |
| 309 | } | 301 | } |
| 310 | 302 | ||
diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h index 3bdfd8cd9..e61382d3d 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.h +++ b/src/core/arm/dynarmic/arm_dynarmic.h | |||
| @@ -19,24 +19,22 @@ class DynarmicExclusiveMonitor; | |||
| 19 | 19 | ||
| 20 | class ARM_Dynarmic final : public ARM_Interface { | 20 | class ARM_Dynarmic final : public ARM_Interface { |
| 21 | public: | 21 | public: |
| 22 | ARM_Dynarmic(std::shared_ptr<ExclusiveMonitor> exclusive_monitor, size_t core_index); | 22 | ARM_Dynarmic(std::shared_ptr<ExclusiveMonitor> exclusive_monitor, std::size_t core_index); |
| 23 | ~ARM_Dynarmic(); | 23 | ~ARM_Dynarmic(); |
| 24 | 24 | ||
| 25 | void MapBackingMemory(VAddr address, size_t size, u8* memory, | 25 | void MapBackingMemory(VAddr address, std::size_t size, u8* memory, |
| 26 | Kernel::VMAPermission perms) override; | 26 | Kernel::VMAPermission perms) override; |
| 27 | void UnmapMemory(u64 address, size_t size) override; | 27 | void UnmapMemory(u64 address, std::size_t size) override; |
| 28 | void SetPC(u64 pc) override; | 28 | void SetPC(u64 pc) override; |
| 29 | u64 GetPC() const override; | 29 | u64 GetPC() const override; |
| 30 | u64 GetReg(int index) const override; | 30 | u64 GetReg(int index) const override; |
| 31 | void SetReg(int index, u64 value) override; | 31 | void SetReg(int index, u64 value) override; |
| 32 | u128 GetExtReg(int index) const override; | 32 | u128 GetVectorReg(int index) const override; |
| 33 | void SetExtReg(int index, u128 value) override; | 33 | void SetVectorReg(int index, u128 value) override; |
| 34 | u32 GetVFPReg(int index) const override; | 34 | u32 GetPSTATE() const override; |
| 35 | void SetVFPReg(int index, u32 value) override; | 35 | void SetPSTATE(u32 pstate) override; |
| 36 | u32 GetCPSR() const override; | ||
| 37 | void Run() override; | 36 | void Run() override; |
| 38 | void Step() override; | 37 | void Step() override; |
| 39 | void SetCPSR(u32 cpsr) override; | ||
| 40 | VAddr GetTlsAddress() const override; | 38 | VAddr GetTlsAddress() const override; |
| 41 | void SetTlsAddress(VAddr address) override; | 39 | void SetTlsAddress(VAddr address) override; |
| 42 | void SetTPIDR_EL0(u64 value) override; | 40 | void SetTPIDR_EL0(u64 value) override; |
| @@ -59,7 +57,7 @@ private: | |||
| 59 | std::unique_ptr<Dynarmic::A64::Jit> jit; | 57 | std::unique_ptr<Dynarmic::A64::Jit> jit; |
| 60 | ARM_Unicorn inner_unicorn; | 58 | ARM_Unicorn inner_unicorn; |
| 61 | 59 | ||
| 62 | size_t core_index; | 60 | std::size_t core_index; |
| 63 | std::shared_ptr<DynarmicExclusiveMonitor> exclusive_monitor; | 61 | std::shared_ptr<DynarmicExclusiveMonitor> exclusive_monitor; |
| 64 | 62 | ||
| 65 | Memory::PageTable* current_page_table = nullptr; | 63 | Memory::PageTable* current_page_table = nullptr; |
| @@ -67,17 +65,17 @@ private: | |||
| 67 | 65 | ||
| 68 | class DynarmicExclusiveMonitor final : public ExclusiveMonitor { | 66 | class DynarmicExclusiveMonitor final : public ExclusiveMonitor { |
| 69 | public: | 67 | public: |
| 70 | explicit DynarmicExclusiveMonitor(size_t core_count); | 68 | explicit DynarmicExclusiveMonitor(std::size_t core_count); |
| 71 | ~DynarmicExclusiveMonitor(); | 69 | ~DynarmicExclusiveMonitor(); |
| 72 | 70 | ||
| 73 | void SetExclusive(size_t core_index, VAddr addr) override; | 71 | void SetExclusive(std::size_t core_index, VAddr addr) override; |
| 74 | void ClearExclusive() override; | 72 | void ClearExclusive() override; |
| 75 | 73 | ||
| 76 | bool ExclusiveWrite8(size_t core_index, VAddr vaddr, u8 value) override; | 74 | bool ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) override; |
| 77 | bool ExclusiveWrite16(size_t core_index, VAddr vaddr, u16 value) override; | 75 | bool ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) override; |
| 78 | bool ExclusiveWrite32(size_t core_index, VAddr vaddr, u32 value) override; | 76 | bool ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) override; |
| 79 | bool ExclusiveWrite64(size_t core_index, VAddr vaddr, u64 value) override; | 77 | bool ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) override; |
| 80 | bool ExclusiveWrite128(size_t core_index, VAddr vaddr, u128 value) override; | 78 | bool ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) override; |
| 81 | 79 | ||
| 82 | private: | 80 | private: |
| 83 | friend class ARM_Dynarmic; | 81 | friend class ARM_Dynarmic; |
diff --git a/src/core/arm/exclusive_monitor.h b/src/core/arm/exclusive_monitor.h index 6f9b51573..f59aca667 100644 --- a/src/core/arm/exclusive_monitor.h +++ b/src/core/arm/exclusive_monitor.h | |||
| @@ -12,14 +12,14 @@ class ExclusiveMonitor { | |||
| 12 | public: | 12 | public: |
| 13 | virtual ~ExclusiveMonitor(); | 13 | virtual ~ExclusiveMonitor(); |
| 14 | 14 | ||
| 15 | virtual void SetExclusive(size_t core_index, VAddr addr) = 0; | 15 | virtual void SetExclusive(std::size_t core_index, VAddr addr) = 0; |
| 16 | virtual void ClearExclusive() = 0; | 16 | virtual void ClearExclusive() = 0; |
| 17 | 17 | ||
| 18 | virtual bool ExclusiveWrite8(size_t core_index, VAddr vaddr, u8 value) = 0; | 18 | virtual bool ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) = 0; |
| 19 | virtual bool ExclusiveWrite16(size_t core_index, VAddr vaddr, u16 value) = 0; | 19 | virtual bool ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) = 0; |
| 20 | virtual bool ExclusiveWrite32(size_t core_index, VAddr vaddr, u32 value) = 0; | 20 | virtual bool ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) = 0; |
| 21 | virtual bool ExclusiveWrite64(size_t core_index, VAddr vaddr, u64 value) = 0; | 21 | virtual bool ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) = 0; |
| 22 | virtual bool ExclusiveWrite128(size_t core_index, VAddr vaddr, u128 value) = 0; | 22 | virtual bool ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) = 0; |
| 23 | }; | 23 | }; |
| 24 | 24 | ||
| 25 | } // namespace Core | 25 | } // namespace Core |
diff --git a/src/core/arm/unicorn/arm_unicorn.cpp b/src/core/arm/unicorn/arm_unicorn.cpp index 4c4de2623..e218a0b15 100644 --- a/src/core/arm/unicorn/arm_unicorn.cpp +++ b/src/core/arm/unicorn/arm_unicorn.cpp | |||
| @@ -90,12 +90,12 @@ ARM_Unicorn::~ARM_Unicorn() { | |||
| 90 | CHECKED(uc_close(uc)); | 90 | CHECKED(uc_close(uc)); |
| 91 | } | 91 | } |
| 92 | 92 | ||
| 93 | void ARM_Unicorn::MapBackingMemory(VAddr address, size_t size, u8* memory, | 93 | void ARM_Unicorn::MapBackingMemory(VAddr address, std::size_t size, u8* memory, |
| 94 | Kernel::VMAPermission perms) { | 94 | Kernel::VMAPermission perms) { |
| 95 | CHECKED(uc_mem_map_ptr(uc, address, size, static_cast<u32>(perms), memory)); | 95 | CHECKED(uc_mem_map_ptr(uc, address, size, static_cast<u32>(perms), memory)); |
| 96 | } | 96 | } |
| 97 | 97 | ||
| 98 | void ARM_Unicorn::UnmapMemory(VAddr address, size_t size) { | 98 | void ARM_Unicorn::UnmapMemory(VAddr address, std::size_t size) { |
| 99 | CHECKED(uc_mem_unmap(uc, address, size)); | 99 | CHECKED(uc_mem_unmap(uc, address, size)); |
| 100 | } | 100 | } |
| 101 | 101 | ||
| @@ -131,33 +131,24 @@ void ARM_Unicorn::SetReg(int regn, u64 val) { | |||
| 131 | CHECKED(uc_reg_write(uc, treg, &val)); | 131 | CHECKED(uc_reg_write(uc, treg, &val)); |
| 132 | } | 132 | } |
| 133 | 133 | ||
| 134 | u128 ARM_Unicorn::GetExtReg(int /*index*/) const { | 134 | u128 ARM_Unicorn::GetVectorReg(int /*index*/) const { |
| 135 | UNIMPLEMENTED(); | 135 | UNIMPLEMENTED(); |
| 136 | static constexpr u128 res{}; | 136 | static constexpr u128 res{}; |
| 137 | return res; | 137 | return res; |
| 138 | } | 138 | } |
| 139 | 139 | ||
| 140 | void ARM_Unicorn::SetExtReg(int /*index*/, u128 /*value*/) { | 140 | void ARM_Unicorn::SetVectorReg(int /*index*/, u128 /*value*/) { |
| 141 | UNIMPLEMENTED(); | 141 | UNIMPLEMENTED(); |
| 142 | } | 142 | } |
| 143 | 143 | ||
| 144 | u32 ARM_Unicorn::GetVFPReg(int /*index*/) const { | 144 | u32 ARM_Unicorn::GetPSTATE() const { |
| 145 | UNIMPLEMENTED(); | ||
| 146 | return {}; | ||
| 147 | } | ||
| 148 | |||
| 149 | void ARM_Unicorn::SetVFPReg(int /*index*/, u32 /*value*/) { | ||
| 150 | UNIMPLEMENTED(); | ||
| 151 | } | ||
| 152 | |||
| 153 | u32 ARM_Unicorn::GetCPSR() const { | ||
| 154 | u64 nzcv{}; | 145 | u64 nzcv{}; |
| 155 | CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &nzcv)); | 146 | CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &nzcv)); |
| 156 | return static_cast<u32>(nzcv); | 147 | return static_cast<u32>(nzcv); |
| 157 | } | 148 | } |
| 158 | 149 | ||
| 159 | void ARM_Unicorn::SetCPSR(u32 cpsr) { | 150 | void ARM_Unicorn::SetPSTATE(u32 pstate) { |
| 160 | u64 nzcv = cpsr; | 151 | u64 nzcv = pstate; |
| 161 | CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &nzcv)); | 152 | CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &nzcv)); |
| 162 | } | 153 | } |
| 163 | 154 | ||
| @@ -219,7 +210,7 @@ void ARM_Unicorn::SaveContext(ThreadContext& ctx) { | |||
| 219 | 210 | ||
| 220 | CHECKED(uc_reg_read(uc, UC_ARM64_REG_SP, &ctx.sp)); | 211 | CHECKED(uc_reg_read(uc, UC_ARM64_REG_SP, &ctx.sp)); |
| 221 | CHECKED(uc_reg_read(uc, UC_ARM64_REG_PC, &ctx.pc)); | 212 | CHECKED(uc_reg_read(uc, UC_ARM64_REG_PC, &ctx.pc)); |
| 222 | CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &ctx.cpsr)); | 213 | CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &ctx.pstate)); |
| 223 | 214 | ||
| 224 | for (auto i = 0; i < 29; ++i) { | 215 | for (auto i = 0; i < 29; ++i) { |
| 225 | uregs[i] = UC_ARM64_REG_X0 + i; | 216 | uregs[i] = UC_ARM64_REG_X0 + i; |
| @@ -234,7 +225,7 @@ void ARM_Unicorn::SaveContext(ThreadContext& ctx) { | |||
| 234 | 225 | ||
| 235 | for (int i = 0; i < 32; ++i) { | 226 | for (int i = 0; i < 32; ++i) { |
| 236 | uregs[i] = UC_ARM64_REG_Q0 + i; | 227 | uregs[i] = UC_ARM64_REG_Q0 + i; |
| 237 | tregs[i] = &ctx.fpu_registers[i]; | 228 | tregs[i] = &ctx.vector_registers[i]; |
| 238 | } | 229 | } |
| 239 | 230 | ||
| 240 | CHECKED(uc_reg_read_batch(uc, uregs, tregs, 32)); | 231 | CHECKED(uc_reg_read_batch(uc, uregs, tregs, 32)); |
| @@ -246,7 +237,7 @@ void ARM_Unicorn::LoadContext(const ThreadContext& ctx) { | |||
| 246 | 237 | ||
| 247 | CHECKED(uc_reg_write(uc, UC_ARM64_REG_SP, &ctx.sp)); | 238 | CHECKED(uc_reg_write(uc, UC_ARM64_REG_SP, &ctx.sp)); |
| 248 | CHECKED(uc_reg_write(uc, UC_ARM64_REG_PC, &ctx.pc)); | 239 | CHECKED(uc_reg_write(uc, UC_ARM64_REG_PC, &ctx.pc)); |
| 249 | CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &ctx.cpsr)); | 240 | CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &ctx.pstate)); |
| 250 | 241 | ||
| 251 | for (int i = 0; i < 29; ++i) { | 242 | for (int i = 0; i < 29; ++i) { |
| 252 | uregs[i] = UC_ARM64_REG_X0 + i; | 243 | uregs[i] = UC_ARM64_REG_X0 + i; |
| @@ -261,7 +252,7 @@ void ARM_Unicorn::LoadContext(const ThreadContext& ctx) { | |||
| 261 | 252 | ||
| 262 | for (auto i = 0; i < 32; ++i) { | 253 | for (auto i = 0; i < 32; ++i) { |
| 263 | uregs[i] = UC_ARM64_REG_Q0 + i; | 254 | uregs[i] = UC_ARM64_REG_Q0 + i; |
| 264 | tregs[i] = (void*)&ctx.fpu_registers[i]; | 255 | tregs[i] = (void*)&ctx.vector_registers[i]; |
| 265 | } | 256 | } |
| 266 | 257 | ||
| 267 | CHECKED(uc_reg_write_batch(uc, uregs, tregs, 32)); | 258 | CHECKED(uc_reg_write_batch(uc, uregs, tregs, 32)); |
diff --git a/src/core/arm/unicorn/arm_unicorn.h b/src/core/arm/unicorn/arm_unicorn.h index bd6b2f723..75761950b 100644 --- a/src/core/arm/unicorn/arm_unicorn.h +++ b/src/core/arm/unicorn/arm_unicorn.h | |||
| @@ -15,19 +15,17 @@ class ARM_Unicorn final : public ARM_Interface { | |||
| 15 | public: | 15 | public: |
| 16 | ARM_Unicorn(); | 16 | ARM_Unicorn(); |
| 17 | ~ARM_Unicorn(); | 17 | ~ARM_Unicorn(); |
| 18 | void MapBackingMemory(VAddr address, size_t size, u8* memory, | 18 | void MapBackingMemory(VAddr address, std::size_t size, u8* memory, |
| 19 | Kernel::VMAPermission perms) override; | 19 | Kernel::VMAPermission perms) override; |
| 20 | void UnmapMemory(VAddr address, size_t size) override; | 20 | void UnmapMemory(VAddr address, std::size_t size) override; |
| 21 | void SetPC(u64 pc) override; | 21 | void SetPC(u64 pc) override; |
| 22 | u64 GetPC() const override; | 22 | u64 GetPC() const override; |
| 23 | u64 GetReg(int index) const override; | 23 | u64 GetReg(int index) const override; |
| 24 | void SetReg(int index, u64 value) override; | 24 | void SetReg(int index, u64 value) override; |
| 25 | u128 GetExtReg(int index) const override; | 25 | u128 GetVectorReg(int index) const override; |
| 26 | void SetExtReg(int index, u128 value) override; | 26 | void SetVectorReg(int index, u128 value) override; |
| 27 | u32 GetVFPReg(int index) const override; | 27 | u32 GetPSTATE() const override; |
| 28 | void SetVFPReg(int index, u32 value) override; | 28 | void SetPSTATE(u32 pstate) override; |
| 29 | u32 GetCPSR() const override; | ||
| 30 | void SetCPSR(u32 cpsr) override; | ||
| 31 | VAddr GetTlsAddress() const override; | 29 | VAddr GetTlsAddress() const override; |
| 32 | void SetTlsAddress(VAddr address) override; | 30 | void SetTlsAddress(VAddr address) override; |
| 33 | void SetTPIDR_EL0(u64 value) override; | 31 | void SetTPIDR_EL0(u64 value) override; |