diff options
Diffstat (limited to 'src/core/arm/skyeye_common')
| -rw-r--r-- | src/core/arm/skyeye_common/arm_regformat.h | 4 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armcpu.h | 5 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armos.h | 9 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/skyeye_defs.h | 4 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/skyeye_types.h | 55 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/vfp/vfpinstr.cpp | 48 |
6 files changed, 87 insertions, 38 deletions
diff --git a/src/core/arm/skyeye_common/arm_regformat.h b/src/core/arm/skyeye_common/arm_regformat.h index 0ca62780b..4dac1a8bf 100644 --- a/src/core/arm/skyeye_common/arm_regformat.h +++ b/src/core/arm/skyeye_common/arm_regformat.h | |||
| @@ -99,5 +99,7 @@ enum arm_regno{ | |||
| 99 | MAX_REG_NUM, | 99 | MAX_REG_NUM, |
| 100 | }; | 100 | }; |
| 101 | 101 | ||
| 102 | #define VFP_OFFSET(x) (x - VFP_BASE) | 102 | #define CP15(idx) (idx - CP15_BASE) |
| 103 | #define VFP_OFFSET(x) (x - VFP_BASE) | ||
| 104 | |||
| 103 | #endif | 105 | #endif |
diff --git a/src/core/arm/skyeye_common/armcpu.h b/src/core/arm/skyeye_common/armcpu.h index 6b5ea8566..3a029f0e7 100644 --- a/src/core/arm/skyeye_common/armcpu.h +++ b/src/core/arm/skyeye_common/armcpu.h | |||
| @@ -20,16 +20,13 @@ | |||
| 20 | 20 | ||
| 21 | #ifndef __ARM_CPU_H__ | 21 | #ifndef __ARM_CPU_H__ |
| 22 | #define __ARM_CPU_H__ | 22 | #define __ARM_CPU_H__ |
| 23 | //#include <skyeye_thread.h> | ||
| 24 | //#include <skyeye_obj.h> | ||
| 25 | //#include <skyeye_mach.h> | ||
| 26 | //#include <skyeye_exec.h> | ||
| 27 | 23 | ||
| 28 | #include <stddef.h> | 24 | #include <stddef.h> |
| 29 | #include <stdio.h> | 25 | #include <stdio.h> |
| 30 | 26 | ||
| 31 | #include "common/thread.h" | 27 | #include "common/thread.h" |
| 32 | 28 | ||
| 29 | #include "core/arm/skyeye_common/armdefs.h" | ||
| 33 | 30 | ||
| 34 | typedef struct ARM_CPU_State_s { | 31 | typedef struct ARM_CPU_State_s { |
| 35 | ARMul_State * core; | 32 | ARMul_State * core; |
diff --git a/src/core/arm/skyeye_common/armos.h b/src/core/arm/skyeye_common/armos.h index 4b58801ad..ffdadcd1c 100644 --- a/src/core/arm/skyeye_common/armos.h +++ b/src/core/arm/skyeye_common/armos.h | |||
| @@ -15,14 +15,7 @@ | |||
| 15 | along with this program; if not, write to the Free Software | 15 | along with this program; if not, write to the Free Software |
| 16 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | 16 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 17 | 17 | ||
| 18 | //#include "bank_defs.h" | 18 | #include <stdint.h> |
| 19 | //#include "dyncom/defines.h" | ||
| 20 | |||
| 21 | //typedef struct mmap_area{ | ||
| 22 | // mem_bank_t bank; | ||
| 23 | // void *mmap_addr; | ||
| 24 | // struct mmap_area *next; | ||
| 25 | //}mmap_area_t; | ||
| 26 | 19 | ||
| 27 | #if FAST_MEMORY | 20 | #if FAST_MEMORY |
| 28 | /* in user mode, mmap_base will be on initial brk, | 21 | /* in user mode, mmap_base will be on initial brk, |
diff --git a/src/core/arm/skyeye_common/skyeye_defs.h b/src/core/arm/skyeye_common/skyeye_defs.h index b6713ebad..d4088383f 100644 --- a/src/core/arm/skyeye_common/skyeye_defs.h +++ b/src/core/arm/skyeye_common/skyeye_defs.h | |||
| @@ -108,4 +108,6 @@ typedef struct generic_arch_s | |||
| 108 | align_t alignment; | 108 | align_t alignment; |
| 109 | } generic_arch_t; | 109 | } generic_arch_t; |
| 110 | 110 | ||
| 111 | #endif \ No newline at end of file | 111 | typedef u32 addr_t; |
| 112 | |||
| 113 | #endif | ||
diff --git a/src/core/arm/skyeye_common/skyeye_types.h b/src/core/arm/skyeye_common/skyeye_types.h new file mode 100644 index 000000000..e7f022f19 --- /dev/null +++ b/src/core/arm/skyeye_common/skyeye_types.h | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | /* | ||
| 2 | skyeye_types.h - some data types definition for skyeye debugger | ||
| 3 | Copyright (C) 2003 Skyeye Develop Group | ||
| 4 | for help please send mail to <skyeye-developer@lists.sf.linuxforum.net> | ||
| 5 | |||
| 6 | This program is free software; you can redistribute it and/or modify | ||
| 7 | it under the terms of the GNU General Public License as published by | ||
| 8 | the Free Software Foundation; either version 2 of the License, or | ||
| 9 | (at your option) any later version. | ||
| 10 | |||
| 11 | This program is distributed in the hope that it will be useful, | ||
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | GNU General Public License for more details. | ||
| 15 | |||
| 16 | You should have received a copy of the GNU General Public License | ||
| 17 | along with this program; if not, write to the Free Software | ||
| 18 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 19 | |||
| 20 | */ | ||
| 21 | /* | ||
| 22 | * 12/16/2006 Michael.Kang <blackfin.kang@gmail.com> | ||
| 23 | */ | ||
| 24 | |||
| 25 | #ifndef __SKYEYE_TYPES_H | ||
| 26 | #define __SKYEYE_TYPES_H | ||
| 27 | |||
| 28 | #include <stdint.h> | ||
| 29 | |||
| 30 | /*default machine word length */ | ||
| 31 | |||
| 32 | #ifndef __BEOS__ | ||
| 33 | /* To avoid the type conflict with the qemu */ | ||
| 34 | #ifndef QEMU | ||
| 35 | typedef uint8_t uint8; | ||
| 36 | typedef uint16_t uint16; | ||
| 37 | typedef uint32_t uint32; | ||
| 38 | typedef uint64_t uint64; | ||
| 39 | |||
| 40 | typedef int8_t sint8; | ||
| 41 | typedef int16_t sint16; | ||
| 42 | typedef int32_t sint32; | ||
| 43 | typedef int64_t sint64; | ||
| 44 | #endif | ||
| 45 | |||
| 46 | typedef uint32_t address_t; | ||
| 47 | typedef uint32_t uinteger_t; | ||
| 48 | typedef int32_t integer_t; | ||
| 49 | |||
| 50 | typedef uint32_t physical_address_t; | ||
| 51 | typedef uint32_t generic_address_t; | ||
| 52 | |||
| 53 | #endif | ||
| 54 | |||
| 55 | #endif | ||
diff --git a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp index a57047911..45208fb13 100644 --- a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp +++ b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp | |||
| @@ -3709,7 +3709,7 @@ VFPLABEL_INST: | |||
| 3709 | { | 3709 | { |
| 3710 | fault = check_address_validity(cpu, addr, &phys_addr, 0); | 3710 | fault = check_address_validity(cpu, addr, &phys_addr, 0); |
| 3711 | if (fault) goto MMU_EXCEPTION; | 3711 | if (fault) goto MMU_EXCEPTION; |
| 3712 | fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[inst_cream->d], 32); | 3712 | fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[inst_cream->d], 32); |
| 3713 | if (fault) goto MMU_EXCEPTION; | 3713 | if (fault) goto MMU_EXCEPTION; |
| 3714 | DBG("\taddr[%x] <= s%d=[%x]\n", addr, inst_cream->d, cpu->ExtReg[inst_cream->d]); | 3714 | DBG("\taddr[%x] <= s%d=[%x]\n", addr, inst_cream->d, cpu->ExtReg[inst_cream->d]); |
| 3715 | } | 3715 | } |
| @@ -3719,13 +3719,13 @@ VFPLABEL_INST: | |||
| 3719 | if (fault) goto MMU_EXCEPTION; | 3719 | if (fault) goto MMU_EXCEPTION; |
| 3720 | 3720 | ||
| 3721 | /* Check endianness */ | 3721 | /* Check endianness */ |
| 3722 | fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[inst_cream->d*2], 32); | 3722 | fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[inst_cream->d*2], 32); |
| 3723 | if (fault) goto MMU_EXCEPTION; | 3723 | if (fault) goto MMU_EXCEPTION; |
| 3724 | 3724 | ||
| 3725 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 0); | 3725 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 0); |
| 3726 | if (fault) goto MMU_EXCEPTION; | 3726 | if (fault) goto MMU_EXCEPTION; |
| 3727 | 3727 | ||
| 3728 | fault = interpreter_write_memory(core, addr + 4, phys_addr, cpu->ExtReg[inst_cream->d*2+1], 32); | 3728 | fault = interpreter_write_memory(addr + 4, phys_addr, cpu->ExtReg[inst_cream->d*2+1], 32); |
| 3729 | if (fault) goto MMU_EXCEPTION; | 3729 | if (fault) goto MMU_EXCEPTION; |
| 3730 | DBG("\taddr[%x-%x] <= s[%d-%d]=[%x-%x]\n", addr+4, addr, inst_cream->d*2+1, inst_cream->d*2, cpu->ExtReg[inst_cream->d*2+1], cpu->ExtReg[inst_cream->d*2]); | 3730 | DBG("\taddr[%x-%x] <= s[%d-%d]=[%x-%x]\n", addr+4, addr, inst_cream->d*2+1, inst_cream->d*2, cpu->ExtReg[inst_cream->d*2+1], cpu->ExtReg[inst_cream->d*2]); |
| 3731 | } | 3731 | } |
| @@ -3926,7 +3926,7 @@ VFPLABEL_INST: | |||
| 3926 | { | 3926 | { |
| 3927 | fault = check_address_validity(cpu, addr, &phys_addr, 0); | 3927 | fault = check_address_validity(cpu, addr, &phys_addr, 0); |
| 3928 | if (fault) goto MMU_EXCEPTION; | 3928 | if (fault) goto MMU_EXCEPTION; |
| 3929 | fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); | 3929 | fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); |
| 3930 | if (fault) goto MMU_EXCEPTION; | 3930 | if (fault) goto MMU_EXCEPTION; |
| 3931 | DBG("\taddr[%x] <= s%d=[%x]\n", addr, inst_cream->d+i, cpu->ExtReg[inst_cream->d+i]); | 3931 | DBG("\taddr[%x] <= s%d=[%x]\n", addr, inst_cream->d+i, cpu->ExtReg[inst_cream->d+i]); |
| 3932 | addr += 4; | 3932 | addr += 4; |
| @@ -3936,12 +3936,12 @@ VFPLABEL_INST: | |||
| 3936 | /* Careful of endianness, little by default */ | 3936 | /* Careful of endianness, little by default */ |
| 3937 | fault = check_address_validity(cpu, addr, &phys_addr, 0); | 3937 | fault = check_address_validity(cpu, addr, &phys_addr, 0); |
| 3938 | if (fault) goto MMU_EXCEPTION; | 3938 | if (fault) goto MMU_EXCEPTION; |
| 3939 | fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2], 32); | 3939 | fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2], 32); |
| 3940 | if (fault) goto MMU_EXCEPTION; | 3940 | if (fault) goto MMU_EXCEPTION; |
| 3941 | 3941 | ||
| 3942 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 0); | 3942 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 0); |
| 3943 | if (fault) goto MMU_EXCEPTION; | 3943 | if (fault) goto MMU_EXCEPTION; |
| 3944 | fault = interpreter_write_memory(core, addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); | 3944 | fault = interpreter_write_memory(addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); |
| 3945 | if (fault) goto MMU_EXCEPTION; | 3945 | if (fault) goto MMU_EXCEPTION; |
| 3946 | DBG("\taddr[%x-%x] <= s[%d-%d]=[%x-%x]\n", addr+4, addr, (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, cpu->ExtReg[(inst_cream->d+i)*2+1], cpu->ExtReg[(inst_cream->d+i)*2]); | 3946 | DBG("\taddr[%x-%x] <= s[%d-%d]=[%x-%x]\n", addr+4, addr, (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, cpu->ExtReg[(inst_cream->d+i)*2+1], cpu->ExtReg[(inst_cream->d+i)*2]); |
| 3947 | addr += 8; | 3947 | addr += 8; |
| @@ -4048,7 +4048,7 @@ int DYNCOM_TRANS(vfpinstr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc | |||
| 4048 | { | 4048 | { |
| 4049 | if (single) | 4049 | if (single) |
| 4050 | { | 4050 | { |
| 4051 | //fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); | 4051 | //fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); |
| 4052 | #if 0 | 4052 | #if 0 |
| 4053 | phys_addr = get_phys_addr(cpu, bb, Addr, 0); | 4053 | phys_addr = get_phys_addr(cpu, bb, Addr, 0); |
| 4054 | bb = cpu->dyncom_engine->bb; | 4054 | bb = cpu->dyncom_engine->bb; |
| @@ -4166,7 +4166,7 @@ VFPLABEL_INST: /* encoding 1 */ | |||
| 4166 | fault = check_address_validity(cpu, addr, &phys_addr, 0); | 4166 | fault = check_address_validity(cpu, addr, &phys_addr, 0); |
| 4167 | if (fault) goto MMU_EXCEPTION; | 4167 | if (fault) goto MMU_EXCEPTION; |
| 4168 | 4168 | ||
| 4169 | fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); | 4169 | fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); |
| 4170 | if (fault) goto MMU_EXCEPTION; | 4170 | if (fault) goto MMU_EXCEPTION; |
| 4171 | DBG("\taddr[%x] <= s%d=[%x]\n", addr, inst_cream->d+i, cpu->ExtReg[inst_cream->d+i]); | 4171 | DBG("\taddr[%x] <= s%d=[%x]\n", addr, inst_cream->d+i, cpu->ExtReg[inst_cream->d+i]); |
| 4172 | addr += 4; | 4172 | addr += 4; |
| @@ -4177,13 +4177,13 @@ VFPLABEL_INST: /* encoding 1 */ | |||
| 4177 | fault = check_address_validity(cpu, addr, &phys_addr, 0); | 4177 | fault = check_address_validity(cpu, addr, &phys_addr, 0); |
| 4178 | if (fault) goto MMU_EXCEPTION; | 4178 | if (fault) goto MMU_EXCEPTION; |
| 4179 | 4179 | ||
| 4180 | fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2], 32); | 4180 | fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2], 32); |
| 4181 | if (fault) goto MMU_EXCEPTION; | 4181 | if (fault) goto MMU_EXCEPTION; |
| 4182 | 4182 | ||
| 4183 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 0); | 4183 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 0); |
| 4184 | if (fault) goto MMU_EXCEPTION; | 4184 | if (fault) goto MMU_EXCEPTION; |
| 4185 | 4185 | ||
| 4186 | fault = interpreter_write_memory(core, addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); | 4186 | fault = interpreter_write_memory(addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); |
| 4187 | if (fault) goto MMU_EXCEPTION; | 4187 | if (fault) goto MMU_EXCEPTION; |
| 4188 | DBG("\taddr[%x-%x] <= s[%d-%d]=[%x-%x]\n", addr+4, addr, (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, cpu->ExtReg[(inst_cream->d+i)*2+1], cpu->ExtReg[(inst_cream->d+i)*2]); | 4188 | DBG("\taddr[%x-%x] <= s[%d-%d]=[%x-%x]\n", addr+4, addr, (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, cpu->ExtReg[(inst_cream->d+i)*2+1], cpu->ExtReg[(inst_cream->d+i)*2]); |
| 4189 | addr += 8; | 4189 | addr += 8; |
| @@ -4304,7 +4304,7 @@ int DYNCOM_TRANS(vfpinstr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc | |||
| 4304 | if (single) | 4304 | if (single) |
| 4305 | { | 4305 | { |
| 4306 | 4306 | ||
| 4307 | //fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); | 4307 | //fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); |
| 4308 | /* if R(i) is R15? */ | 4308 | /* if R(i) is R15? */ |
| 4309 | #if 0 | 4309 | #if 0 |
| 4310 | phys_addr = get_phys_addr(cpu, bb, Addr, 0); | 4310 | phys_addr = get_phys_addr(cpu, bb, Addr, 0); |
| @@ -4321,7 +4321,7 @@ int DYNCOM_TRANS(vfpinstr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc | |||
| 4321 | else | 4321 | else |
| 4322 | { | 4322 | { |
| 4323 | 4323 | ||
| 4324 | //fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2], 32); | 4324 | //fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2], 32); |
| 4325 | #if 0 | 4325 | #if 0 |
| 4326 | phys_addr = get_phys_addr(cpu, bb, Addr, 0); | 4326 | phys_addr = get_phys_addr(cpu, bb, Addr, 0); |
| 4327 | bb = cpu->dyncom_engine->bb; | 4327 | bb = cpu->dyncom_engine->bb; |
| @@ -4332,7 +4332,7 @@ int DYNCOM_TRANS(vfpinstr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc | |||
| 4332 | bb = cpu->dyncom_engine->bb; | 4332 | bb = cpu->dyncom_engine->bb; |
| 4333 | //if (fault) goto MMU_EXCEPTION; | 4333 | //if (fault) goto MMU_EXCEPTION; |
| 4334 | 4334 | ||
| 4335 | //fault = interpreter_write_memory(core, addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); | 4335 | //fault = interpreter_write_memory(addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); |
| 4336 | #if 0 | 4336 | #if 0 |
| 4337 | phys_addr = get_phys_addr(cpu, bb, ADD(Addr, CONST(4)), 0); | 4337 | phys_addr = get_phys_addr(cpu, bb, ADD(Addr, CONST(4)), 0); |
| 4338 | bb = cpu->dyncom_engine->bb; | 4338 | bb = cpu->dyncom_engine->bb; |
| @@ -4431,7 +4431,7 @@ VFPLABEL_INST: | |||
| 4431 | fault = check_address_validity(cpu, addr, &phys_addr, 1); | 4431 | fault = check_address_validity(cpu, addr, &phys_addr, 1); |
| 4432 | if (fault) goto MMU_EXCEPTION; | 4432 | if (fault) goto MMU_EXCEPTION; |
| 4433 | 4433 | ||
| 4434 | fault = interpreter_read_memory(core, addr, phys_addr, value1, 32); | 4434 | fault = interpreter_read_memory(addr, phys_addr, value1, 32); |
| 4435 | if (fault) goto MMU_EXCEPTION; | 4435 | if (fault) goto MMU_EXCEPTION; |
| 4436 | DBG("\ts%d <= [%x] addr[%x]\n", inst_cream->d+i, value1, addr); | 4436 | DBG("\ts%d <= [%x] addr[%x]\n", inst_cream->d+i, value1, addr); |
| 4437 | cpu->ExtReg[inst_cream->d+i] = value1; | 4437 | cpu->ExtReg[inst_cream->d+i] = value1; |
| @@ -4443,13 +4443,13 @@ VFPLABEL_INST: | |||
| 4443 | fault = check_address_validity(cpu, addr, &phys_addr, 1); | 4443 | fault = check_address_validity(cpu, addr, &phys_addr, 1); |
| 4444 | if (fault) goto MMU_EXCEPTION; | 4444 | if (fault) goto MMU_EXCEPTION; |
| 4445 | 4445 | ||
| 4446 | fault = interpreter_read_memory(core, addr, phys_addr, value1, 32); | 4446 | fault = interpreter_read_memory(addr, phys_addr, value1, 32); |
| 4447 | if (fault) goto MMU_EXCEPTION; | 4447 | if (fault) goto MMU_EXCEPTION; |
| 4448 | 4448 | ||
| 4449 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 1); | 4449 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 1); |
| 4450 | if (fault) goto MMU_EXCEPTION; | 4450 | if (fault) goto MMU_EXCEPTION; |
| 4451 | 4451 | ||
| 4452 | fault = interpreter_read_memory(core, addr + 4, phys_addr, value2, 32); | 4452 | fault = interpreter_read_memory(addr + 4, phys_addr, value2, 32); |
| 4453 | if (fault) goto MMU_EXCEPTION; | 4453 | if (fault) goto MMU_EXCEPTION; |
| 4454 | DBG("\ts[%d-%d] <= [%x-%x] addr[%x-%x]\n", (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, value2, value1, addr+4, addr); | 4454 | DBG("\ts[%d-%d] <= [%x-%x] addr[%x-%x]\n", (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, value2, value1, addr+4, addr); |
| 4455 | cpu->ExtReg[(inst_cream->d+i)*2] = value1; | 4455 | cpu->ExtReg[(inst_cream->d+i)*2] = value1; |
| @@ -4682,7 +4682,7 @@ VFPLABEL_INST: | |||
| 4682 | { | 4682 | { |
| 4683 | fault = check_address_validity(cpu, addr, &phys_addr, 1); | 4683 | fault = check_address_validity(cpu, addr, &phys_addr, 1); |
| 4684 | if (fault) goto MMU_EXCEPTION; | 4684 | if (fault) goto MMU_EXCEPTION; |
| 4685 | fault = interpreter_read_memory(core, addr, phys_addr, cpu->ExtReg[inst_cream->d], 32); | 4685 | fault = interpreter_read_memory(addr, phys_addr, cpu->ExtReg[inst_cream->d], 32); |
| 4686 | if (fault) goto MMU_EXCEPTION; | 4686 | if (fault) goto MMU_EXCEPTION; |
| 4687 | DBG("\ts%d <= [%x] addr[%x]\n", inst_cream->d, cpu->ExtReg[inst_cream->d], addr); | 4687 | DBG("\ts%d <= [%x] addr[%x]\n", inst_cream->d, cpu->ExtReg[inst_cream->d], addr); |
| 4688 | } | 4688 | } |
| @@ -4691,12 +4691,12 @@ VFPLABEL_INST: | |||
| 4691 | unsigned int word1, word2; | 4691 | unsigned int word1, word2; |
| 4692 | fault = check_address_validity(cpu, addr, &phys_addr, 1); | 4692 | fault = check_address_validity(cpu, addr, &phys_addr, 1); |
| 4693 | if (fault) goto MMU_EXCEPTION; | 4693 | if (fault) goto MMU_EXCEPTION; |
| 4694 | fault = interpreter_read_memory(core, addr, phys_addr, word1, 32); | 4694 | fault = interpreter_read_memory(addr, phys_addr, word1, 32); |
| 4695 | if (fault) goto MMU_EXCEPTION; | 4695 | if (fault) goto MMU_EXCEPTION; |
| 4696 | 4696 | ||
| 4697 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 1); | 4697 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 1); |
| 4698 | if (fault) goto MMU_EXCEPTION; | 4698 | if (fault) goto MMU_EXCEPTION; |
| 4699 | fault = interpreter_read_memory(core, addr + 4, phys_addr, word2, 32); | 4699 | fault = interpreter_read_memory(addr + 4, phys_addr, word2, 32); |
| 4700 | if (fault) goto MMU_EXCEPTION; | 4700 | if (fault) goto MMU_EXCEPTION; |
| 4701 | /* Check endianness */ | 4701 | /* Check endianness */ |
| 4702 | cpu->ExtReg[inst_cream->d*2] = word1; | 4702 | cpu->ExtReg[inst_cream->d*2] = word1; |
| @@ -4923,7 +4923,7 @@ VFPLABEL_INST: | |||
| 4923 | { | 4923 | { |
| 4924 | fault = check_address_validity(cpu, addr, &phys_addr, 1); | 4924 | fault = check_address_validity(cpu, addr, &phys_addr, 1); |
| 4925 | if (fault) goto MMU_EXCEPTION; | 4925 | if (fault) goto MMU_EXCEPTION; |
| 4926 | fault = interpreter_read_memory(core, addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); | 4926 | fault = interpreter_read_memory(addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); |
| 4927 | if (fault) goto MMU_EXCEPTION; | 4927 | if (fault) goto MMU_EXCEPTION; |
| 4928 | DBG("\ts%d <= [%x] addr[%x]\n", inst_cream->d+i, cpu->ExtReg[inst_cream->d+i], addr); | 4928 | DBG("\ts%d <= [%x] addr[%x]\n", inst_cream->d+i, cpu->ExtReg[inst_cream->d+i], addr); |
| 4929 | addr += 4; | 4929 | addr += 4; |
| @@ -4933,12 +4933,12 @@ VFPLABEL_INST: | |||
| 4933 | /* Careful of endianness, little by default */ | 4933 | /* Careful of endianness, little by default */ |
| 4934 | fault = check_address_validity(cpu, addr, &phys_addr, 1); | 4934 | fault = check_address_validity(cpu, addr, &phys_addr, 1); |
| 4935 | if (fault) goto MMU_EXCEPTION; | 4935 | if (fault) goto MMU_EXCEPTION; |
| 4936 | fault = interpreter_read_memory(core, addr, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2], 32); | 4936 | fault = interpreter_read_memory(addr, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2], 32); |
| 4937 | if (fault) goto MMU_EXCEPTION; | 4937 | if (fault) goto MMU_EXCEPTION; |
| 4938 | 4938 | ||
| 4939 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 1); | 4939 | fault = check_address_validity(cpu, addr + 4, &phys_addr, 1); |
| 4940 | if (fault) goto MMU_EXCEPTION; | 4940 | if (fault) goto MMU_EXCEPTION; |
| 4941 | fault = interpreter_read_memory(core, addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); | 4941 | fault = interpreter_read_memory(addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); |
| 4942 | if (fault) goto MMU_EXCEPTION; | 4942 | if (fault) goto MMU_EXCEPTION; |
| 4943 | DBG("\ts[%d-%d] <= [%x-%x] addr[%x-%x]\n", (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, cpu->ExtReg[(inst_cream->d+i)*2+1], cpu->ExtReg[(inst_cream->d+i)*2], addr+4, addr); | 4943 | DBG("\ts[%d-%d] <= [%x-%x] addr[%x-%x]\n", (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, cpu->ExtReg[(inst_cream->d+i)*2+1], cpu->ExtReg[(inst_cream->d+i)*2], addr+4, addr); |
| 4944 | addr += 8; | 4944 | addr += 8; |
| @@ -5058,7 +5058,7 @@ int DYNCOM_TRANS(vfpinstr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc | |||
| 5058 | if (single) | 5058 | if (single) |
| 5059 | { | 5059 | { |
| 5060 | 5060 | ||
| 5061 | //fault = interpreter_write_memory(core, addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); | 5061 | //fault = interpreter_write_memory(addr, phys_addr, cpu->ExtReg[inst_cream->d+i], 32); |
| 5062 | /* if R(i) is R15? */ | 5062 | /* if R(i) is R15? */ |
| 5063 | #if 0 | 5063 | #if 0 |
| 5064 | phys_addr = get_phys_addr(cpu, bb, Addr, 1); | 5064 | phys_addr = get_phys_addr(cpu, bb, Addr, 1); |
| @@ -5095,7 +5095,7 @@ int DYNCOM_TRANS(vfpinstr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc | |||
| 5095 | val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb); | 5095 | val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb); |
| 5096 | LETFPS((d + i) * 2 + 1, FPBITCAST32(val)); | 5096 | LETFPS((d + i) * 2 + 1, FPBITCAST32(val)); |
| 5097 | 5097 | ||
| 5098 | //fault = interpreter_write_memory(core, addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); | 5098 | //fault = interpreter_write_memory(addr + 4, phys_addr, cpu->ExtReg[(inst_cream->d+i)*2 + 1], 32); |
| 5099 | //DBG("\taddr[%x-%x] <= s[%d-%d]=[%x-%x]\n", addr+4, addr, (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, cpu->ExtReg[(inst_cream->d+i)*2+1], cpu->ExtReg[(inst_cream->d+i)*2]); | 5099 | //DBG("\taddr[%x-%x] <= s[%d-%d]=[%x-%x]\n", addr+4, addr, (inst_cream->d+i)*2+1, (inst_cream->d+i)*2, cpu->ExtReg[(inst_cream->d+i)*2+1], cpu->ExtReg[(inst_cream->d+i)*2]); |
| 5100 | //addr += 8; | 5100 | //addr += 8; |
| 5101 | Addr = ADD(Addr, CONST(8)); | 5101 | Addr = ADD(Addr, CONST(8)); |