1 files changed, 37 insertions, 37 deletions

diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp
index c6b8197f6..7254a16f3 100644
--- a/src/core/arm/interpreter/arminit.cpp
+++ b/src/core/arm/interpreter/arminit.cpp
@@ -71,58 +71,58 @@ void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
 static void ResetMPCoreCP15Registers(ARMul_State* cpu)
 {
     // c0
-    cpu->CP15[CP15(CP15_MAIN_ID)]  = 0x410FB024;
-    cpu->CP15[CP15(CP15_TLB_TYPE)] = 0x00000800;
-    cpu->CP15[CP15(CP15_PROCESSOR_FEATURE_0)] = 0x00000111;
-    cpu->CP15[CP15(CP15_PROCESSOR_FEATURE_1)] = 0x00000001;
-    cpu->CP15[CP15(CP15_DEBUG_FEATURE_0)] = 0x00000002;
-    cpu->CP15[CP15(CP15_MEMORY_MODEL_FEATURE_0)] = 0x01100103;
-    cpu->CP15[CP15(CP15_MEMORY_MODEL_FEATURE_1)] = 0x10020302;
-    cpu->CP15[CP15(CP15_MEMORY_MODEL_FEATURE_2)] = 0x01222000;
-    cpu->CP15[CP15(CP15_MEMORY_MODEL_FEATURE_3)] = 0x00000000;
-    cpu->CP15[CP15(CP15_ISA_FEATURE_0)] = 0x00100011;
-    cpu->CP15[CP15(CP15_ISA_FEATURE_1)] = 0x12002111;
-    cpu->CP15[CP15(CP15_ISA_FEATURE_2)] = 0x11221011;
-    cpu->CP15[CP15(CP15_ISA_FEATURE_3)] = 0x01102131;
-    cpu->CP15[CP15(CP15_ISA_FEATURE_4)] = 0x00000141;
+    cpu->CP15[CP15_MAIN_ID]  = 0x410FB024;
+    cpu->CP15[CP15_TLB_TYPE] = 0x00000800;
+    cpu->CP15[CP15_PROCESSOR_FEATURE_0] = 0x00000111;
+    cpu->CP15[CP15_PROCESSOR_FEATURE_1] = 0x00000001;
+    cpu->CP15[CP15_DEBUG_FEATURE_0] = 0x00000002;
+    cpu->CP15[CP15_MEMORY_MODEL_FEATURE_0] = 0x01100103;
+    cpu->CP15[CP15_MEMORY_MODEL_FEATURE_1] = 0x10020302;
+    cpu->CP15[CP15_MEMORY_MODEL_FEATURE_2] = 0x01222000;
+    cpu->CP15[CP15_MEMORY_MODEL_FEATURE_3] = 0x00000000;
+    cpu->CP15[CP15_ISA_FEATURE_0] = 0x00100011;
+    cpu->CP15[CP15_ISA_FEATURE_1] = 0x12002111;
+    cpu->CP15[CP15_ISA_FEATURE_2] = 0x11221011;
+    cpu->CP15[CP15_ISA_FEATURE_3] = 0x01102131;
+    cpu->CP15[CP15_ISA_FEATURE_4] = 0x00000141;
 
     // c1
-    cpu->CP15[CP15(CP15_CONTROL)] = 0x00054078;
-    cpu->CP15[CP15(CP15_AUXILIARY_CONTROL)] = 0x0000000F;
-    cpu->CP15[CP15(CP15_COPROCESSOR_ACCESS_CONTROL)] = 0x00000000;
+    cpu->CP15[CP15_CONTROL] = 0x00054078;
+    cpu->CP15[CP15_AUXILIARY_CONTROL] = 0x0000000F;
+    cpu->CP15[CP15_COPROCESSOR_ACCESS_CONTROL] = 0x00000000;
 
     // c2
-    cpu->CP15[CP15(CP15_TRANSLATION_BASE_TABLE_0)] = 0x00000000;
-    cpu->CP15[CP15(CP15_TRANSLATION_BASE_TABLE_1)] = 0x00000000;
-    cpu->CP15[CP15(CP15_TRANSLATION_BASE_CONTROL)] = 0x00000000;
+    cpu->CP15[CP15_TRANSLATION_BASE_TABLE_0] = 0x00000000;
+    cpu->CP15[CP15_TRANSLATION_BASE_TABLE_1] = 0x00000000;
+    cpu->CP15[CP15_TRANSLATION_BASE_CONTROL] = 0x00000000;
 
     // c3
-    cpu->CP15[CP15(CP15_DOMAIN_ACCESS_CONTROL)] = 0x00000000;
+    cpu->CP15[CP15_DOMAIN_ACCESS_CONTROL] = 0x00000000;
 
     // c7
-    cpu->CP15[CP15(CP15_PHYS_ADDRESS)] = 0x00000000;
+    cpu->CP15[CP15_PHYS_ADDRESS] = 0x00000000;
 
     // c9
-    cpu->CP15[CP15(CP15_DATA_CACHE_LOCKDOWN)] = 0xFFFFFFF0;
+    cpu->CP15[CP15_DATA_CACHE_LOCKDOWN] = 0xFFFFFFF0;
 
     // c10
-    cpu->CP15[CP15(CP15_TLB_LOCKDOWN)] = 0x00000000;
-    cpu->CP15[CP15(CP15_PRIMARY_REGION_REMAP)] = 0x00098AA4;
-    cpu->CP15[CP15(CP15_NORMAL_REGION_REMAP)]  = 0x44E048E0;
+    cpu->CP15[CP15_TLB_LOCKDOWN] = 0x00000000;
+    cpu->CP15[CP15_PRIMARY_REGION_REMAP] = 0x00098AA4;
+    cpu->CP15[CP15_NORMAL_REGION_REMAP]  = 0x44E048E0;
 
     // c13
-    cpu->CP15[CP15(CP15_PID)] = 0x00000000;
-    cpu->CP15[CP15(CP15_CONTEXT_ID)]  = 0x00000000;
-    cpu->CP15[CP15(CP15_THREAD_UPRW)] = 0x00000000;
-    cpu->CP15[CP15(CP15_THREAD_URO)]  = 0x00000000;
-    cpu->CP15[CP15(CP15_THREAD_PRW)]  = 0x00000000;
+    cpu->CP15[CP15_PID] = 0x00000000;
+    cpu->CP15[CP15_CONTEXT_ID]  = 0x00000000;
+    cpu->CP15[CP15_THREAD_UPRW] = 0x00000000;
+    cpu->CP15[CP15_THREAD_URO]  = 0x00000000;
+    cpu->CP15[CP15_THREAD_PRW]  = 0x00000000;
 
     // c15
-    cpu->CP15[CP15(CP15_PERFORMANCE_MONITOR_CONTROL)]    = 0x00000000;
-    cpu->CP15[CP15(CP15_MAIN_TLB_LOCKDOWN_VIRT_ADDRESS)] = 0x00000000;
-    cpu->CP15[CP15(CP15_MAIN_TLB_LOCKDOWN_PHYS_ADDRESS)] = 0x00000000;
-    cpu->CP15[CP15(CP15_MAIN_TLB_LOCKDOWN_ATTRIBUTE)]    = 0x00000000;
-    cpu->CP15[CP15(CP15_TLB_DEBUG_CONTROL)] = 0x00000000;
+    cpu->CP15[CP15_PERFORMANCE_MONITOR_CONTROL]    = 0x00000000;
+    cpu->CP15[CP15_MAIN_TLB_LOCKDOWN_VIRT_ADDRESS] = 0x00000000;
+    cpu->CP15[CP15_MAIN_TLB_LOCKDOWN_PHYS_ADDRESS] = 0x00000000;
+    cpu->CP15[CP15_MAIN_TLB_LOCKDOWN_ATTRIBUTE]    = 0x00000000;
+    cpu->CP15[CP15_TLB_DEBUG_CONTROL] = 0x00000000;
 }
 
 /***************************************************************************\
@@ -147,7 +147,7 @@ void ARMul_Reset(ARMul_State* state)
     //
     // TODO: Whenever TLS is implemented, this should contain
     // the address of the 0x200-byte TLS
-    state->CP15[CP15(CP15_THREAD_URO)] = Memory::KERNEL_MEMORY_VADDR;
+    state->CP15[CP15_THREAD_URO] = Memory::KERNEL_MEMORY_VADDR;
 
     state->EndCondition = 0;
     state->ErrorCode = 0;