summaryrefslogtreecommitdiff
path: root/src/core/arm/dyncom
diff options
context:
space:
mode:
Diffstat (limited to 'src/core/arm/dyncom')
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp4
-rw-r--r--src/core/arm/dyncom/arm_dyncom.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 81f9bf99e..da955c9b9 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -25,6 +25,10 @@ void ARM_DynCom::ClearInstructionCache() {
25 trans_cache_buf_top = 0; 25 trans_cache_buf_top = 0;
26} 26}
27 27
28void ARM_DynCom::PageTableChanged() {
29 ClearInstructionCache();
30}
31
28void ARM_DynCom::SetPC(u32 pc) { 32void ARM_DynCom::SetPC(u32 pc) {
29 state->Reg[15] = pc; 33 state->Reg[15] = pc;
30} 34}
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h
index 62c174f3c..0ae535671 100644
--- a/src/core/arm/dyncom/arm_dyncom.h
+++ b/src/core/arm/dyncom/arm_dyncom.h
@@ -16,6 +16,7 @@ public:
16 ~ARM_DynCom(); 16 ~ARM_DynCom();
17 17
18 void ClearInstructionCache() override; 18 void ClearInstructionCache() override;
19 void PageTableChanged() override;
19 20
20 void SetPC(u32 pc) override; 21 void SetPC(u32 pc) override;
21 u32 GetPC() const override; 22 u32 GetPC() const override;