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-rw-r--r--src/core/arm/skyeye_common/armdefs.h475
1 files changed, 169 insertions, 306 deletions
diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h
index 8343aaa01..159b0e804 100644
--- a/src/core/arm/skyeye_common/armdefs.h
+++ b/src/core/arm/skyeye_common/armdefs.h
@@ -18,38 +18,26 @@
18#ifndef _ARMDEFS_H_ 18#ifndef _ARMDEFS_H_
19#define _ARMDEFS_H_ 19#define _ARMDEFS_H_
20 20
21#include <stdio.h> 21#include <cerrno>
22#include <stdlib.h> 22#include <csignal>
23#include <errno.h> 23#include <cstdio>
24 24#include <cstdlib>
25#include "common/platform.h" 25#include <cstring>
26 26#include <fcntl.h>
27//teawater add for arm2x86 2005.02.14------------------------------------------- 27#include <sys/stat.h>
28// koodailar remove it for mingw 2005.12.18---------------- 28#include <sys/types.h>
29//anthonylee modify it for portable 2007.01.30
30//#include "portable/mman.h"
31 29
32#include "arm_regformat.h" 30#include "arm_regformat.h"
31#include "common/common_types.h"
33#include "common/platform.h" 32#include "common/platform.h"
33#include "core/arm/skyeye_common/armmmu.h"
34#include "core/arm/skyeye_common/skyeye_defs.h" 34#include "core/arm/skyeye_common/skyeye_defs.h"
35 35
36//AJ2D--------------------------------------------------------------------------
37
38//teawater add for arm2x86 2005.07.03-------------------------------------------
39
40#include <sys/types.h>
41#include <stdio.h>
42#include <stdlib.h>
43#include <string.h>
44#if EMU_PLATFORM == PLATFORM_LINUX 36#if EMU_PLATFORM == PLATFORM_LINUX
37#include <sys/time.h>
45#include <unistd.h> 38#include <unistd.h>
46#endif 39#endif
47#include <errno.h>
48#include <sys/stat.h>
49#include <fcntl.h>
50 40
51//#include <memory_space.h>
52//AJ2D--------------------------------------------------------------------------
53#if 0 41#if 0
54#if 0 42#if 0
55#define DIFF_STATE 1 43#define DIFF_STATE 1
@@ -70,25 +58,8 @@
70#define LOWHIGH 1 58#define LOWHIGH 1
71#define HIGHLOW 2 59#define HIGHLOW 2
72 60
73//teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
74#include <signal.h>
75
76#include "common/platform.h"
77
78#if EMU_PLATFORM == PLATFORM_LINUX
79#include <sys/time.h>
80#endif
81
82//#define DBCT_TEST_SPEED 61//#define DBCT_TEST_SPEED
83#define DBCT_TEST_SPEED_SEC 10 62#define DBCT_TEST_SPEED_SEC 10
84//AJ2D--------------------------------------------------------------------------
85
86//teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
87//#define DBCT_GDBRSP
88//AJ2D--------------------------------------------------------------------------
89
90//#include <skyeye_defs.h>
91//#include <skyeye_types.h>
92 63
93#define ARM_BYTE_TYPE 0 64#define ARM_BYTE_TYPE 0
94#define ARM_HALFWORD_TYPE 1 65#define ARM_HALFWORD_TYPE 1
@@ -103,71 +74,34 @@
103typedef char *VoidStar; 74typedef char *VoidStar;
104#endif 75#endif
105 76
106typedef unsigned long long ARMdword; /* must be 64 bits wide */ 77typedef u64 ARMdword; // must be 64 bits wide
107typedef unsigned int ARMword; /* must be 32 bits wide */ 78typedef u32 ARMword; // must be 32 bits wide
108typedef unsigned char ARMbyte; /* must be 8 bits wide */ 79typedef u16 ARMhword; // must be 16 bits wide
109typedef unsigned short ARMhword; /* must be 16 bits wide */ 80typedef u8 ARMbyte; // must be 8 bits wide
110typedef struct ARMul_State ARMul_State; 81typedef struct ARMul_State ARMul_State;
111typedef struct ARMul_io ARMul_io; 82typedef struct ARMul_io ARMul_io;
112typedef struct ARMul_Energy ARMul_Energy; 83typedef struct ARMul_Energy ARMul_Energy;
113 84
114//teawater add for arm2x86 2005.06.24-------------------------------------------
115#include <stdint.h>
116//AJ2D--------------------------------------------------------------------------
117/*
118//chy 2005-05-11
119#ifndef __CYGWIN__
120//teawater add for arm2x86 2005.02.14-------------------------------------------
121typedef unsigned char uint8_t;
122typedef unsigned short uint16_t;
123typedef unsigned int u32;
124#if defined (__x86_64__)
125typedef unsigned long uint64_t;
126#else
127typedef unsigned long long uint64_t;
128#endif
129////AJ2D--------------------------------------------------------------------------
130#endif
131*/
132 85
133#include "core/arm/skyeye_common/armmmu.h" 86typedef unsigned ARMul_CPInits(ARMul_State* state);
134//#include "lcd/skyeye_lcd.h" 87typedef unsigned ARMul_CPExits(ARMul_State* state);
135 88typedef unsigned ARMul_LDCs(ARMul_State* state, unsigned type, ARMword instr, ARMword value);
136 89typedef unsigned ARMul_STCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value);
137//#include "skyeye.h" 90typedef unsigned ARMul_MRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value);
138//#include "skyeye_device.h" 91typedef unsigned ARMul_MCRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value);
139//#include "net/skyeye_net.h" 92typedef unsigned ARMul_MRRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value1, ARMword* value2);
140//#include "skyeye_config.h" 93typedef unsigned ARMul_MCRRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value1, ARMword value2);
141 94typedef unsigned ARMul_CDPs(ARMul_State* state, unsigned type, ARMword instr);
142 95typedef unsigned ARMul_CPReads(ARMul_State* state, unsigned reg, ARMword* value);
143typedef unsigned ARMul_CPInits (ARMul_State * state); 96typedef unsigned ARMul_CPWrites(ARMul_State* state, unsigned reg, ARMword value);
144typedef unsigned ARMul_CPExits (ARMul_State * state);
145typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type,
146 ARMword instr, ARMword value);
147typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type,
148 ARMword instr, ARMword * value);
149typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type,
150 ARMword instr, ARMword * value);
151typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type,
152 ARMword instr, ARMword value);
153typedef unsigned ARMul_MRRCs (ARMul_State * state, unsigned type,
154 ARMword instr, ARMword * value1, ARMword * value2);
155typedef unsigned ARMul_MCRRs (ARMul_State * state, unsigned type,
156 ARMword instr, ARMword value1, ARMword value2);
157typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type,
158 ARMword instr);
159typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg,
160 ARMword * value);
161typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg,
162 ARMword value);
163 97
164 98
165//added by ksh,2004-3-5 99//added by ksh,2004-3-5
166struct ARMul_io 100struct ARMul_io
167{ 101{
168 ARMword *instr; //to display the current interrupt state 102 ARMword *instr; // to display the current interrupt state
169 ARMword *net_flag; //to judge if network is enabled 103 ARMword *net_flag; // to judge if network is enabled
170 ARMword *net_int; //netcard interrupt 104 ARMword *net_int; // netcard interrupt
171 105
172 //ywc,2004-04-01 106 //ywc,2004-04-01
173 ARMword *ts_int; 107 ARMword *ts_int;
@@ -180,17 +114,17 @@ struct ARMul_io
180/* added by ksh,2004-11-26,some energy profiling */ 114/* added by ksh,2004-11-26,some energy profiling */
181struct ARMul_Energy 115struct ARMul_Energy
182{ 116{
183 int energy_prof; /* <tktan> BUG200103282109 : for energy profiling */ 117 int energy_prof; /* <tktan> BUG200103282109 : for energy profiling */
184 int enable_func_energy; /* <tktan> BUG200105181702 */ 118 int enable_func_energy; /* <tktan> BUG200105181702 */
185 char *func_energy; 119 char *func_energy;
186 int func_display; /* <tktan> BUG200103311509 : for function call display */ 120 int func_display; /* <tktan> BUG200103311509 : for function call display */
187 int func_disp_start; /* <tktan> BUG200104191428 : to start func profiling */ 121 int func_disp_start; /* <tktan> BUG200104191428 : to start func profiling */
188 char *start_func; /* <tktan> BUG200104191428 */ 122 char *start_func; /* <tktan> BUG200104191428 */
189 123
190 FILE *outfile; /* <tktan> BUG200105201531 : direct console to file */ 124 FILE *outfile; /* <tktan> BUG200105201531 : direct console to file */
191 long long tcycle, pcycle; 125 long long tcycle, pcycle;
192 float t_energy; 126 float t_energy;
193 void *cur_task; /* <tktan> BUG200103291737 */ 127 void *cur_task; /* <tktan> BUG200103291737 */
194 long long t_mem_cycle, t_idle_cycle, t_uart_cycle; 128 long long t_mem_cycle, t_idle_cycle, t_uart_cycle;
195 long long p_mem_cycle, p_idle_cycle, p_uart_cycle; 129 long long p_mem_cycle, p_idle_cycle, p_uart_cycle;
196 long long p_io_update_tcycle; 130 long long p_io_update_tcycle;
@@ -203,13 +137,12 @@ struct ARMul_Energy
203 137
204typedef struct mem_bank 138typedef struct mem_bank
205{ 139{
206 ARMword (*read_byte) (ARMul_State * state, ARMword addr); 140 ARMword (*read_byte) (ARMul_State* state, ARMword addr);
207 void (*write_byte) (ARMul_State * state, ARMword addr, ARMword data); 141 void (*write_byte) (ARMul_State* state, ARMword addr, ARMword data);
208 ARMword (*read_halfword) (ARMul_State * state, ARMword addr); 142 ARMword (*read_halfword) (ARMul_State* state, ARMword addr);
209 void (*write_halfword) (ARMul_State * state, ARMword addr, 143 void (*write_halfword) (ARMul_State* state, ARMword addr, ARMword data);
210 ARMword data); 144 ARMword (*read_word) (ARMul_State* state, ARMword addr);
211 ARMword (*read_word) (ARMul_State * state, ARMword addr); 145 void (*write_word) (ARMul_State* state, ARMword addr, ARMword data);
212 void (*write_word) (ARMul_State * state, ARMword addr, ARMword data);
213 unsigned int addr, len; 146 unsigned int addr, len;
214 char filename[MAX_STR]; 147 char filename[MAX_STR];
215 unsigned type; //chy 2003-09-21: maybe io,ram,rom 148 unsigned type; //chy 2003-09-21: maybe io,ram,rom
@@ -224,24 +157,24 @@ typedef struct
224#define VFP_REG_NUM 64 157#define VFP_REG_NUM 64
225struct ARMul_State 158struct ARMul_State
226{ 159{
227 ARMword Emulate; /* to start and stop emulation */ 160 ARMword Emulate; /* to start and stop emulation */
228 unsigned EndCondition; /* reason for stopping */ 161 unsigned EndCondition; /* reason for stopping */
229 unsigned ErrorCode; /* type of illegal instruction */ 162 unsigned ErrorCode; /* type of illegal instruction */
230 163
231 /* Order of the following register should not be modified */ 164 /* Order of the following register should not be modified */
232 ARMword Reg[16]; /* the current register file */ 165 ARMword Reg[16]; /* the current register file */
233 ARMword Cpsr; /* the current psr */ 166 ARMword Cpsr; /* the current psr */
234 ARMword Spsr_copy; 167 ARMword Spsr_copy;
235 ARMword phys_pc; 168 ARMword phys_pc;
236 ARMword Reg_usr[2]; 169 ARMword Reg_usr[2];
237 ARMword Reg_svc[2]; /* R13_SVC R14_SVC */ 170 ARMword Reg_svc[2]; /* R13_SVC R14_SVC */
238 ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */ 171 ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */
239 ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */ 172 ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */
240 ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */ 173 ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */
241 ARMword Reg_firq[7]; /* R8---R14 FIRQ */ 174 ARMword Reg_firq[7]; /* R8---R14 FIRQ */
242 ARMword Spsr[7]; /* the exception psr's */ 175 ARMword Spsr[7]; /* the exception psr's */
243 ARMword Mode; /* the current mode */ 176 ARMword Mode; /* the current mode */
244 ARMword Bank; /* the current register bank */ 177 ARMword Bank; /* the current register bank */
245 ARMword exclusive_tag; 178 ARMword exclusive_tag;
246 ARMword exclusive_state; 179 ARMword exclusive_state;
247 ARMword exclusive_result; 180 ARMword exclusive_result;
@@ -284,35 +217,35 @@ struct ARMul_State
284 ARMword servaddr; 217 ARMword servaddr;
285 218
286 unsigned NextInstr; 219 unsigned NextInstr;
287 unsigned VectorCatch; /* caught exception mask */ 220 unsigned VectorCatch; /* caught exception mask */
288 unsigned CallDebug; /* set to call the debugger */ 221 unsigned CallDebug; /* set to call the debugger */
289 unsigned CanWatch; /* set by memory interface if its willing to suffer the 222 unsigned CanWatch; /* set by memory interface if its willing to suffer the
290 overhead of checking for watchpoints on each memory 223 overhead of checking for watchpoints on each memory
291 access */ 224 access */
292 unsigned int StopHandle; 225 unsigned int StopHandle;
293 226
294 char *CommandLine; /* Command Line from ARMsd */ 227 char *CommandLine; /* Command Line from ARMsd */
295 228
296 ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */ 229 ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */
297 ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */ 230 ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */
298 ARMul_LDCs *LDC[16]; /* LDC instruction */ 231 ARMul_LDCs *LDC[16]; /* LDC instruction */
299 ARMul_STCs *STC[16]; /* STC instruction */ 232 ARMul_STCs *STC[16]; /* STC instruction */
300 ARMul_MRCs *MRC[16]; /* MRC instruction */ 233 ARMul_MRCs *MRC[16]; /* MRC instruction */
301 ARMul_MCRs *MCR[16]; /* MCR instruction */ 234 ARMul_MCRs *MCR[16]; /* MCR instruction */
302 ARMul_MRRCs *MRRC[16]; /* MRRC instruction */ 235 ARMul_MRRCs *MRRC[16]; /* MRRC instruction */
303 ARMul_MCRRs *MCRR[16]; /* MCRR instruction */ 236 ARMul_MCRRs *MCRR[16]; /* MCRR instruction */
304 ARMul_CDPs *CDP[16]; /* CDP instruction */ 237 ARMul_CDPs *CDP[16]; /* CDP instruction */
305 ARMul_CPReads *CPRead[16]; /* Read CP register */ 238 ARMul_CPReads *CPRead[16]; /* Read CP register */
306 ARMul_CPWrites *CPWrite[16]; /* Write CP register */ 239 ARMul_CPWrites *CPWrite[16]; /* Write CP register */
307 unsigned char *CPData[16]; /* Coprocessor data */ 240 unsigned char *CPData[16]; /* Coprocessor data */
308 unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */ 241 unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */
309 242
310 unsigned EventSet; /* the number of events in the queue */ 243 unsigned EventSet; /* the number of events in the queue */
311 unsigned int Now; /* time to the nearest cycle */ 244 unsigned int Now; /* time to the nearest cycle */
312 struct EventNode **EventPtr; /* the event list */ 245 struct EventNode **EventPtr; /* the event list */
313 246
314 unsigned Debug; /* show instructions as they are executed */ 247 unsigned Debug; /* show instructions as they are executed */
315 unsigned NresetSig; /* reset the processor */ 248 unsigned NresetSig; /* reset the processor */
316 unsigned NfiqSig; 249 unsigned NfiqSig;
317 unsigned NirqSig; 250 unsigned NirqSig;
318 251
@@ -356,12 +289,12 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
356*/ 289*/
357 unsigned lateabtSig; 290 unsigned lateabtSig;
358 291
359 ARMword Vector; /* synthesize aborts in cycle modes */ 292 ARMword Vector; /* synthesize aborts in cycle modes */
360 ARMword Aborted; /* sticky flag for aborts */ 293 ARMword Aborted; /* sticky flag for aborts */
361 ARMword Reseted; /* sticky flag for Reset */ 294 ARMword Reseted; /* sticky flag for Reset */
362 ARMword Inted, LastInted; /* sticky flags for interrupts */ 295 ARMword Inted, LastInted; /* sticky flags for interrupts */
363 ARMword Base; /* extra hand for base writeback */ 296 ARMword Base; /* extra hand for base writeback */
364 ARMword AbortAddr; /* to keep track of Prefetch aborts */ 297 ARMword AbortAddr; /* to keep track of Prefetch aborts */
365 298
366 const struct Dbg_HostosInterface *hostif; 299 const struct Dbg_HostosInterface *hostif;
367 300
@@ -378,7 +311,7 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
378 //chy: 2003-08-11, for different arm core type 311 //chy: 2003-08-11, for different arm core type
379 unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */ 312 unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */
380 unsigned is_v5; /* Are we emulating a v5 architecture ? */ 313 unsigned is_v5; /* Are we emulating a v5 architecture ? */
381 unsigned is_v5e; /* Are we emulating a v5e architecture ? */ 314 unsigned is_v5e; /* Are we emulating a v5e architecture ? */
382 unsigned is_v6; /* Are we emulating a v6 architecture ? */ 315 unsigned is_v6; /* Are we emulating a v6 architecture ? */
383 unsigned is_v7; /* Are we emulating a v7 architecture ? */ 316 unsigned is_v7; /* Are we emulating a v7 architecture ? */
384 unsigned is_XScale; /* Are we emulating an XScale architecture ? */ 317 unsigned is_XScale; /* Are we emulating an XScale architecture ? */
@@ -387,51 +320,43 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
387 //chy 2005-09-19 320 //chy 2005-09-19
388 unsigned is_pxa27x; /* Are we emulating a Intel PXA27x co-processor ? */ 321 unsigned is_pxa27x; /* Are we emulating a Intel PXA27x co-processor ? */
389 //chy: seems only used in xscale's CP14 322 //chy: seems only used in xscale's CP14
390 unsigned int LastTime; /* Value of last call to ARMul_Time() */ 323 unsigned int LastTime; /* Value of last call to ARMul_Time() */
391 ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit 3 set */ 324 ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit 3 set */
392 325
393 326
394//added by ksh:for handle different machs io 2004-3-5 327 //added by ksh:for handle different machs io 2004-3-5
395 ARMul_io mach_io; 328 ARMul_io mach_io;
396 329
397/*added by ksh,2004-11-26,some energy profiling*/ 330 /*added by ksh,2004-11-26,some energy profiling*/
398 ARMul_Energy energy; 331 ARMul_Energy energy;
399 332
400//teawater add for next_dis 2004.10.27----------------------- 333 //teawater add for next_dis 2004.10.27-----------------------
401 int disassemble; 334 int disassemble;
402//AJ2D------------------------------------------
403 335
404//teawater add for arm2x86 2005.02.15------------------------------------------- 336
337 //teawater add for arm2x86 2005.02.15-------------------------------------------
405 u32 trap; 338 u32 trap;
406 u32 tea_break_addr; 339 u32 tea_break_addr;
407 u32 tea_break_ok; 340 u32 tea_break_ok;
408 int tea_pc; 341 int tea_pc;
409//AJ2D--------------------------------------------------------------------------
410//teawater add for arm2x86 2005.07.03-------------------------------------------
411
412 /*
413 * 2007-01-24 removed the term-io functions by Anthony Lee,
414 * moved to "device/uart/skyeye_uart_stdio.c".
415 */
416 342
417//AJ2D-------------------------------------------------------------------------- 343 //teawater add for arm2x86 2005.07.05-------------------------------------------
418//teawater add for arm2x86 2005.07.05-------------------------------------------
419 //arm_arm A2-18 344 //arm_arm A2-18
420 int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model 345 int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model
421//AJ2D-------------------------------------------------------------------------- 346
422//teawater change for return if running tb dirty 2005.07.09--------------------- 347 //teawater change for return if running tb dirty 2005.07.09---------------------
423 void *tb_now; 348 void *tb_now;
424//AJ2D--------------------------------------------------------------------------
425 349
426//teawater add for record reg value to ./reg.txt 2005.07.10--------------------- 350
351 //teawater add for record reg value to ./reg.txt 2005.07.10---------------------
427 FILE *tea_reg_fd; 352 FILE *tea_reg_fd;
428//AJ2D--------------------------------------------------------------------------
429 353
430/*added by ksh in 2005-10-1*/ 354
355 /*added by ksh in 2005-10-1*/
431 cpu_config_t *cpu; 356 cpu_config_t *cpu;
432 //mem_config_t *mem_bank; 357 //mem_config_t *mem_bank;
433 358
434/* added LPC remap function */ 359 /* added LPC remap function */
435 int vector_remap_flag; 360 int vector_remap_flag;
436 u32 vector_remap_addr; 361 u32 vector_remap_addr;
437 u32 vector_remap_size; 362 u32 vector_remap_size;
@@ -486,17 +411,14 @@ typedef ARMul_State arm_core_t;
486#define ARM_Debug_Prop 0x10 411#define ARM_Debug_Prop 0x10
487#define ARM_Isync_Prop ARM_Debug_Prop 412#define ARM_Isync_Prop ARM_Debug_Prop
488#define ARM_Lock_Prop 0x20 413#define ARM_Lock_Prop 0x20
489//chy 2003-08-11
490#define ARM_v4_Prop 0x40 414#define ARM_v4_Prop 0x40
491#define ARM_v5_Prop 0x80 415#define ARM_v5_Prop 0x80
492/*jeff.du 2010-08-05 */
493#define ARM_v6_Prop 0xc0 416#define ARM_v6_Prop 0xc0
494 417
495#define ARM_v5e_Prop 0x100 418#define ARM_v5e_Prop 0x100
496#define ARM_XScale_Prop 0x200 419#define ARM_XScale_Prop 0x200
497#define ARM_ep9312_Prop 0x400 420#define ARM_ep9312_Prop 0x400
498#define ARM_iWMMXt_Prop 0x800 421#define ARM_iWMMXt_Prop 0x800
499//chy 2005-09-19
500#define ARM_PXA27X_Prop 0x1000 422#define ARM_PXA27X_Prop 0x1000
501#define ARM_v7_Prop 0x2000 423#define ARM_v7_Prop 0x2000
502 424
@@ -591,47 +513,44 @@ typedef ARMul_State arm_core_t;
591#ifdef __cplusplus 513#ifdef __cplusplus
592extern "C" { 514extern "C" {
593#endif 515#endif
594extern void ARMul_EmulateInit (void); 516extern void ARMul_EmulateInit();
595extern void ARMul_Reset (ARMul_State * state); 517extern void ARMul_Reset(ARMul_State* state);
596#ifdef __cplusplus 518#ifdef __cplusplus
597 } 519 }
598#endif 520#endif
599extern ARMul_State *ARMul_NewState (ARMul_State * state); 521extern ARMul_State *ARMul_NewState(ARMul_State* state);
600extern ARMword ARMul_DoProg (ARMul_State * state); 522extern ARMword ARMul_DoProg(ARMul_State* state);
601extern ARMword ARMul_DoInstr (ARMul_State * state); 523extern ARMword ARMul_DoInstr(ARMul_State* state);
602/***************************************************************************\ 524/***************************************************************************\
603* Definitons of things for event handling * 525* Definitons of things for event handling *
604\***************************************************************************/ 526\***************************************************************************/
605 527
606extern void ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay, 528extern void ARMul_ScheduleEvent(ARMul_State* state, unsigned int delay, unsigned(*func) ());
607 unsigned (*func) ()); 529extern void ARMul_EnvokeEvent(ARMul_State* state);
608extern void ARMul_EnvokeEvent (ARMul_State * state); 530extern unsigned int ARMul_Time(ARMul_State* state);
609extern unsigned int ARMul_Time (ARMul_State * state);
610 531
611/***************************************************************************\ 532/***************************************************************************\
612* Useful support routines * 533* Useful support routines *
613\***************************************************************************/ 534\***************************************************************************/
614 535
615extern ARMword ARMul_GetReg (ARMul_State * state, unsigned mode, 536extern ARMword ARMul_GetReg (ARMul_State* state, unsigned mode, unsigned reg);
616 unsigned reg); 537extern void ARMul_SetReg (ARMul_State* state, unsigned mode, unsigned reg, ARMword value);
617extern void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg, 538extern ARMword ARMul_GetPC(ARMul_State* state);
618 ARMword value); 539extern ARMword ARMul_GetNextPC(ARMul_State* state);
619extern ARMword ARMul_GetPC (ARMul_State * state); 540extern void ARMul_SetPC(ARMul_State* state, ARMword value);
620extern ARMword ARMul_GetNextPC (ARMul_State * state); 541extern ARMword ARMul_GetR15(ARMul_State* state);
621extern void ARMul_SetPC (ARMul_State * state, ARMword value); 542extern void ARMul_SetR15(ARMul_State* state, ARMword value);
622extern ARMword ARMul_GetR15 (ARMul_State * state); 543
623extern void ARMul_SetR15 (ARMul_State * state, ARMword value); 544extern ARMword ARMul_GetCPSR(ARMul_State* state);
624 545extern void ARMul_SetCPSR(ARMul_State* state, ARMword value);
625extern ARMword ARMul_GetCPSR (ARMul_State * state); 546extern ARMword ARMul_GetSPSR(ARMul_State* state, ARMword mode);
626extern void ARMul_SetCPSR (ARMul_State * state, ARMword value); 547extern void ARMul_SetSPSR(ARMul_State* state, ARMword mode, ARMword value);
627extern ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode);
628extern void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value);
629 548
630/***************************************************************************\ 549/***************************************************************************\
631* Definitons of things to handle aborts * 550* Definitons of things to handle aborts *
632\***************************************************************************/ 551\***************************************************************************/
633 552
634extern void ARMul_Abort (ARMul_State * state, ARMword address); 553extern void ARMul_Abort(ARMul_State* state, ARMword address);
635#ifdef MODET 554#ifdef MODET
636#define ARMul_ABORTWORD (state->TFlag ? 0xefffdfff : 0xefffffff) /* SWI -1 */ 555#define ARMul_ABORTWORD (state->TFlag ? 0xefffdfff : 0xefffffff) /* SWI -1 */
637#define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \ 556#define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
@@ -649,54 +568,40 @@ extern void ARMul_Abort (ARMul_State * state, ARMword address);
649* Definitons of things in the memory interface * 568* Definitons of things in the memory interface *
650\***************************************************************************/ 569\***************************************************************************/
651 570
652extern unsigned ARMul_MemoryInit (ARMul_State * state, 571extern unsigned ARMul_MemoryInit(ARMul_State* state, unsigned int initmemsize);
653 unsigned int initmemsize); 572extern void ARMul_MemoryExit(ARMul_State* state);
654extern void ARMul_MemoryExit (ARMul_State * state);
655 573
656extern ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, 574extern ARMword ARMul_LoadInstrS(ARMul_State* state, ARMword address, ARMword isize);
657 ARMword isize); 575extern ARMword ARMul_LoadInstrN(ARMul_State* state, ARMword address, ARMword isize);
658extern ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address,
659 ARMword isize);
660#ifdef __cplusplus 576#ifdef __cplusplus
661extern "C" { 577extern "C" {
662#endif 578#endif
663extern ARMword ARMul_ReLoadInstr (ARMul_State * state, ARMword address, 579extern ARMword ARMul_ReLoadInstr(ARMul_State* state, ARMword address, ARMword isize);
664 ARMword isize);
665#ifdef __cplusplus 580#ifdef __cplusplus
666 } 581 }
667#endif 582#endif
668extern ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address); 583extern ARMword ARMul_LoadWordS(ARMul_State* state, ARMword address);
669extern ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address); 584extern ARMword ARMul_LoadWordN(ARMul_State* state, ARMword address);
670extern ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address); 585extern ARMword ARMul_LoadHalfWord(ARMul_State* state, ARMword address);
671extern ARMword ARMul_LoadByte (ARMul_State * state, ARMword address); 586extern ARMword ARMul_LoadByte(ARMul_State* state, ARMword address);
672 587
673extern void ARMul_StoreWordS (ARMul_State * state, ARMword address, 588extern void ARMul_StoreWordS(ARMul_State* state, ARMword address, ARMword data);
674 ARMword data); 589extern void ARMul_StoreWordN(ARMul_State* state, ARMword address, ARMword data);
675extern void ARMul_StoreWordN (ARMul_State * state, ARMword address, 590extern void ARMul_StoreHalfWord(ARMul_State* state, ARMword address, ARMword data);
676 ARMword data); 591extern void ARMul_StoreByte(ARMul_State* state, ARMword address, ARMword data);
677extern void ARMul_StoreHalfWord (ARMul_State * state, ARMword address, 592
678 ARMword data); 593extern ARMword ARMul_SwapWord(ARMul_State* state, ARMword address, ARMword data);
679extern void ARMul_StoreByte (ARMul_State * state, ARMword address, 594extern ARMword ARMul_SwapByte(ARMul_State* state, ARMword address, ARMword data);
680 ARMword data); 595
681 596extern void ARMul_Icycles(ARMul_State* state, unsigned number, ARMword address);
682extern ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, 597extern void ARMul_Ccycles(ARMul_State* state, unsigned number, ARMword address);
683 ARMword data); 598
684extern ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, 599extern ARMword ARMul_ReadWord(ARMul_State* state, ARMword address);
685 ARMword data); 600extern ARMword ARMul_ReadByte(ARMul_State* state, ARMword address);
686 601extern void ARMul_WriteWord(ARMul_State* state, ARMword address, ARMword data);
687extern void ARMul_Icycles (ARMul_State * state, unsigned number, 602extern void ARMul_WriteByte(ARMul_State* state, ARMword address, ARMword data);
688 ARMword address); 603
689extern void ARMul_Ccycles (ARMul_State * state, unsigned number, 604extern ARMword ARMul_MemAccess(ARMul_State* state, ARMword, ARMword,
690 ARMword address);
691
692extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address);
693extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address);
694extern void ARMul_WriteWord (ARMul_State * state, ARMword address,
695 ARMword data);
696extern void ARMul_WriteByte (ARMul_State * state, ARMword address,
697 ARMword data);
698
699extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
700 ARMword, ARMword, ARMword, ARMword, ARMword, 605 ARMword, ARMword, ARMword, ARMword, ARMword,
701 ARMword, ARMword, ARMword); 606 ARMword, ARMword, ARMword);
702 607
@@ -739,66 +644,40 @@ extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
739#define ARMul_CP15_DBCON_E1 0x000c 644#define ARMul_CP15_DBCON_E1 0x000c
740#define ARMul_CP15_DBCON_E0 0x0003 645#define ARMul_CP15_DBCON_E0 0x0003
741 646
742extern unsigned ARMul_CoProInit (ARMul_State * state); 647extern unsigned ARMul_CoProInit(ARMul_State* state);
743extern void ARMul_CoProExit (ARMul_State * state); 648extern void ARMul_CoProExit(ARMul_State* state);
744extern void ARMul_CoProAttach (ARMul_State * state, unsigned number, 649extern void ARMul_CoProAttach (ARMul_State* state, unsigned number,
745 ARMul_CPInits * init, ARMul_CPExits * exit, 650 ARMul_CPInits* init, ARMul_CPExits* exit,
746 ARMul_LDCs * ldc, ARMul_STCs * stc, 651 ARMul_LDCs* ldc, ARMul_STCs* stc,
747 ARMul_MRCs * mrc, ARMul_MCRs * mcr, 652 ARMul_MRCs* mrc, ARMul_MCRs* mcr,
748 ARMul_MRRCs * mrrc, ARMul_MCRRs * mcrr, 653 ARMul_MRRCs* mrrc, ARMul_MCRRs* mcrr,
749 ARMul_CDPs * cdp, 654 ARMul_CDPs* cdp,
750 ARMul_CPReads * read, ARMul_CPWrites * write); 655 ARMul_CPReads* read, ARMul_CPWrites* write);
751extern void ARMul_CoProDetach (ARMul_State * state, unsigned number); 656extern void ARMul_CoProDetach(ARMul_State* state, unsigned number);
752 657
753/***************************************************************************\ 658/***************************************************************************\
754* Definitons of things in the host environment * 659* Definitons of things in the host environment *
755\***************************************************************************/ 660\***************************************************************************/
756 661
757extern unsigned ARMul_OSInit (ARMul_State * state); 662extern unsigned ARMul_OSInit(ARMul_State* state);
758extern void ARMul_OSExit (ARMul_State * state); 663extern void ARMul_OSExit(ARMul_State* state);
759 664
760#ifdef __cplusplus 665#ifdef __cplusplus
761 extern "C" { 666 extern "C" {
762#endif 667#endif
763 668
764extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number); 669extern unsigned ARMul_OSHandleSWI(ARMul_State* state, ARMword number);
765#ifdef __cplusplus 670#ifdef __cplusplus
766} 671}
767#endif 672#endif
768 673
769 674
770extern ARMword ARMul_OSLastErrorP (ARMul_State * state); 675extern ARMword ARMul_OSLastErrorP(ARMul_State* state);
771 676
772extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr); 677extern ARMword ARMul_Debug(ARMul_State* state, ARMword pc, ARMword instr);
773extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector, 678extern unsigned ARMul_OSException(ARMul_State* state, ARMword vector, ARMword pc);
774 ARMword pc);
775extern int rdi_log; 679extern int rdi_log;
776 680
777/***************************************************************************\
778* Host-dependent stuff *
779\***************************************************************************/
780
781#ifdef macintosh
782pascal void SpinCursor (short increment); /* copied from CursorCtl.h */
783# define HOURGLASS SpinCursor( 1 )
784# define HOURGLASS_RATE 1023 /* 2^n - 1 */
785#endif
786
787//teawater add for arm2x86 2005.02.14-------------------------------------------
788/*ywc 2005-03-31*/
789/*
790#include "arm2x86.h"
791#include "arm2x86_dp.h"
792#include "arm2x86_movl.h"
793#include "arm2x86_psr.h"
794#include "arm2x86_shift.h"
795#include "arm2x86_mem.h"
796#include "arm2x86_mul.h"
797#include "arm2x86_test.h"
798#include "arm2x86_other.h"
799#include "list.h"
800#include "tb.h"
801*/
802enum ConditionCode { 681enum ConditionCode {
803 EQ = 0, 682 EQ = 0,
804 NE = 1, 683 NE = 1,
@@ -851,32 +730,16 @@ enum ConditionCode {
851#define ZBIT_SHIFT 30 730#define ZBIT_SHIFT 30
852#define CBIT_SHIFT 29 731#define CBIT_SHIFT 29
853#define VBIT_SHIFT 28 732#define VBIT_SHIFT 28
854#ifdef DBCT 733
855//teawater change for local tb branch directly jump 2005.10.18------------------
856#include "dbct/list.h"
857#include "dbct/arm2x86.h"
858#include "dbct/arm2x86_dp.h"
859#include "dbct/arm2x86_movl.h"
860#include "dbct/arm2x86_psr.h"
861#include "dbct/arm2x86_shift.h"
862#include "dbct/arm2x86_mem.h"
863#include "dbct/arm2x86_mul.h"
864#include "dbct/arm2x86_test.h"
865#include "dbct/arm2x86_other.h"
866#include "dbct/arm2x86_coproc.h"
867#include "dbct/tb.h"
868#endif
869//AJ2D--------------------------------------------------------------------------
870//AJ2D--------------------------------------------------------------------------
871#define SKYEYE_OUTREGS(fd) { fprintf ((fd), "R %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,C %x,S %x,%x,%x,%x,%x,%x,%x,M %x,B %x,E %x,I %x,P %x,T %x,L %x,D %x,",\ 734#define SKYEYE_OUTREGS(fd) { fprintf ((fd), "R %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,C %x,S %x,%x,%x,%x,%x,%x,%x,M %x,B %x,E %x,I %x,P %x,T %x,L %x,D %x,",\
872 state->Reg[0],state->Reg[1],state->Reg[2],state->Reg[3], \ 735 state->Reg[0],state->Reg[1],state->Reg[2],state->Reg[3], \
873 state->Reg[4],state->Reg[5],state->Reg[6],state->Reg[7], \ 736 state->Reg[4],state->Reg[5],state->Reg[6],state->Reg[7], \
874 state->Reg[8],state->Reg[9],state->Reg[10],state->Reg[11], \ 737 state->Reg[8],state->Reg[9],state->Reg[10],state->Reg[11], \
875 state->Reg[12],state->Reg[13],state->Reg[14],state->Reg[15], \ 738 state->Reg[12],state->Reg[13],state->Reg[14],state->Reg[15], \
876 state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\ 739 state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\
877 state->Spsr[3],state->Spsr[4], state->Spsr[5], state->Spsr[6],\ 740 state->Spsr[3],state->Spsr[4], state->Spsr[5], state->Spsr[6],\
878 state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\ 741 state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\
879 state->temp,state->loaded,state->decoded);} 742 state->temp,state->loaded,state->decoded);}
880 743
881#define SKYEYE_OUTMOREREGS(fd) { fprintf ((fd),"\ 744#define SKYEYE_OUTMOREREGS(fd) { fprintf ((fd),"\
882RUs %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ 745RUs %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\
@@ -914,17 +777,17 @@ RUn %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x\n",\
914 777
915#define SA1110 0x6901b110 778#define SA1110 0x6901b110
916#define SA1100 0x4401a100 779#define SA1100 0x4401a100
917#define PXA250 0x69052100 780#define PXA250 0x69052100
918#define PXA270 0x69054110 781#define PXA270 0x69054110
919//#define PXA250 0x69052903 782//#define PXA250 0x69052903
920// 0x69052903; //PXA250 B1 from intel 278522-001.pdf 783// 0x69052903; //PXA250 B1 from intel 278522-001.pdf
921 784
922 785
923extern void ARMul_UndefInstr (ARMul_State *, ARMword); 786extern void ARMul_UndefInstr(ARMul_State*, ARMword);
924extern void ARMul_FixCPSR (ARMul_State *, ARMword, ARMword); 787extern void ARMul_FixCPSR(ARMul_State*, ARMword, ARMword);
925extern void ARMul_FixSPSR (ARMul_State *, ARMword, ARMword); 788extern void ARMul_FixSPSR(ARMul_State*, ARMword, ARMword);
926extern void ARMul_ConsolePrint (ARMul_State *, const char *, ...); 789extern void ARMul_ConsolePrint(ARMul_State*, const char*, ...);
927extern void ARMul_SelectProcessor (ARMul_State *, unsigned); 790extern void ARMul_SelectProcessor(ARMul_State*, unsigned);
928 791
929#define DIFF_LOG 0 792#define DIFF_LOG 0
930#define SAVE_LOG 0 793#define SAVE_LOG 0
HIC SVNT DRACONES