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-rw-r--r--src/citra/citra.rcbin3144 -> 3146 bytes
-rw-r--r--src/citra_qt/src/bootmanager.cpp2
-rw-r--r--src/citra_qt/src/cpu_regs.cpp41
-rw-r--r--src/citra_qt/src/disasm.cpp9
-rw-r--r--src/core/src/core.h2
5 files changed, 25 insertions, 29 deletions
diff --git a/src/citra/citra.rc b/src/citra/citra.rc
index dd5241bdf..c04acc7ff 100644
--- a/src/citra/citra.rc
+++ b/src/citra/citra.rc
Binary files differ
diff --git a/src/citra_qt/src/bootmanager.cpp b/src/citra_qt/src/bootmanager.cpp
index 56356ae35..095856dc9 100644
--- a/src/citra_qt/src/bootmanager.cpp
+++ b/src/citra_qt/src/bootmanager.cpp
@@ -25,8 +25,6 @@ void EmuThread::SetFilename(const char* filename)
25 25
26void EmuThread::run() 26void EmuThread::run()
27{ 27{
28 Core::Start(); //autoboot for now
29
30 while (true) 28 while (true)
31 { 29 {
32 for (int tight_loop = 0; tight_loop < 10000; ++tight_loop) 30 for (int tight_loop = 0; tight_loop < 10000; ++tight_loop)
diff --git a/src/citra_qt/src/cpu_regs.cpp b/src/citra_qt/src/cpu_regs.cpp
index ba0e8d702..f2859f695 100644
--- a/src/citra_qt/src/cpu_regs.cpp
+++ b/src/citra_qt/src/cpu_regs.cpp
@@ -1,7 +1,7 @@
1#include "cpu_regs.hxx" 1#include "cpu_regs.hxx"
2 2
3#include "core.h" 3#include "core.h"
4#include "arm/armdefs.h" 4#include "arm/interpreter/armdefs.h"
5 5
6GARM11RegsView::GARM11RegsView(QWidget* parent) : QDockWidget(parent) 6GARM11RegsView::GARM11RegsView(QWidget* parent) : QDockWidget(parent)
7{ 7{
@@ -39,24 +39,25 @@ GARM11RegsView::GARM11RegsView(QWidget* parent) : QDockWidget(parent)
39 39
40void GARM11RegsView::OnCPUStepped() 40void GARM11RegsView::OnCPUStepped()
41{ 41{
42 ARMul_State* state = Core::GetState(); 42 ARM_Interface* app_core = Core::g_app_core;
43
43 for (int i = 0; i < 16; ++i) 44 for (int i = 0; i < 16; ++i)
44 registers->child(i)->setText(1, QString("0x%1").arg(state->Reg[i], 8, 16, QLatin1Char('0'))); 45 registers->child(i)->setText(1, QString("0x%1").arg(app_core->Reg(i), 8, 16, QLatin1Char('0')));
45 46
46 CSPR->setText(1, QString("0x%1").arg(state->Cpsr, 8, 16, QLatin1Char('0'))); 47 CSPR->setText(1, QString("0x%1").arg(app_core->CPSR(), 8, 16, QLatin1Char('0')));
47 CSPR->child(0)->setText(1, QString("b%1").arg(state->Cpsr & 0x1F, 5, 2, QLatin1Char('0'))); // M - Mode 48 CSPR->child(0)->setText(1, QString("b%1").arg(app_core->CPSR() & 0x1F, 5, 2, QLatin1Char('0'))); // M - Mode
48 CSPR->child(1)->setText(1, QString("%1").arg((state->Cpsr >> 5) & 0x1)); // T - State 49 CSPR->child(1)->setText(1, QString("%1").arg((app_core->CPSR() >> 5) & 0x1)); // T - State
49 CSPR->child(2)->setText(1, QString("%1").arg((state->Cpsr >> 6) & 0x1)); // F - FIQ disable 50 CSPR->child(2)->setText(1, QString("%1").arg((app_core->CPSR() >> 6) & 0x1)); // F - FIQ disable
50 CSPR->child(3)->setText(1, QString("%1").arg((state->Cpsr >> 7) & 0x1)); // I - IRQ disable 51 CSPR->child(3)->setText(1, QString("%1").arg((app_core->CPSR() >> 7) & 0x1)); // I - IRQ disable
51 CSPR->child(4)->setText(1, QString("%1").arg((state->Cpsr >> 8) & 0x1)); // A - Imprecise abort 52 CSPR->child(4)->setText(1, QString("%1").arg((app_core->CPSR() >> 8) & 0x1)); // A - Imprecise abort
52 CSPR->child(5)->setText(1, QString("%1").arg((state->Cpsr >> 9) & 0x1)); // E - Data endianess 53 CSPR->child(5)->setText(1, QString("%1").arg((app_core->CPSR() >> 9) & 0x1)); // E - Data endianess
53 CSPR->child(6)->setText(1, QString("%1").arg((state->Cpsr >> 10) & 0x3F)); // IT - If-Then state (DNM) 54 CSPR->child(6)->setText(1, QString("%1").arg((app_core->CPSR() >> 10) & 0x3F)); // IT - If-Then state (DNM)
54 CSPR->child(7)->setText(1, QString("%1").arg((state->Cpsr >> 16) & 0xF)); // GE - Greater-than-or-Equal 55 CSPR->child(7)->setText(1, QString("%1").arg((app_core->CPSR() >> 16) & 0xF)); // GE - Greater-than-or-Equal
55 CSPR->child(8)->setText(1, QString("%1").arg((state->Cpsr >> 20) & 0xF)); // DNM - Do not modify 56 CSPR->child(8)->setText(1, QString("%1").arg((app_core->CPSR() >> 20) & 0xF)); // DNM - Do not modify
56 CSPR->child(9)->setText(1, QString("%1").arg((state->Cpsr >> 24) & 0x1)); // J - Java state 57 CSPR->child(9)->setText(1, QString("%1").arg((app_core->CPSR() >> 24) & 0x1)); // J - Java state
57 CSPR->child(10)->setText(1, QString("%1").arg((state->Cpsr >> 27) & 0x1)); // Q - Sticky overflow 58 CSPR->child(10)->setText(1, QString("%1").arg((app_core->CPSR() >> 27) & 0x1)); // Q - Sticky overflow
58 CSPR->child(11)->setText(1, QString("%1").arg((state->Cpsr >> 28) & 0x1)); // V - Overflow 59 CSPR->child(11)->setText(1, QString("%1").arg((app_core->CPSR() >> 28) & 0x1)); // V - Overflow
59 CSPR->child(12)->setText(1, QString("%1").arg((state->Cpsr >> 29) & 0x1)); // C - Carry/Borrow/Extend 60 CSPR->child(12)->setText(1, QString("%1").arg((app_core->CPSR() >> 29) & 0x1)); // C - Carry/Borrow/Extend
60 CSPR->child(13)->setText(1, QString("%1").arg((state->Cpsr >> 30) & 0x1)); // Z - Zero 61 CSPR->child(13)->setText(1, QString("%1").arg((app_core->CPSR() >> 30) & 0x1)); // Z - Zero
61 CSPR->child(14)->setText(1, QString("%1").arg((state->Cpsr >> 31) & 0x1)); // N - Negative/Less than 62 CSPR->child(14)->setText(1, QString("%1").arg((app_core->CPSR() >> 31) & 0x1)); // N - Negative/Less than
62} 63}
diff --git a/src/citra_qt/src/disasm.cpp b/src/citra_qt/src/disasm.cpp
index 2d1c61a72..ddcbf69d8 100644
--- a/src/citra_qt/src/disasm.cpp
+++ b/src/citra_qt/src/disasm.cpp
@@ -10,7 +10,7 @@
10 10
11#include "core.h" 11#include "core.h"
12#include "break_points.h" 12#include "break_points.h"
13#include "arm/armdefs.h" 13#include "arm/interpreter/armdefs.h"
14#include "arm/disassembler/arm_disasm.h" 14#include "arm/disassembler/arm_disasm.h"
15 15
16GDisAsmView::GDisAsmView(QWidget* parent, EmuThread& emu_thread) : QDockWidget(parent), base_addr(0), emu_thread(emu_thread) 16GDisAsmView::GDisAsmView(QWidget* parent, EmuThread& emu_thread) : QDockWidget(parent), base_addr(0), emu_thread(emu_thread)
@@ -41,10 +41,9 @@ GDisAsmView::GDisAsmView(QWidget* parent, EmuThread& emu_thread) : QDockWidget(p
41 41
42void GDisAsmView::Init() 42void GDisAsmView::Init()
43{ 43{
44 ARMul_State* state = Core::GetState(); 44 ARM_Disasm* disasm = new ARM_Disasm();
45 Arm* disasm = new Arm();
46 45
47 base_addr = state->pc; 46 base_addr = Core::g_app_core->PC();
48 unsigned int curInstAddr = base_addr; 47 unsigned int curInstAddr = base_addr;
49 char result[255]; 48 char result[255];
50 49
@@ -113,7 +112,7 @@ void GDisAsmView::OnToggleStartStop()
113 112
114void GDisAsmView::OnCPUStepped() 113void GDisAsmView::OnCPUStepped()
115{ 114{
116 ARMword next_instr = Core::GetState()->pc; 115 ARMword next_instr = Core::g_app_core->PC();
117 116
118 if (breakpoints->IsAddressBreakPoint(next_instr)) 117 if (breakpoints->IsAddressBreakPoint(next_instr))
119 { 118 {
diff --git a/src/core/src/core.h b/src/core/src/core.h
index a7d96e4a4..a71e4ed8d 100644
--- a/src/core/src/core.h
+++ b/src/core/src/core.h
@@ -58,8 +58,6 @@ int Init();
58/// Shutdown the core 58/// Shutdown the core
59void Shutdown(); 59void Shutdown();
60 60
61ARMul_State* GetState();
62
63} // namespace 61} // namespace
64 62
65//////////////////////////////////////////////////////////////////////////////////////////////////// 63////////////////////////////////////////////////////////////////////////////////////////////////////