diff options
| -rw-r--r-- | src/video_core/engines/maxwell_3d.h | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 4c833dc75..aab282b77 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h | |||
| @@ -34,6 +34,7 @@ public: | |||
| 34 | static constexpr size_t NumRenderTargets = 8; | 34 | static constexpr size_t NumRenderTargets = 8; |
| 35 | static constexpr size_t NumCBData = 16; | 35 | static constexpr size_t NumCBData = 16; |
| 36 | static constexpr size_t NumVertexArrays = 32; | 36 | static constexpr size_t NumVertexArrays = 32; |
| 37 | static constexpr size_t NumVertexAttributes = 32; | ||
| 37 | static constexpr size_t MaxShaderProgram = 6; | 38 | static constexpr size_t MaxShaderProgram = 6; |
| 38 | static constexpr size_t MaxShaderStage = 5; | 39 | static constexpr size_t MaxShaderStage = 5; |
| 39 | // Maximum number of const buffers per shader stage. | 40 | // Maximum number of const buffers per shader stage. |
| @@ -105,7 +106,18 @@ public: | |||
| 105 | } | 106 | } |
| 106 | } zeta; | 107 | } zeta; |
| 107 | 108 | ||
| 108 | INSERT_PADDING_WORDS(0x8A); | 109 | INSERT_PADDING_WORDS(0x5B); |
| 110 | |||
| 111 | union { | ||
| 112 | BitField<0, 5, u32> buffer; | ||
| 113 | BitField<6, 1, u32> constant; | ||
| 114 | BitField<7, 14, u32> offset; | ||
| 115 | BitField<21, 6, u32> size; | ||
| 116 | BitField<27, 3, u32> type; | ||
| 117 | BitField<31, 1, u32> bgra; | ||
| 118 | } vertex_attrib_format[NumVertexAttributes]; | ||
| 119 | |||
| 120 | INSERT_PADDING_WORDS(0xF); | ||
| 109 | 121 | ||
| 110 | struct { | 122 | struct { |
| 111 | union { | 123 | union { |
| @@ -348,6 +360,7 @@ private: | |||
| 348 | ASSERT_REG_POSITION(rt, 0x200); | 360 | ASSERT_REG_POSITION(rt, 0x200); |
| 349 | ASSERT_REG_POSITION(vertex_buffer, 0x35D); | 361 | ASSERT_REG_POSITION(vertex_buffer, 0x35D); |
| 350 | ASSERT_REG_POSITION(zeta, 0x3F8); | 362 | ASSERT_REG_POSITION(zeta, 0x3F8); |
| 363 | ASSERT_REG_POSITION(vertex_attrib_format[0], 0x458); | ||
| 351 | ASSERT_REG_POSITION(rt_control, 0x487); | 364 | ASSERT_REG_POSITION(rt_control, 0x487); |
| 352 | ASSERT_REG_POSITION(tsc, 0x557); | 365 | ASSERT_REG_POSITION(tsc, 0x557); |
| 353 | ASSERT_REG_POSITION(tic, 0x55D); | 366 | ASSERT_REG_POSITION(tic, 0x55D); |