diff options
| -rw-r--r-- | src/video_core/shader/decode/arithmetic.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/video_core/shader/decode/arithmetic.cpp b/src/video_core/shader/decode/arithmetic.cpp index 1473c282a..bff3d5459 100644 --- a/src/video_core/shader/decode/arithmetic.cpp +++ b/src/video_core/shader/decode/arithmetic.cpp | |||
| @@ -144,10 +144,11 @@ u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) { | |||
| 144 | case OpCode::Id::RRO_C: | 144 | case OpCode::Id::RRO_C: |
| 145 | case OpCode::Id::RRO_R: | 145 | case OpCode::Id::RRO_R: |
| 146 | case OpCode::Id::RRO_IMM: { | 146 | case OpCode::Id::RRO_IMM: { |
| 147 | LOG_DEBUG(HW_GPU, "(STUBBED) RRO used"); | ||
| 148 | |||
| 147 | // Currently RRO is only implemented as a register move. | 149 | // Currently RRO is only implemented as a register move. |
| 148 | op_b = GetOperandAbsNegFloat(op_b, instr.alu.abs_b, instr.alu.negate_b); | 150 | op_b = GetOperandAbsNegFloat(op_b, instr.alu.abs_b, instr.alu.negate_b); |
| 149 | SetRegister(bb, instr.gpr0, op_b); | 151 | SetRegister(bb, instr.gpr0, op_b); |
| 150 | LOG_WARNING(HW_GPU, "RRO instruction is incomplete"); | ||
| 151 | break; | 152 | break; |
| 152 | } | 153 | } |
| 153 | default: | 154 | default: |