diff options
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer.cpp | 6 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 6 |
2 files changed, 7 insertions, 5 deletions
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp index 5d493a2b2..6e89fa6e3 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp | |||
| @@ -237,6 +237,8 @@ void RasterizerOpenGL::SetupShaders() { | |||
| 237 | } | 237 | } |
| 238 | } | 238 | } |
| 239 | 239 | ||
| 240 | state.Apply(); | ||
| 241 | |||
| 240 | shader_program_manager->UseTrivialGeometryShader(); | 242 | shader_program_manager->UseTrivialGeometryShader(); |
| 241 | } | 243 | } |
| 242 | 244 | ||
| @@ -666,8 +668,6 @@ u32 RasterizerOpenGL::SetupConstBuffers(Maxwell::ShaderStage stage, Shader& shad | |||
| 666 | current_bindpoint + bindpoint); | 668 | current_bindpoint + bindpoint); |
| 667 | } | 669 | } |
| 668 | 670 | ||
| 669 | state.Apply(); | ||
| 670 | |||
| 671 | return current_bindpoint + static_cast<u32>(entries.size()); | 671 | return current_bindpoint + static_cast<u32>(entries.size()); |
| 672 | } | 672 | } |
| 673 | 673 | ||
| @@ -714,8 +714,6 @@ u32 RasterizerOpenGL::SetupTextures(Maxwell::ShaderStage stage, Shader& shader, | |||
| 714 | } | 714 | } |
| 715 | } | 715 | } |
| 716 | 716 | ||
| 717 | state.Apply(); | ||
| 718 | |||
| 719 | return current_unit + static_cast<u32>(entries.size()); | 717 | return current_unit + static_cast<u32>(entries.size()); |
| 720 | } | 718 | } |
| 721 | 719 | ||
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index 781ddb073..841647ebe 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp | |||
| @@ -2197,11 +2197,15 @@ private: | |||
| 2197 | case OpCode::Id::IPA: { | 2197 | case OpCode::Id::IPA: { |
| 2198 | const auto& attribute = instr.attribute.fmt28; | 2198 | const auto& attribute = instr.attribute.fmt28; |
| 2199 | const auto& reg = instr.gpr0; | 2199 | const auto& reg = instr.gpr0; |
| 2200 | ASSERT_MSG(instr.ipa.saturate == 0, "IPA saturate not implemented"); | 2200 | |
| 2201 | Tegra::Shader::IpaMode input_mode{instr.ipa.interp_mode.Value(), | 2201 | Tegra::Shader::IpaMode input_mode{instr.ipa.interp_mode.Value(), |
| 2202 | instr.ipa.sample_mode.Value()}; | 2202 | instr.ipa.sample_mode.Value()}; |
| 2203 | regs.SetRegisterToInputAttibute(reg, attribute.element, attribute.index, | 2203 | regs.SetRegisterToInputAttibute(reg, attribute.element, attribute.index, |
| 2204 | input_mode); | 2204 | input_mode); |
| 2205 | |||
| 2206 | if (instr.ipa.saturate) { | ||
| 2207 | regs.SetRegisterToFloat(reg, 0, regs.GetRegisterAsFloat(reg), 1, 1, true); | ||
| 2208 | } | ||
| 2205 | break; | 2209 | break; |
| 2206 | } | 2210 | } |
| 2207 | case OpCode::Id::SSY: { | 2211 | case OpCode::Id::SSY: { |