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-rw-r--r--src/video_core/engines/maxwell_3d.cpp47
-rw-r--r--src/video_core/engines/maxwell_3d.h2
2 files changed, 25 insertions, 24 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index 558955451..514ed93fa 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -98,11 +98,10 @@ void Maxwell3D::InitializeRegisterDefaults() {
98 mme_inline[MAXWELL3D_REG_INDEX(index_array.count)] = true; 98 mme_inline[MAXWELL3D_REG_INDEX(index_array.count)] = true;
99} 99}
100 100
101#define DIRTY_REGS_POS(field_name) (offsetof(Maxwell3D::DirtyRegs, field_name)) 101#define DIRTY_REGS_POS(field_name) static_cast<u8>(offsetof(Maxwell3D::DirtyRegs, field_name))
102 102
103void Maxwell3D::InitDirtySettings() { 103void Maxwell3D::InitDirtySettings() {
104 const auto set_block = [this](const std::size_t start, const std::size_t range, 104 const auto set_block = [this](std::size_t start, std::size_t range, u8 position) {
105 const u8 position) {
106 const auto start_itr = dirty_pointers.begin() + start; 105 const auto start_itr = dirty_pointers.begin() + start;
107 const auto end_itr = start_itr + range; 106 const auto end_itr = start_itr + range;
108 std::fill(start_itr, end_itr, position); 107 std::fill(start_itr, end_itr, position);
@@ -113,10 +112,10 @@ void Maxwell3D::InitDirtySettings() {
113 constexpr u32 registers_per_rt = sizeof(regs.rt[0]) / sizeof(u32); 112 constexpr u32 registers_per_rt = sizeof(regs.rt[0]) / sizeof(u32);
114 constexpr u32 rt_start_reg = MAXWELL3D_REG_INDEX(rt); 113 constexpr u32 rt_start_reg = MAXWELL3D_REG_INDEX(rt);
115 constexpr u32 rt_end_reg = rt_start_reg + registers_per_rt * 8; 114 constexpr u32 rt_end_reg = rt_start_reg + registers_per_rt * 8;
116 u32 rt_dirty_reg = DIRTY_REGS_POS(render_target); 115 u8 rt_dirty_reg = DIRTY_REGS_POS(render_target);
117 for (u32 rt_reg = rt_start_reg; rt_reg < rt_end_reg; rt_reg += registers_per_rt) { 116 for (u32 rt_reg = rt_start_reg; rt_reg < rt_end_reg; rt_reg += registers_per_rt) {
118 set_block(rt_reg, registers_per_rt, rt_dirty_reg); 117 set_block(rt_reg, registers_per_rt, rt_dirty_reg);
119 rt_dirty_reg++; 118 ++rt_dirty_reg;
120 } 119 }
121 constexpr u32 depth_buffer_flag = DIRTY_REGS_POS(depth_buffer); 120 constexpr u32 depth_buffer_flag = DIRTY_REGS_POS(depth_buffer);
122 dirty_pointers[MAXWELL3D_REG_INDEX(zeta_enable)] = depth_buffer_flag; 121 dirty_pointers[MAXWELL3D_REG_INDEX(zeta_enable)] = depth_buffer_flag;
@@ -130,35 +129,35 @@ void Maxwell3D::InitDirtySettings() {
130 constexpr u32 vertex_array_start = MAXWELL3D_REG_INDEX(vertex_array); 129 constexpr u32 vertex_array_start = MAXWELL3D_REG_INDEX(vertex_array);
131 constexpr u32 vertex_array_size = sizeof(regs.vertex_array[0]) / sizeof(u32); 130 constexpr u32 vertex_array_size = sizeof(regs.vertex_array[0]) / sizeof(u32);
132 constexpr u32 vertex_array_end = vertex_array_start + vertex_array_size * Regs::NumVertexArrays; 131 constexpr u32 vertex_array_end = vertex_array_start + vertex_array_size * Regs::NumVertexArrays;
133 u32 va_reg = DIRTY_REGS_POS(vertex_array); 132 u8 va_dirty_reg = DIRTY_REGS_POS(vertex_array);
134 u32 vi_reg = DIRTY_REGS_POS(vertex_instance); 133 u8 vi_dirty_reg = DIRTY_REGS_POS(vertex_instance);
135 for (u32 vertex_reg = vertex_array_start; vertex_reg < vertex_array_end; 134 for (u32 vertex_reg = vertex_array_start; vertex_reg < vertex_array_end;
136 vertex_reg += vertex_array_size) { 135 vertex_reg += vertex_array_size) {
137 set_block(vertex_reg, 3, va_reg); 136 set_block(vertex_reg, 3, va_dirty_reg);
138 // The divisor concerns vertex array instances 137 // The divisor concerns vertex array instances
139 dirty_pointers[vertex_reg + 3] = vi_reg; 138 dirty_pointers[static_cast<std::size_t>(vertex_reg) + 3] = vi_dirty_reg;
140 va_reg++; 139 ++va_dirty_reg;
141 vi_reg++; 140 ++vi_dirty_reg;
142 } 141 }
143 constexpr u32 vertex_limit_start = MAXWELL3D_REG_INDEX(vertex_array_limit); 142 constexpr u32 vertex_limit_start = MAXWELL3D_REG_INDEX(vertex_array_limit);
144 constexpr u32 vertex_limit_size = sizeof(regs.vertex_array_limit[0]) / sizeof(u32); 143 constexpr u32 vertex_limit_size = sizeof(regs.vertex_array_limit[0]) / sizeof(u32);
145 constexpr u32 vertex_limit_end = vertex_limit_start + vertex_limit_size * Regs::NumVertexArrays; 144 constexpr u32 vertex_limit_end = vertex_limit_start + vertex_limit_size * Regs::NumVertexArrays;
146 va_reg = DIRTY_REGS_POS(vertex_array); 145 va_dirty_reg = DIRTY_REGS_POS(vertex_array);
147 for (u32 vertex_reg = vertex_limit_start; vertex_reg < vertex_limit_end; 146 for (u32 vertex_reg = vertex_limit_start; vertex_reg < vertex_limit_end;
148 vertex_reg += vertex_limit_size) { 147 vertex_reg += vertex_limit_size) {
149 set_block(vertex_reg, vertex_limit_size, va_reg); 148 set_block(vertex_reg, vertex_limit_size, va_dirty_reg);
150 va_reg++; 149 va_dirty_reg++;
151 } 150 }
152 constexpr u32 vertex_instance_start = MAXWELL3D_REG_INDEX(instanced_arrays); 151 constexpr u32 vertex_instance_start = MAXWELL3D_REG_INDEX(instanced_arrays);
153 constexpr u32 vertex_instance_size = 152 constexpr u32 vertex_instance_size =
154 sizeof(regs.instanced_arrays.is_instanced[0]) / sizeof(u32); 153 sizeof(regs.instanced_arrays.is_instanced[0]) / sizeof(u32);
155 constexpr u32 vertex_instance_end = 154 constexpr u32 vertex_instance_end =
156 vertex_instance_start + vertex_instance_size * Regs::NumVertexArrays; 155 vertex_instance_start + vertex_instance_size * Regs::NumVertexArrays;
157 vi_reg = DIRTY_REGS_POS(vertex_instance); 156 vi_dirty_reg = DIRTY_REGS_POS(vertex_instance);
158 for (u32 vertex_reg = vertex_instance_start; vertex_reg < vertex_instance_end; 157 for (u32 vertex_reg = vertex_instance_start; vertex_reg < vertex_instance_end;
159 vertex_reg += vertex_instance_size) { 158 vertex_reg += vertex_instance_size) {
160 set_block(vertex_reg, vertex_instance_size, vi_reg); 159 set_block(vertex_reg, vertex_instance_size, vi_dirty_reg);
161 vi_reg++; 160 vi_dirty_reg++;
162 } 161 }
163 set_block(MAXWELL3D_REG_INDEX(vertex_attrib_format), regs.vertex_attrib_format.size(), 162 set_block(MAXWELL3D_REG_INDEX(vertex_attrib_format), regs.vertex_attrib_format.size(),
164 DIRTY_REGS_POS(vertex_attrib_format)); 163 DIRTY_REGS_POS(vertex_attrib_format));
@@ -172,7 +171,7 @@ void Maxwell3D::InitDirtySettings() {
172 // State 171 // State
173 172
174 // Viewport 173 // Viewport
175 constexpr u32 viewport_dirty_reg = DIRTY_REGS_POS(viewport); 174 constexpr u8 viewport_dirty_reg = DIRTY_REGS_POS(viewport);
176 constexpr u32 viewport_start = MAXWELL3D_REG_INDEX(viewports); 175 constexpr u32 viewport_start = MAXWELL3D_REG_INDEX(viewports);
177 constexpr u32 viewport_size = sizeof(regs.viewports) / sizeof(u32); 176 constexpr u32 viewport_size = sizeof(regs.viewports) / sizeof(u32);
178 set_block(viewport_start, viewport_size, viewport_dirty_reg); 177 set_block(viewport_start, viewport_size, viewport_dirty_reg);
@@ -199,7 +198,7 @@ void Maxwell3D::InitDirtySettings() {
199 set_block(primitive_restart_start, primitive_restart_size, DIRTY_REGS_POS(primitive_restart)); 198 set_block(primitive_restart_start, primitive_restart_size, DIRTY_REGS_POS(primitive_restart));
200 199
201 // Depth Test 200 // Depth Test
202 constexpr u32 depth_test_dirty_reg = DIRTY_REGS_POS(depth_test); 201 constexpr u8 depth_test_dirty_reg = DIRTY_REGS_POS(depth_test);
203 dirty_pointers[MAXWELL3D_REG_INDEX(depth_test_enable)] = depth_test_dirty_reg; 202 dirty_pointers[MAXWELL3D_REG_INDEX(depth_test_enable)] = depth_test_dirty_reg;
204 dirty_pointers[MAXWELL3D_REG_INDEX(depth_write_enabled)] = depth_test_dirty_reg; 203 dirty_pointers[MAXWELL3D_REG_INDEX(depth_write_enabled)] = depth_test_dirty_reg;
205 dirty_pointers[MAXWELL3D_REG_INDEX(depth_test_func)] = depth_test_dirty_reg; 204 dirty_pointers[MAXWELL3D_REG_INDEX(depth_test_func)] = depth_test_dirty_reg;
@@ -224,12 +223,12 @@ void Maxwell3D::InitDirtySettings() {
224 dirty_pointers[MAXWELL3D_REG_INDEX(stencil_back_mask)] = stencil_test_dirty_reg; 223 dirty_pointers[MAXWELL3D_REG_INDEX(stencil_back_mask)] = stencil_test_dirty_reg;
225 224
226 // Color Mask 225 // Color Mask
227 constexpr u32 color_mask_dirty_reg = DIRTY_REGS_POS(color_mask); 226 constexpr u8 color_mask_dirty_reg = DIRTY_REGS_POS(color_mask);
228 dirty_pointers[MAXWELL3D_REG_INDEX(color_mask_common)] = color_mask_dirty_reg; 227 dirty_pointers[MAXWELL3D_REG_INDEX(color_mask_common)] = color_mask_dirty_reg;
229 set_block(MAXWELL3D_REG_INDEX(color_mask), sizeof(regs.color_mask) / sizeof(u32), 228 set_block(MAXWELL3D_REG_INDEX(color_mask), sizeof(regs.color_mask) / sizeof(u32),
230 color_mask_dirty_reg); 229 color_mask_dirty_reg);
231 // Blend State 230 // Blend State
232 constexpr u32 blend_state_dirty_reg = DIRTY_REGS_POS(blend_state); 231 constexpr u8 blend_state_dirty_reg = DIRTY_REGS_POS(blend_state);
233 set_block(MAXWELL3D_REG_INDEX(blend_color), sizeof(regs.blend_color) / sizeof(u32), 232 set_block(MAXWELL3D_REG_INDEX(blend_color), sizeof(regs.blend_color) / sizeof(u32),
234 blend_state_dirty_reg); 233 blend_state_dirty_reg);
235 dirty_pointers[MAXWELL3D_REG_INDEX(independent_blend_enable)] = blend_state_dirty_reg; 234 dirty_pointers[MAXWELL3D_REG_INDEX(independent_blend_enable)] = blend_state_dirty_reg;
@@ -238,12 +237,12 @@ void Maxwell3D::InitDirtySettings() {
238 blend_state_dirty_reg); 237 blend_state_dirty_reg);
239 238
240 // Scissor State 239 // Scissor State
241 constexpr u32 scissor_test_dirty_reg = DIRTY_REGS_POS(scissor_test); 240 constexpr u8 scissor_test_dirty_reg = DIRTY_REGS_POS(scissor_test);
242 set_block(MAXWELL3D_REG_INDEX(scissor_test), sizeof(regs.scissor_test) / sizeof(u32), 241 set_block(MAXWELL3D_REG_INDEX(scissor_test), sizeof(regs.scissor_test) / sizeof(u32),
243 scissor_test_dirty_reg); 242 scissor_test_dirty_reg);
244 243
245 // Polygon Offset 244 // Polygon Offset
246 constexpr u32 polygon_offset_dirty_reg = DIRTY_REGS_POS(polygon_offset); 245 constexpr u8 polygon_offset_dirty_reg = DIRTY_REGS_POS(polygon_offset);
247 dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_fill_enable)] = polygon_offset_dirty_reg; 246 dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_fill_enable)] = polygon_offset_dirty_reg;
248 dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_line_enable)] = polygon_offset_dirty_reg; 247 dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_line_enable)] = polygon_offset_dirty_reg;
249 dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_point_enable)] = polygon_offset_dirty_reg; 248 dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_point_enable)] = polygon_offset_dirty_reg;
@@ -252,7 +251,7 @@ void Maxwell3D::InitDirtySettings() {
252 dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_clamp)] = polygon_offset_dirty_reg; 251 dirty_pointers[MAXWELL3D_REG_INDEX(polygon_offset_clamp)] = polygon_offset_dirty_reg;
253 252
254 // Depth bounds 253 // Depth bounds
255 constexpr u32 depth_bounds_values_dirty_reg = DIRTY_REGS_POS(depth_bounds_values); 254 constexpr u8 depth_bounds_values_dirty_reg = DIRTY_REGS_POS(depth_bounds_values);
256 dirty_pointers[MAXWELL3D_REG_INDEX(depth_bounds[0])] = depth_bounds_values_dirty_reg; 255 dirty_pointers[MAXWELL3D_REG_INDEX(depth_bounds[0])] = depth_bounds_values_dirty_reg;
257 dirty_pointers[MAXWELL3D_REG_INDEX(depth_bounds[1])] = depth_bounds_values_dirty_reg; 256 dirty_pointers[MAXWELL3D_REG_INDEX(depth_bounds[1])] = depth_bounds_values_dirty_reg;
258} 257}
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index fa846a621..987ad77b2 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -1166,6 +1166,8 @@ public:
1166 1166
1167 struct DirtyRegs { 1167 struct DirtyRegs {
1168 static constexpr std::size_t NUM_REGS = 256; 1168 static constexpr std::size_t NUM_REGS = 256;
1169 static_assert(NUM_REGS - 1 <= std::numeric_limits<u8>::max());
1170
1169 union { 1171 union {
1170 struct { 1172 struct {
1171 bool null_dirty; 1173 bool null_dirty;