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-rw-r--r--src/video_core/engines/maxwell_3d.cpp11
-rw-r--r--src/video_core/engines/maxwell_3d.h8
-rw-r--r--src/video_core/macro_interpreter.cpp4
3 files changed, 19 insertions, 4 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index f5158d219..f2cffd8ef 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -328,6 +328,10 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
328 ProcessMacroBind(method_call.argument); 328 ProcessMacroBind(method_call.argument);
329 break; 329 break;
330 } 330 }
331 case MAXWELL3D_REG_INDEX(firmware[4]): {
332 ProcessFirmwareCall4();
333 break;
334 }
331 case MAXWELL3D_REG_INDEX(const_buffer.cb_data[0]): 335 case MAXWELL3D_REG_INDEX(const_buffer.cb_data[0]):
332 case MAXWELL3D_REG_INDEX(const_buffer.cb_data[1]): 336 case MAXWELL3D_REG_INDEX(const_buffer.cb_data[1]):
333 case MAXWELL3D_REG_INDEX(const_buffer.cb_data[2]): 337 case MAXWELL3D_REG_INDEX(const_buffer.cb_data[2]):
@@ -418,6 +422,13 @@ void Maxwell3D::ProcessMacroBind(u32 data) {
418 macro_positions[regs.macros.entry++] = data; 422 macro_positions[regs.macros.entry++] = data;
419} 423}
420 424
425void Maxwell3D::ProcessFirmwareCall4() {
426 LOG_WARNING(HW_GPU, "(STUBBED) called");
427
428 // For details refer to #2501
429 regs.reg_array[0xd00] = 1;
430}
431
421void Maxwell3D::ProcessQueryGet() { 432void Maxwell3D::ProcessQueryGet() {
422 const GPUVAddr sequence_address{regs.query.QueryAddress()}; 433 const GPUVAddr sequence_address{regs.query.QueryAddress()};
423 // Since the sequence address is given as a GPU VAddr, we have to convert it to an application 434 // Since the sequence address is given as a GPU VAddr, we have to convert it to an application
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 0184342a0..95d434b40 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -1088,7 +1088,9 @@ public:
1088 INSERT_PADDING_WORDS(14); 1088 INSERT_PADDING_WORDS(14);
1089 } shader_config[MaxShaderProgram]; 1089 } shader_config[MaxShaderProgram];
1090 1090
1091 INSERT_PADDING_WORDS(0x80); 1091 INSERT_PADDING_WORDS(0x60);
1092
1093 u32 firmware[0x20];
1092 1094
1093 struct { 1095 struct {
1094 u32 cb_size; 1096 u32 cb_size;
@@ -1317,6 +1319,9 @@ private:
1317 /// Handles writes to the macro bind register. 1319 /// Handles writes to the macro bind register.
1318 void ProcessMacroBind(u32 data); 1320 void ProcessMacroBind(u32 data);
1319 1321
1322 /// Handles firmware blob 4
1323 void ProcessFirmwareCall4();
1324
1320 /// Handles a write to the CLEAR_BUFFERS register. 1325 /// Handles a write to the CLEAR_BUFFERS register.
1321 void ProcessClearBuffers(); 1326 void ProcessClearBuffers();
1322 1327
@@ -1429,6 +1434,7 @@ ASSERT_REG_POSITION(vertex_array[0], 0x700);
1429ASSERT_REG_POSITION(independent_blend, 0x780); 1434ASSERT_REG_POSITION(independent_blend, 0x780);
1430ASSERT_REG_POSITION(vertex_array_limit[0], 0x7C0); 1435ASSERT_REG_POSITION(vertex_array_limit[0], 0x7C0);
1431ASSERT_REG_POSITION(shader_config[0], 0x800); 1436ASSERT_REG_POSITION(shader_config[0], 0x800);
1437ASSERT_REG_POSITION(firmware, 0x8C0);
1432ASSERT_REG_POSITION(const_buffer, 0x8E0); 1438ASSERT_REG_POSITION(const_buffer, 0x8E0);
1433ASSERT_REG_POSITION(cb_bind[0], 0x904); 1439ASSERT_REG_POSITION(cb_bind[0], 0x904);
1434ASSERT_REG_POSITION(tex_cb_index, 0x982); 1440ASSERT_REG_POSITION(tex_cb_index, 0x982);
diff --git a/src/video_core/macro_interpreter.cpp b/src/video_core/macro_interpreter.cpp
index 9f59a2dc1..a891e412a 100644
--- a/src/video_core/macro_interpreter.cpp
+++ b/src/video_core/macro_interpreter.cpp
@@ -124,9 +124,7 @@ bool MacroInterpreter::Step(u32 offset, bool is_delay_slot) {
124 124
125 // An instruction with the Exit flag will not actually 125 // An instruction with the Exit flag will not actually
126 // cause an exit if it's executed inside a delay slot. 126 // cause an exit if it's executed inside a delay slot.
127 // TODO(Blinkhawk): Reversed to always exit. The behavior explained above requires further 127 if (opcode.is_exit && !is_delay_slot) {
128 // testing on the MME code.
129 if (opcode.is_exit) {
130 // Exit has a delay slot, execute the next instruction 128 // Exit has a delay slot, execute the next instruction
131 Step(offset, true); 129 Step(offset, true);
132 return false; 130 return false;