diff options
| -rw-r--r-- | src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp | 25 | ||||
| -rw-r--r-- | src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h | 18 |
2 files changed, 22 insertions, 21 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp index cc2192e5c..0d913334e 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp +++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp | |||
| @@ -25,7 +25,7 @@ u32 nvhost_ctrl_gpu::ioctl(Ioctl command, const std::vector<u8>& input, | |||
| 25 | case IoctlCommand::IocGetCharacteristicsCommand: | 25 | case IoctlCommand::IocGetCharacteristicsCommand: |
| 26 | return GetCharacteristics(input, output, output2, version); | 26 | return GetCharacteristics(input, output, output2, version); |
| 27 | case IoctlCommand::IocGetTPCMasksCommand: | 27 | case IoctlCommand::IocGetTPCMasksCommand: |
| 28 | return GetTPCMasks(input, output); | 28 | return GetTPCMasks(input, output, output2, version); |
| 29 | case IoctlCommand::IocGetActiveSlotMaskCommand: | 29 | case IoctlCommand::IocGetActiveSlotMaskCommand: |
| 30 | return GetActiveSlotMask(input, output); | 30 | return GetActiveSlotMask(input, output); |
| 31 | case IoctlCommand::IocZcullGetCtxSizeCommand: | 31 | case IoctlCommand::IocZcullGetCtxSizeCommand: |
| @@ -98,17 +98,22 @@ u32 nvhost_ctrl_gpu::GetCharacteristics(const std::vector<u8>& input, std::vecto | |||
| 98 | return 0; | 98 | return 0; |
| 99 | } | 99 | } |
| 100 | 100 | ||
| 101 | u32 nvhost_ctrl_gpu::GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output) { | 101 | u32 nvhost_ctrl_gpu::GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output, |
| 102 | std::vector<u8>& output2, IoctlVersion version) { | ||
| 102 | IoctlGpuGetTpcMasksArgs params{}; | 103 | IoctlGpuGetTpcMasksArgs params{}; |
| 103 | std::memcpy(¶ms, input.data(), input.size()); | 104 | std::memcpy(¶ms, input.data(), input.size()); |
| 104 | LOG_INFO(Service_NVDRV, "called, mask=0x{:X}, mask_buf_addr=0x{:X}", params.mask_buf_size, | 105 | LOG_DEBUG(Service_NVDRV, "called, mask_buffer_size=0x{:X}", params.mask_buffer_size); |
| 105 | params.mask_buf_addr); | 106 | if (params.mask_buffer_size != 0) { |
| 106 | // TODO(ogniK): Confirm value on hardware | 107 | params.tcp_mask = 3; |
| 107 | if (params.mask_buf_size) | 108 | } |
| 108 | params.tpc_mask_size = 4 * 1; // 4 * num_gpc | 109 | |
| 109 | else | 110 | if (version == IoctlVersion::Version3) { |
| 110 | params.tpc_mask_size = 0; | 111 | std::memcpy(output.data(), input.data(), output.size()); |
| 111 | std::memcpy(output.data(), ¶ms, sizeof(params)); | 112 | std::memcpy(output2.data(), ¶ms.tcp_mask, output2.size()); |
| 113 | } else { | ||
| 114 | std::memcpy(output.data(), ¶ms, output.size()); | ||
| 115 | } | ||
| 116 | |||
| 112 | return 0; | 117 | return 0; |
| 113 | } | 118 | } |
| 114 | 119 | ||
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h index 07b644ec5..ef60f72ce 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h +++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h | |||
| @@ -92,16 +92,11 @@ private: | |||
| 92 | "IoctlCharacteristics is incorrect size"); | 92 | "IoctlCharacteristics is incorrect size"); |
| 93 | 93 | ||
| 94 | struct IoctlGpuGetTpcMasksArgs { | 94 | struct IoctlGpuGetTpcMasksArgs { |
| 95 | /// [in] TPC mask buffer size reserved by userspace. Should be at least | 95 | u32_le mask_buffer_size{}; |
| 96 | /// sizeof(__u32) * fls(gpc_mask) to receive TPC mask for each GPC. | 96 | INSERT_PADDING_WORDS(1); |
| 97 | /// [out] full kernel buffer size | 97 | u64_le mask_buffer_address{}; |
| 98 | u32_le mask_buf_size; | 98 | u32_le tcp_mask{}; |
| 99 | u32_le reserved; | 99 | INSERT_PADDING_WORDS(1); |
| 100 | |||
| 101 | /// [in] pointer to TPC mask buffer. It will receive one 32-bit TPC mask per GPC or 0 if | ||
| 102 | /// GPC is not enabled or not present. This parameter is ignored if mask_buf_size is 0. | ||
| 103 | u64_le mask_buf_addr; | ||
| 104 | u64_le tpc_mask_size; // Nintendo add this? | ||
| 105 | }; | 100 | }; |
| 106 | static_assert(sizeof(IoctlGpuGetTpcMasksArgs) == 24, | 101 | static_assert(sizeof(IoctlGpuGetTpcMasksArgs) == 24, |
| 107 | "IoctlGpuGetTpcMasksArgs is incorrect size"); | 102 | "IoctlGpuGetTpcMasksArgs is incorrect size"); |
| @@ -166,7 +161,8 @@ private: | |||
| 166 | 161 | ||
| 167 | u32 GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output, | 162 | u32 GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output, |
| 168 | std::vector<u8>& output2, IoctlVersion version); | 163 | std::vector<u8>& output2, IoctlVersion version); |
| 169 | u32 GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output); | 164 | u32 GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output, std::vector<u8>& output2, |
| 165 | IoctlVersion version); | ||
| 170 | u32 GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output); | 166 | u32 GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output); |
| 171 | u32 ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output); | 167 | u32 ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output); |
| 172 | u32 ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output); | 168 | u32 ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output); |