diff options
7 files changed, 15 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h index 749ad1240..17a452e0e 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv.h | |||
| @@ -71,6 +71,7 @@ void EmitSetMXFlag(EmitContext& ctx); | |||
| 71 | Id EmitWorkgroupId(EmitContext& ctx); | 71 | Id EmitWorkgroupId(EmitContext& ctx); |
| 72 | Id EmitLocalInvocationId(EmitContext& ctx); | 72 | Id EmitLocalInvocationId(EmitContext& ctx); |
| 73 | Id EmitLoadLocal(EmitContext& ctx, Id word_offset); | 73 | Id EmitLoadLocal(EmitContext& ctx, Id word_offset); |
| 74 | Id EmitLaneId(EmitContext& ctx); | ||
| 74 | void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value); | 75 | void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value); |
| 75 | Id EmitUndefU1(EmitContext& ctx); | 76 | Id EmitUndefU1(EmitContext& ctx); |
| 76 | Id EmitUndefU8(EmitContext& ctx); | 77 | Id EmitUndefU8(EmitContext& ctx); |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp index a96ee6f0d..f13c0ee72 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp | |||
| @@ -303,6 +303,10 @@ Id EmitLocalInvocationId(EmitContext& ctx) { | |||
| 303 | return ctx.OpLoad(ctx.U32[3], ctx.local_invocation_id); | 303 | return ctx.OpLoad(ctx.U32[3], ctx.local_invocation_id); |
| 304 | } | 304 | } |
| 305 | 305 | ||
| 306 | Id EmitLaneId(EmitContext& ctx) { | ||
| 307 | return ctx.OpLoad(ctx.U32[1], ctx.subgroup_local_invocation_id); | ||
| 308 | } | ||
| 309 | |||
| 306 | Id EmitLoadLocal(EmitContext& ctx, Id word_offset) { | 310 | Id EmitLoadLocal(EmitContext& ctx, Id word_offset) { |
| 307 | const Id pointer{ctx.OpAccessChain(ctx.private_u32, ctx.local_memory, word_offset)}; | 311 | const Id pointer{ctx.OpAccessChain(ctx.private_u32, ctx.local_memory, word_offset)}; |
| 308 | return ctx.OpLoad(ctx.U32[1], pointer); | 312 | return ctx.OpLoad(ctx.U32[1], pointer); |
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp index 2fd90303f..b5f61956a 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp +++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp | |||
| @@ -355,6 +355,10 @@ U32 IREmitter::LocalInvocationIdZ() { | |||
| 355 | return U32{CompositeExtract(Inst(Opcode::LocalInvocationId), 2)}; | 355 | return U32{CompositeExtract(Inst(Opcode::LocalInvocationId), 2)}; |
| 356 | } | 356 | } |
| 357 | 357 | ||
| 358 | U32 IREmitter::LaneId() { | ||
| 359 | return Inst<U32>(Opcode::LaneId); | ||
| 360 | } | ||
| 361 | |||
| 358 | U32 IREmitter::LoadGlobalU8(const U64& address) { | 362 | U32 IREmitter::LoadGlobalU8(const U64& address) { |
| 359 | return Inst<U32>(Opcode::LoadGlobalU8, address); | 363 | return Inst<U32>(Opcode::LoadGlobalU8, address); |
| 360 | } | 364 | } |
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h index 5bebf66e3..e034d672f 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.h +++ b/src/shader_recompiler/frontend/ir/ir_emitter.h | |||
| @@ -97,6 +97,8 @@ public: | |||
| 97 | [[nodiscard]] U32 LocalInvocationIdY(); | 97 | [[nodiscard]] U32 LocalInvocationIdY(); |
| 98 | [[nodiscard]] U32 LocalInvocationIdZ(); | 98 | [[nodiscard]] U32 LocalInvocationIdZ(); |
| 99 | 99 | ||
| 100 | [[nodiscard]] U32 LaneId(); | ||
| 101 | |||
| 100 | [[nodiscard]] U32 LoadGlobalU8(const U64& address); | 102 | [[nodiscard]] U32 LoadGlobalU8(const U64& address); |
| 101 | [[nodiscard]] U32 LoadGlobalS8(const U64& address); | 103 | [[nodiscard]] U32 LoadGlobalS8(const U64& address); |
| 102 | [[nodiscard]] U32 LoadGlobalU16(const U64& address); | 104 | [[nodiscard]] U32 LoadGlobalU16(const U64& address); |
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc index d9e0d5471..74e956930 100644 --- a/src/shader_recompiler/frontend/ir/opcodes.inc +++ b/src/shader_recompiler/frontend/ir/opcodes.inc | |||
| @@ -63,6 +63,7 @@ OPCODE(SetTRFlag, Void, U1, | |||
| 63 | OPCODE(SetMXFlag, Void, U1, ) | 63 | OPCODE(SetMXFlag, Void, U1, ) |
| 64 | OPCODE(WorkgroupId, U32x3, ) | 64 | OPCODE(WorkgroupId, U32x3, ) |
| 65 | OPCODE(LocalInvocationId, U32x3, ) | 65 | OPCODE(LocalInvocationId, U32x3, ) |
| 66 | OPCODE(LaneId, U32, ) | ||
| 66 | 67 | ||
| 67 | // Undefined | 68 | // Undefined |
| 68 | OPCODE(UndefU1, U1, ) | 69 | OPCODE(UndefU1, U1, ) |
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp index a295f4c5e..731ac643f 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp | |||
| @@ -99,6 +99,8 @@ enum class SpecialRegister : u64 { | |||
| 99 | return ir.Imm32(Common::BitCast<u32>(1.0f)); | 99 | return ir.Imm32(Common::BitCast<u32>(1.0f)); |
| 100 | case SpecialRegister::SR_WSCALEFACTOR_Z: | 100 | case SpecialRegister::SR_WSCALEFACTOR_Z: |
| 101 | return ir.Imm32(Common::BitCast<u32>(1.0f)); | 101 | return ir.Imm32(Common::BitCast<u32>(1.0f)); |
| 102 | case SpecialRegister::SR_LANEID: | ||
| 103 | return ir.LaneId(); | ||
| 102 | default: | 104 | default: |
| 103 | throw NotImplementedException("S2R special register {}", special_register); | 105 | throw NotImplementedException("S2R special register {}", special_register); |
| 104 | } | 106 | } |
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp index 514de6838..5c1b81638 100644 --- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp +++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp | |||
| @@ -340,6 +340,7 @@ void VisitUsages(Info& info, IR::Inst& inst) { | |||
| 340 | case IR::Opcode::ShuffleUp: | 340 | case IR::Opcode::ShuffleUp: |
| 341 | case IR::Opcode::ShuffleDown: | 341 | case IR::Opcode::ShuffleDown: |
| 342 | case IR::Opcode::ShuffleButterfly: | 342 | case IR::Opcode::ShuffleButterfly: |
| 343 | case IR::Opcode::LaneId: | ||
| 343 | info.uses_subgroup_invocation_id = true; | 344 | info.uses_subgroup_invocation_id = true; |
| 344 | break; | 345 | break; |
| 345 | case IR::Opcode::GetCbufU8: | 346 | case IR::Opcode::GetCbufU8: |