diff options
| -rw-r--r-- | src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp | 14 | ||||
| -rw-r--r-- | src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp | 9 | ||||
| -rw-r--r-- | src/video_core/macro_interpreter.cpp | 4 | ||||
| -rw-r--r-- | src/video_core/macro_interpreter.h | 4 |
4 files changed, 23 insertions, 8 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp index 44e062f50..010072a5b 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp +++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp | |||
| @@ -97,7 +97,9 @@ u32 nvhost_ctrl_gpu::GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& | |||
| 97 | u32 nvhost_ctrl_gpu::GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output) { | 97 | u32 nvhost_ctrl_gpu::GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output) { |
| 98 | LOG_DEBUG(Service_NVDRV, "called"); | 98 | LOG_DEBUG(Service_NVDRV, "called"); |
| 99 | IoctlActiveSlotMask params{}; | 99 | IoctlActiveSlotMask params{}; |
| 100 | std::memcpy(¶ms, input.data(), input.size()); | 100 | if (input.size() > 0) { |
| 101 | std::memcpy(¶ms, input.data(), input.size()); | ||
| 102 | } | ||
| 101 | params.slot = 0x07; | 103 | params.slot = 0x07; |
| 102 | params.mask = 0x01; | 104 | params.mask = 0x01; |
| 103 | std::memcpy(output.data(), ¶ms, output.size()); | 105 | std::memcpy(output.data(), ¶ms, output.size()); |
| @@ -107,7 +109,9 @@ u32 nvhost_ctrl_gpu::GetActiveSlotMask(const std::vector<u8>& input, std::vector | |||
| 107 | u32 nvhost_ctrl_gpu::ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output) { | 109 | u32 nvhost_ctrl_gpu::ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output) { |
| 108 | LOG_DEBUG(Service_NVDRV, "called"); | 110 | LOG_DEBUG(Service_NVDRV, "called"); |
| 109 | IoctlZcullGetCtxSize params{}; | 111 | IoctlZcullGetCtxSize params{}; |
| 110 | std::memcpy(¶ms, input.data(), input.size()); | 112 | if (input.size() > 0) { |
| 113 | std::memcpy(¶ms, input.data(), input.size()); | ||
| 114 | } | ||
| 111 | params.size = 0x1; | 115 | params.size = 0x1; |
| 112 | std::memcpy(output.data(), ¶ms, output.size()); | 116 | std::memcpy(output.data(), ¶ms, output.size()); |
| 113 | return 0; | 117 | return 0; |
| @@ -116,7 +120,11 @@ u32 nvhost_ctrl_gpu::ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u | |||
| 116 | u32 nvhost_ctrl_gpu::ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output) { | 120 | u32 nvhost_ctrl_gpu::ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output) { |
| 117 | LOG_DEBUG(Service_NVDRV, "called"); | 121 | LOG_DEBUG(Service_NVDRV, "called"); |
| 118 | IoctlNvgpuGpuZcullGetInfoArgs params{}; | 122 | IoctlNvgpuGpuZcullGetInfoArgs params{}; |
| 119 | std::memcpy(¶ms, input.data(), input.size()); | 123 | |
| 124 | if (input.size() > 0) { | ||
| 125 | std::memcpy(¶ms, input.data(), input.size()); | ||
| 126 | } | ||
| 127 | |||
| 120 | params.width_align_pixels = 0x20; | 128 | params.width_align_pixels = 0x20; |
| 121 | params.height_align_pixels = 0x20; | 129 | params.height_align_pixels = 0x20; |
| 122 | params.pixel_squares_by_aliquots = 0x400; | 130 | params.pixel_squares_by_aliquots = 0x400; |
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp index 126782573..5a1123ad2 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp +++ b/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp | |||
| @@ -132,9 +132,12 @@ u32 nvhost_gpu::SubmitGPFIFO(const std::vector<u8>& input, std::vector<u8>& outp | |||
| 132 | LOG_WARNING(Service_NVDRV, "(STUBBED) called, gpfifo={:X}, num_entries={:X}, flags={:X}", | 132 | LOG_WARNING(Service_NVDRV, "(STUBBED) called, gpfifo={:X}, num_entries={:X}, flags={:X}", |
| 133 | params.address, params.num_entries, params.flags); | 133 | params.address, params.num_entries, params.flags); |
| 134 | 134 | ||
| 135 | auto entries = std::vector<IoctlGpfifoEntry>(); | 135 | ASSERT_MSG(input.size() == |
| 136 | entries.resize(params.num_entries); | 136 | sizeof(IoctlSubmitGpfifo) + params.num_entries * sizeof(IoctlGpfifoEntry), |
| 137 | std::memcpy(&entries[0], &input.data()[sizeof(IoctlSubmitGpfifo)], | 137 | "Incorrect input size"); |
| 138 | |||
| 139 | std::vector<IoctlGpfifoEntry> entries(params.num_entries); | ||
| 140 | std::memcpy(entries.data(), &input[sizeof(IoctlSubmitGpfifo)], | ||
| 138 | params.num_entries * sizeof(IoctlGpfifoEntry)); | 141 | params.num_entries * sizeof(IoctlGpfifoEntry)); |
| 139 | for (auto entry : entries) { | 142 | for (auto entry : entries) { |
| 140 | Tegra::GPUVAddr va_addr = entry.Address(); | 143 | Tegra::GPUVAddr va_addr = entry.Address(); |
diff --git a/src/video_core/macro_interpreter.cpp b/src/video_core/macro_interpreter.cpp index 44ece01c1..377bd66ab 100644 --- a/src/video_core/macro_interpreter.cpp +++ b/src/video_core/macro_interpreter.cpp | |||
| @@ -102,11 +102,11 @@ bool MacroInterpreter::Step(const std::vector<u32>& code, bool is_delay_slot) { | |||
| 102 | if (taken) { | 102 | if (taken) { |
| 103 | // Ignore the delay slot if the branch has the annul bit. | 103 | // Ignore the delay slot if the branch has the annul bit. |
| 104 | if (opcode.branch_annul) { | 104 | if (opcode.branch_annul) { |
| 105 | pc = base_address + (opcode.immediate << 2); | 105 | pc = base_address + opcode.GetBranchTarget(); |
| 106 | return true; | 106 | return true; |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | delayed_pc = base_address + (opcode.immediate << 2); | 109 | delayed_pc = base_address + opcode.GetBranchTarget(); |
| 110 | // Execute one more instruction due to the delay slot. | 110 | // Execute one more instruction due to the delay slot. |
| 111 | return Step(code, true); | 111 | return Step(code, true); |
| 112 | } | 112 | } |
diff --git a/src/video_core/macro_interpreter.h b/src/video_core/macro_interpreter.h index a71e359d8..7d836b816 100644 --- a/src/video_core/macro_interpreter.h +++ b/src/video_core/macro_interpreter.h | |||
| @@ -91,6 +91,10 @@ private: | |||
| 91 | u32 GetBitfieldMask() const { | 91 | u32 GetBitfieldMask() const { |
| 92 | return (1 << bf_size) - 1; | 92 | return (1 << bf_size) - 1; |
| 93 | } | 93 | } |
| 94 | |||
| 95 | s32 GetBranchTarget() const { | ||
| 96 | return static_cast<s32>(immediate * sizeof(u32)); | ||
| 97 | } | ||
| 94 | }; | 98 | }; |
| 95 | 99 | ||
| 96 | union MethodAddress { | 100 | union MethodAddress { |