diff options
| -rw-r--r-- | src/core/arm/skyeye_common/armstate.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/src/core/arm/skyeye_common/armstate.h b/src/core/arm/skyeye_common/armstate.h index 98dad9b1f..d42ff2669 100644 --- a/src/core/arm/skyeye_common/armstate.h +++ b/src/core/arm/skyeye_common/armstate.h | |||
| @@ -193,23 +193,23 @@ public: | |||
| 193 | return TFlag ? 2 : 4; | 193 | return TFlag ? 2 : 4; |
| 194 | } | 194 | } |
| 195 | 195 | ||
| 196 | std::array<u32, 16> Reg; // The current register file | 196 | std::array<u32, 16> Reg{}; // The current register file |
| 197 | std::array<u32, 2> Reg_usr; | 197 | std::array<u32, 2> Reg_usr{}; |
| 198 | std::array<u32, 2> Reg_svc; // R13_SVC R14_SVC | 198 | std::array<u32, 2> Reg_svc{}; // R13_SVC R14_SVC |
| 199 | std::array<u32, 2> Reg_abort; // R13_ABORT R14_ABORT | 199 | std::array<u32, 2> Reg_abort{}; // R13_ABORT R14_ABORT |
| 200 | std::array<u32, 2> Reg_undef; // R13 UNDEF R14 UNDEF | 200 | std::array<u32, 2> Reg_undef{}; // R13 UNDEF R14 UNDEF |
| 201 | std::array<u32, 2> Reg_irq; // R13_IRQ R14_IRQ | 201 | std::array<u32, 2> Reg_irq{}; // R13_IRQ R14_IRQ |
| 202 | std::array<u32, 7> Reg_firq; // R8---R14 FIRQ | 202 | std::array<u32, 7> Reg_firq{}; // R8---R14 FIRQ |
| 203 | std::array<u32, 7> Spsr; // The exception psr's | 203 | std::array<u32, 7> Spsr{}; // The exception psr's |
| 204 | std::array<u32, CP15_REGISTER_COUNT> CP15; | 204 | std::array<u32, CP15_REGISTER_COUNT> CP15{}; |
| 205 | 205 | ||
| 206 | // FPSID, FPSCR, and FPEXC | 206 | // FPSID, FPSCR, and FPEXC |
| 207 | std::array<u32, VFP_SYSTEM_REGISTER_COUNT> VFP; | 207 | std::array<u32, VFP_SYSTEM_REGISTER_COUNT> VFP{}; |
| 208 | 208 | ||
| 209 | // VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31). | 209 | // VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31). |
| 210 | // VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31), | 210 | // VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31), |
| 211 | // and only 32 singleword registers are accessible (S0-S31). | 211 | // and only 32 singleword registers are accessible (S0-S31). |
| 212 | std::array<u32, 64> ExtReg; | 212 | std::array<u32, 64> ExtReg{}; |
| 213 | 213 | ||
| 214 | u32 Emulate; // To start and stop emulation | 214 | u32 Emulate; // To start and stop emulation |
| 215 | u32 Cpsr; // The current PSR | 215 | u32 Cpsr; // The current PSR |