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-rw-r--r--src/video_core/engines/maxwell_dma.cpp2
-rw-r--r--src/video_core/gpu.cpp20
-rw-r--r--src/video_core/gpu.h9
-rw-r--r--src/video_core/renderer_opengl/gl_texture_cache.cpp1
-rw-r--r--src/video_core/shader/decode/arithmetic.cpp13
-rw-r--r--src/video_core/shader/decode/arithmetic_half_immediate.cpp4
-rw-r--r--src/video_core/shader/decode/ffma.cpp10
-rw-r--r--src/video_core/shader/decode/half_set_predicate.cpp2
-rw-r--r--src/video_core/shader/decode/hfma2.cpp4
9 files changed, 36 insertions, 29 deletions
diff --git a/src/video_core/engines/maxwell_dma.cpp b/src/video_core/engines/maxwell_dma.cpp
index b5f57e534..a28c04473 100644
--- a/src/video_core/engines/maxwell_dma.cpp
+++ b/src/video_core/engines/maxwell_dma.cpp
@@ -38,7 +38,7 @@ void MaxwellDMA::CallMethod(const GPU::MethodCall& method_call) {
38} 38}
39 39
40void MaxwellDMA::HandleCopy() { 40void MaxwellDMA::HandleCopy() {
41 LOG_WARNING(HW_GPU, "Requested a DMA copy"); 41 LOG_TRACE(HW_GPU, "Requested a DMA copy");
42 42
43 const GPUVAddr source = regs.src_address.Address(); 43 const GPUVAddr source = regs.src_address.Address();
44 const GPUVAddr dest = regs.dst_address.Address(); 44 const GPUVAddr dest = regs.dst_address.Address();
diff --git a/src/video_core/gpu.cpp b/src/video_core/gpu.cpp
index e25754e37..21007d8b2 100644
--- a/src/video_core/gpu.cpp
+++ b/src/video_core/gpu.cpp
@@ -151,12 +151,12 @@ enum class BufferMethods {
151 NotifyIntr = 0x8, 151 NotifyIntr = 0x8,
152 WrcacheFlush = 0x9, 152 WrcacheFlush = 0x9,
153 Unk28 = 0xA, 153 Unk28 = 0xA,
154 Unk2c = 0xB, 154 UnkCacheFlush = 0xB,
155 RefCnt = 0x14, 155 RefCnt = 0x14,
156 SemaphoreAcquire = 0x1A, 156 SemaphoreAcquire = 0x1A,
157 SemaphoreRelease = 0x1B, 157 SemaphoreRelease = 0x1B,
158 Unk70 = 0x1C, 158 FenceValue = 0x1C,
159 Unk74 = 0x1D, 159 FenceAction = 0x1D,
160 Unk78 = 0x1E, 160 Unk78 = 0x1E,
161 Unk7c = 0x1F, 161 Unk7c = 0x1F,
162 Yield = 0x20, 162 Yield = 0x20,
@@ -202,6 +202,10 @@ void GPU::CallPullerMethod(const MethodCall& method_call) {
202 case BufferMethods::SemaphoreAddressLow: 202 case BufferMethods::SemaphoreAddressLow:
203 case BufferMethods::SemaphoreSequence: 203 case BufferMethods::SemaphoreSequence:
204 case BufferMethods::RefCnt: 204 case BufferMethods::RefCnt:
205 case BufferMethods::UnkCacheFlush:
206 case BufferMethods::WrcacheFlush:
207 case BufferMethods::FenceValue:
208 case BufferMethods::FenceAction:
205 break; 209 break;
206 case BufferMethods::SemaphoreTrigger: { 210 case BufferMethods::SemaphoreTrigger: {
207 ProcessSemaphoreTriggerMethod(); 211 ProcessSemaphoreTriggerMethod();
@@ -212,21 +216,11 @@ void GPU::CallPullerMethod(const MethodCall& method_call) {
212 LOG_ERROR(HW_GPU, "Special puller engine method NotifyIntr not implemented"); 216 LOG_ERROR(HW_GPU, "Special puller engine method NotifyIntr not implemented");
213 break; 217 break;
214 } 218 }
215 case BufferMethods::WrcacheFlush: {
216 // TODO(Kmather73): Research and implement this method.
217 LOG_ERROR(HW_GPU, "Special puller engine method WrcacheFlush not implemented");
218 break;
219 }
220 case BufferMethods::Unk28: { 219 case BufferMethods::Unk28: {
221 // TODO(Kmather73): Research and implement this method. 220 // TODO(Kmather73): Research and implement this method.
222 LOG_ERROR(HW_GPU, "Special puller engine method Unk28 not implemented"); 221 LOG_ERROR(HW_GPU, "Special puller engine method Unk28 not implemented");
223 break; 222 break;
224 } 223 }
225 case BufferMethods::Unk2c: {
226 // TODO(Kmather73): Research and implement this method.
227 LOG_ERROR(HW_GPU, "Special puller engine method Unk2c not implemented");
228 break;
229 }
230 case BufferMethods::SemaphoreAcquire: { 224 case BufferMethods::SemaphoreAcquire: {
231 ProcessSemaphoreAcquire(); 225 ProcessSemaphoreAcquire();
232 break; 226 break;
diff --git a/src/video_core/gpu.h b/src/video_core/gpu.h
index 0ace0ff4f..0055e5326 100644
--- a/src/video_core/gpu.h
+++ b/src/video_core/gpu.h
@@ -200,7 +200,12 @@ public:
200 200
201 u32 semaphore_acquire; 201 u32 semaphore_acquire;
202 u32 semaphore_release; 202 u32 semaphore_release;
203 INSERT_PADDING_WORDS(0xE4); 203 u32 fence_value;
204 union {
205 BitField<4, 4, u32> operation;
206 BitField<8, 8, u32> id;
207 } fence_action;
208 INSERT_PADDING_WORDS(0xE2);
204 209
205 // Puller state 210 // Puller state
206 u32 acquire_mode; 211 u32 acquire_mode;
@@ -280,6 +285,8 @@ ASSERT_REG_POSITION(semaphore_trigger, 0x7);
280ASSERT_REG_POSITION(reference_count, 0x14); 285ASSERT_REG_POSITION(reference_count, 0x14);
281ASSERT_REG_POSITION(semaphore_acquire, 0x1A); 286ASSERT_REG_POSITION(semaphore_acquire, 0x1A);
282ASSERT_REG_POSITION(semaphore_release, 0x1B); 287ASSERT_REG_POSITION(semaphore_release, 0x1B);
288ASSERT_REG_POSITION(fence_value, 0x1C);
289ASSERT_REG_POSITION(fence_action, 0x1D);
283 290
284ASSERT_REG_POSITION(acquire_mode, 0x100); 291ASSERT_REG_POSITION(acquire_mode, 0x100);
285ASSERT_REG_POSITION(acquire_source, 0x101); 292ASSERT_REG_POSITION(acquire_source, 0x101);
diff --git a/src/video_core/renderer_opengl/gl_texture_cache.cpp b/src/video_core/renderer_opengl/gl_texture_cache.cpp
index 8fcd39a69..408332f90 100644
--- a/src/video_core/renderer_opengl/gl_texture_cache.cpp
+++ b/src/video_core/renderer_opengl/gl_texture_cache.cpp
@@ -137,7 +137,6 @@ constexpr std::array<FormatTuple, VideoCore::Surface::MaxPixelFormat> tex_format
137const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType component_type) { 137const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType component_type) {
138 ASSERT(static_cast<std::size_t>(pixel_format) < tex_format_tuples.size()); 138 ASSERT(static_cast<std::size_t>(pixel_format) < tex_format_tuples.size());
139 const auto& format{tex_format_tuples[static_cast<std::size_t>(pixel_format)]}; 139 const auto& format{tex_format_tuples[static_cast<std::size_t>(pixel_format)]};
140 ASSERT(component_type == format.component_type);
141 return format; 140 return format;
142} 141}
143 142
diff --git a/src/video_core/shader/decode/arithmetic.cpp b/src/video_core/shader/decode/arithmetic.cpp
index 87d8fecaa..1473c282a 100644
--- a/src/video_core/shader/decode/arithmetic.cpp
+++ b/src/video_core/shader/decode/arithmetic.cpp
@@ -42,11 +42,14 @@ u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) {
42 case OpCode::Id::FMUL_R: 42 case OpCode::Id::FMUL_R:
43 case OpCode::Id::FMUL_IMM: { 43 case OpCode::Id::FMUL_IMM: {
44 // FMUL does not have 'abs' bits and only the second operand has a 'neg' bit. 44 // FMUL does not have 'abs' bits and only the second operand has a 'neg' bit.
45 UNIMPLEMENTED_IF_MSG(instr.fmul.tab5cb8_2 != 0, "FMUL tab5cb8_2({}) is not implemented", 45 if (instr.fmul.tab5cb8_2 != 0) {
46 instr.fmul.tab5cb8_2.Value()); 46 LOG_WARNING(HW_GPU, "FMUL tab5cb8_2({}) is not implemented",
47 UNIMPLEMENTED_IF_MSG( 47 instr.fmul.tab5cb8_2.Value());
48 instr.fmul.tab5c68_0 != 1, "FMUL tab5cb8_0({}) is not implemented", 48 }
49 instr.fmul.tab5c68_0.Value()); // SMO typical sends 1 here which seems to be the default 49 if (instr.fmul.tab5c68_0 != 1) {
50 LOG_WARNING(HW_GPU, "FMUL tab5cb8_0({}) is not implemented",
51 instr.fmul.tab5c68_0.Value());
52 }
50 53
51 op_b = GetOperandAbsNegFloat(op_b, false, instr.fmul.negate_b); 54 op_b = GetOperandAbsNegFloat(op_b, false, instr.fmul.negate_b);
52 55
diff --git a/src/video_core/shader/decode/arithmetic_half_immediate.cpp b/src/video_core/shader/decode/arithmetic_half_immediate.cpp
index 7bcf38f23..6466fc011 100644
--- a/src/video_core/shader/decode/arithmetic_half_immediate.cpp
+++ b/src/video_core/shader/decode/arithmetic_half_immediate.cpp
@@ -23,7 +23,9 @@ u32 ShaderIR::DecodeArithmeticHalfImmediate(NodeBlock& bb, u32 pc) {
23 LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName()); 23 LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
24 } 24 }
25 } else { 25 } else {
26 UNIMPLEMENTED_IF(instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None); 26 if (instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None) {
27 LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
28 }
27 } 29 }
28 30
29 Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half_imm.type_a); 31 Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half_imm.type_a);
diff --git a/src/video_core/shader/decode/ffma.cpp b/src/video_core/shader/decode/ffma.cpp
index 29be25ca3..ca2f39e8d 100644
--- a/src/video_core/shader/decode/ffma.cpp
+++ b/src/video_core/shader/decode/ffma.cpp
@@ -18,10 +18,12 @@ u32 ShaderIR::DecodeFfma(NodeBlock& bb, u32 pc) {
18 const auto opcode = OpCode::Decode(instr); 18 const auto opcode = OpCode::Decode(instr);
19 19
20 UNIMPLEMENTED_IF_MSG(instr.ffma.cc != 0, "FFMA cc not implemented"); 20 UNIMPLEMENTED_IF_MSG(instr.ffma.cc != 0, "FFMA cc not implemented");
21 UNIMPLEMENTED_IF_MSG(instr.ffma.tab5980_0 != 1, "FFMA tab5980_0({}) not implemented", 21 if (instr.ffma.tab5980_0 != 1) {
22 instr.ffma.tab5980_0.Value()); // Seems to be 1 by default based on SMO 22 LOG_WARNING(HW_GPU, "FFMA tab5980_0({}) not implemented", instr.ffma.tab5980_0.Value());
23 UNIMPLEMENTED_IF_MSG(instr.ffma.tab5980_1 != 0, "FFMA tab5980_1({}) not implemented", 23 }
24 instr.ffma.tab5980_1.Value()); 24 if (instr.ffma.tab5980_1 != 0) {
25 LOG_WARNING(HW_GPU, "FFMA tab5980_1({}) not implemented", instr.ffma.tab5980_1.Value());
26 }
25 27
26 const Node op_a = GetRegister(instr.gpr8); 28 const Node op_a = GetRegister(instr.gpr8);
27 29
diff --git a/src/video_core/shader/decode/half_set_predicate.cpp b/src/video_core/shader/decode/half_set_predicate.cpp
index ad180d6df..a82a6a15c 100644
--- a/src/video_core/shader/decode/half_set_predicate.cpp
+++ b/src/video_core/shader/decode/half_set_predicate.cpp
@@ -18,7 +18,7 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
18 const Instruction instr = {program_code[pc]}; 18 const Instruction instr = {program_code[pc]};
19 const auto opcode = OpCode::Decode(instr); 19 const auto opcode = OpCode::Decode(instr);
20 20
21 UNIMPLEMENTED_IF(instr.hsetp2.ftz != 0); 21 DEBUG_ASSERT(instr.hsetp2.ftz == 0);
22 22
23 Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a); 23 Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a);
24 op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a); 24 op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);
diff --git a/src/video_core/shader/decode/hfma2.cpp b/src/video_core/shader/decode/hfma2.cpp
index c3bcf1ae9..5b44cb79c 100644
--- a/src/video_core/shader/decode/hfma2.cpp
+++ b/src/video_core/shader/decode/hfma2.cpp
@@ -22,9 +22,9 @@ u32 ShaderIR::DecodeHfma2(NodeBlock& bb, u32 pc) {
22 const auto opcode = OpCode::Decode(instr); 22 const auto opcode = OpCode::Decode(instr);
23 23
24 if (opcode->get().GetId() == OpCode::Id::HFMA2_RR) { 24 if (opcode->get().GetId() == OpCode::Id::HFMA2_RR) {
25 UNIMPLEMENTED_IF(instr.hfma2.rr.precision != HalfPrecision::None); 25 DEBUG_ASSERT(instr.hfma2.rr.precision == HalfPrecision::None);
26 } else { 26 } else {
27 UNIMPLEMENTED_IF(instr.hfma2.precision != HalfPrecision::None); 27 DEBUG_ASSERT(instr.hfma2.precision == HalfPrecision::None);
28 } 28 }
29 29
30 constexpr auto identity = HalfType::H0_H1; 30 constexpr auto identity = HalfType::H0_H1;