diff options
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 36 |
1 files changed, 17 insertions, 19 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 5ee99e93a..c2973fb39 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -3672,7 +3672,7 @@ static int clz(unsigned int x) { | |||
| 3672 | return n; | 3672 | return n; |
| 3673 | } | 3673 | } |
| 3674 | 3674 | ||
| 3675 | unsigned InterpreterMainLoop(ARMul_State* state) { | 3675 | unsigned InterpreterMainLoop(ARMul_State* cpu) { |
| 3676 | Common::Profiling::ScopeTimer timer_execute(profile_execute); | 3676 | Common::Profiling::ScopeTimer timer_execute(profile_execute); |
| 3677 | 3677 | ||
| 3678 | #undef RM | 3678 | #undef RM |
| @@ -3930,8 +3930,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) { | |||
| 3930 | #define PC (cpu->Reg[15]) | 3930 | #define PC (cpu->Reg[15]) |
| 3931 | #define CHECK_EXT_INT if (!cpu->NirqSig && !(cpu->Cpsr & 0x80)) goto END; | 3931 | #define CHECK_EXT_INT if (!cpu->NirqSig && !(cpu->Cpsr & 0x80)) goto END; |
| 3932 | 3932 | ||
| 3933 | ARMul_State* cpu = state; | ||
| 3934 | |||
| 3935 | // GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback | 3933 | // GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback |
| 3936 | // to a clunky switch statement. | 3934 | // to a clunky switch statement. |
| 3937 | #if defined __GNUC__ || defined __clang__ | 3935 | #if defined __GNUC__ || defined __clang__ |
| @@ -6492,24 +6490,24 @@ unsigned InterpreterMainLoop(ARMul_State* state) { | |||
| 6492 | s16 sum4 = ((rn_val >> 24) & 0xFF) + ((rm_val >> 24) & 0xFF); | 6490 | s16 sum4 = ((rn_val >> 24) & 0xFF) + ((rm_val >> 24) & 0xFF); |
| 6493 | 6491 | ||
| 6494 | if (sum1 >= 0x100) | 6492 | if (sum1 >= 0x100) |
| 6495 | state->Cpsr |= (1 << 16); | 6493 | cpu->Cpsr |= (1 << 16); |
| 6496 | else | 6494 | else |
| 6497 | state->Cpsr &= ~(1 << 16); | 6495 | cpu->Cpsr &= ~(1 << 16); |
| 6498 | 6496 | ||
| 6499 | if (sum2 >= 0x100) | 6497 | if (sum2 >= 0x100) |
| 6500 | state->Cpsr |= (1 << 17); | 6498 | cpu->Cpsr |= (1 << 17); |
| 6501 | else | 6499 | else |
| 6502 | state->Cpsr &= ~(1 << 17); | 6500 | cpu->Cpsr &= ~(1 << 17); |
| 6503 | 6501 | ||
| 6504 | if (sum3 >= 0x100) | 6502 | if (sum3 >= 0x100) |
| 6505 | state->Cpsr |= (1 << 18); | 6503 | cpu->Cpsr |= (1 << 18); |
| 6506 | else | 6504 | else |
| 6507 | state->Cpsr &= ~(1 << 18); | 6505 | cpu->Cpsr &= ~(1 << 18); |
| 6508 | 6506 | ||
| 6509 | if (sum4 >= 0x100) | 6507 | if (sum4 >= 0x100) |
| 6510 | state->Cpsr |= (1 << 19); | 6508 | cpu->Cpsr |= (1 << 19); |
| 6511 | else | 6509 | else |
| 6512 | state->Cpsr &= ~(1 << 19); | 6510 | cpu->Cpsr &= ~(1 << 19); |
| 6513 | 6511 | ||
| 6514 | lo_result = ((sum1 & 0xFF) | (sum2 & 0xFF) << 8); | 6512 | lo_result = ((sum1 & 0xFF) | (sum2 & 0xFF) << 8); |
| 6515 | hi_result = ((sum3 & 0xFF) | (sum4 & 0xFF) << 8); | 6513 | hi_result = ((sum3 & 0xFF) | (sum4 & 0xFF) << 8); |
| @@ -6522,24 +6520,24 @@ unsigned InterpreterMainLoop(ARMul_State* state) { | |||
| 6522 | s16 diff4 = ((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF); | 6520 | s16 diff4 = ((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF); |
| 6523 | 6521 | ||
| 6524 | if (diff1 >= 0) | 6522 | if (diff1 >= 0) |
| 6525 | state->Cpsr |= (1 << 16); | 6523 | cpu->Cpsr |= (1 << 16); |
| 6526 | else | 6524 | else |
| 6527 | state->Cpsr &= ~(1 << 16); | 6525 | cpu->Cpsr &= ~(1 << 16); |
| 6528 | 6526 | ||
| 6529 | if (diff2 >= 0) | 6527 | if (diff2 >= 0) |
| 6530 | state->Cpsr |= (1 << 17); | 6528 | cpu->Cpsr |= (1 << 17); |
| 6531 | else | 6529 | else |
| 6532 | state->Cpsr &= ~(1 << 17); | 6530 | cpu->Cpsr &= ~(1 << 17); |
| 6533 | 6531 | ||
| 6534 | if (diff3 >= 0) | 6532 | if (diff3 >= 0) |
| 6535 | state->Cpsr |= (1 << 18); | 6533 | cpu->Cpsr |= (1 << 18); |
| 6536 | else | 6534 | else |
| 6537 | state->Cpsr &= ~(1 << 18); | 6535 | cpu->Cpsr &= ~(1 << 18); |
| 6538 | 6536 | ||
| 6539 | if (diff4 >= 0) | 6537 | if (diff4 >= 0) |
| 6540 | state->Cpsr |= (1 << 19); | 6538 | cpu->Cpsr |= (1 << 19); |
| 6541 | else | 6539 | else |
| 6542 | state->Cpsr &= ~(1 << 19); | 6540 | cpu->Cpsr &= ~(1 << 19); |
| 6543 | 6541 | ||
| 6544 | lo_result = (diff1 & 0xFF) | ((diff2 & 0xFF) << 8); | 6542 | lo_result = (diff1 & 0xFF) | ((diff2 & 0xFF) << 8); |
| 6545 | hi_result = (diff3 & 0xFF) | ((diff4 & 0xFF) << 8); | 6543 | hi_result = (diff3 & 0xFF) | ((diff4 & 0xFF) << 8); |