diff options
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 5752d116f..0d1b2e60e 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp | |||
| @@ -5669,11 +5669,8 @@ L_stm_s_takeabort: | |||
| 5669 | /* Attempt to emulate an ARMv6 instruction. | 5669 | /* Attempt to emulate an ARMv6 instruction. |
| 5670 | Returns non-zero upon success. */ | 5670 | Returns non-zero upon success. */ |
| 5671 | 5671 | ||
| 5672 | static int | 5672 | static int handle_v6_insn(ARMul_State* state, ARMword instr) { |
| 5673 | handle_v6_insn (ARMul_State * state, ARMword instr) { | 5673 | switch (BITS(20, 27)) { |
| 5674 | ARMword lhs, temp; | ||
| 5675 | |||
| 5676 | switch (BITS (20, 27)) { | ||
| 5677 | case 0x03: | 5674 | case 0x03: |
| 5678 | printf ("Unhandled v6 insn: ldr\n"); | 5675 | printf ("Unhandled v6 insn: ldr\n"); |
| 5679 | break; | 5676 | break; |
| @@ -5691,7 +5688,7 @@ L_stm_s_takeabort: | |||
| 5691 | /* strex */ | 5688 | /* strex */ |
| 5692 | u32 l = LHSReg; | 5689 | u32 l = LHSReg; |
| 5693 | u32 r = RHSReg; | 5690 | u32 r = RHSReg; |
| 5694 | lhs = LHS; | 5691 | u32 lhs = LHS; |
| 5695 | 5692 | ||
| 5696 | bool enter = false; | 5693 | bool enter = false; |
| 5697 | 5694 | ||
| @@ -5716,7 +5713,7 @@ L_stm_s_takeabort: | |||
| 5716 | case 0x19: | 5713 | case 0x19: |
| 5717 | /* ldrex */ | 5714 | /* ldrex */ |
| 5718 | if (BITS(4, 7) == 0x9) { | 5715 | if (BITS(4, 7) == 0x9) { |
| 5719 | lhs = LHS; | 5716 | u32 lhs = LHS; |
| 5720 | 5717 | ||
| 5721 | state->currentexaddr = lhs; | 5718 | state->currentexaddr = lhs; |
| 5722 | state->currentexval = ARMul_ReadWord(state, lhs); | 5719 | state->currentexval = ARMul_ReadWord(state, lhs); |
| @@ -5735,7 +5732,7 @@ L_stm_s_takeabort: | |||
| 5735 | case 0x1c: | 5732 | case 0x1c: |
| 5736 | if (BITS(4, 7) == 0x9) { | 5733 | if (BITS(4, 7) == 0x9) { |
| 5737 | /* strexb */ | 5734 | /* strexb */ |
| 5738 | lhs = LHS; | 5735 | u32 lhs = LHS; |
| 5739 | 5736 | ||
| 5740 | bool enter = false; | 5737 | bool enter = false; |
| 5741 | 5738 | ||
| @@ -5765,11 +5762,11 @@ L_stm_s_takeabort: | |||
| 5765 | case 0x1d: | 5762 | case 0x1d: |
| 5766 | if ((BITS(4, 7)) == 0x9) { | 5763 | if ((BITS(4, 7)) == 0x9) { |
| 5767 | /* ldrexb */ | 5764 | /* ldrexb */ |
| 5768 | temp = LHS; | 5765 | u32 lhs = LHS; |
| 5769 | LoadByte(state, instr, temp, LUNSIGNED); | 5766 | LoadByte(state, instr, lhs, LUNSIGNED); |
| 5770 | 5767 | ||
| 5771 | state->currentexaddr = temp; | 5768 | state->currentexaddr = lhs; |
| 5772 | state->currentexval = (u32)ARMul_ReadByte(state, temp); | 5769 | state->currentexval = (u32)ARMul_ReadByte(state, lhs); |
| 5773 | 5770 | ||
| 5774 | //state->Reg[BITS(12, 15)] = ARMul_LoadByte(state, state->Reg[BITS(16, 19)]); | 5771 | //state->Reg[BITS(12, 15)] = ARMul_LoadByte(state, state->Reg[BITS(16, 19)]); |
| 5775 | //printf("ldrexb\n"); | 5772 | //printf("ldrexb\n"); |