diff options
| -rw-r--r-- | src/video_core/engines/maxwell_3d.h | 22 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer.cpp | 10 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer_cache.cpp | 6 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer_cache.h | 9 | ||||
| -rw-r--r-- | src/video_core/textures/decoders.cpp | 2 |
5 files changed, 44 insertions, 5 deletions
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 988a6433e..cc1f90de6 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h | |||
| @@ -478,7 +478,9 @@ public: | |||
| 478 | 478 | ||
| 479 | u32 depth_write_enabled; | 479 | u32 depth_write_enabled; |
| 480 | 480 | ||
| 481 | INSERT_PADDING_WORDS(0x8); | 481 | INSERT_PADDING_WORDS(0x7); |
| 482 | |||
| 483 | u32 d3d_cull_mode; | ||
| 482 | 484 | ||
| 483 | BitField<0, 3, ComparisonOp> depth_test_func; | 485 | BitField<0, 3, ComparisonOp> depth_test_func; |
| 484 | 486 | ||
| @@ -498,7 +500,13 @@ public: | |||
| 498 | u32 enable[NumRenderTargets]; | 500 | u32 enable[NumRenderTargets]; |
| 499 | } blend; | 501 | } blend; |
| 500 | 502 | ||
| 501 | INSERT_PADDING_WORDS(0x2D); | 503 | INSERT_PADDING_WORDS(0xB); |
| 504 | |||
| 505 | union { | ||
| 506 | BitField<4, 1, u32> triangle_rast_flip; | ||
| 507 | } screen_y_control; | ||
| 508 | |||
| 509 | INSERT_PADDING_WORDS(0x21); | ||
| 502 | 510 | ||
| 503 | u32 vb_element_base; | 511 | u32 vb_element_base; |
| 504 | 512 | ||
| @@ -528,7 +536,12 @@ public: | |||
| 528 | } | 536 | } |
| 529 | } tic; | 537 | } tic; |
| 530 | 538 | ||
| 531 | INSERT_PADDING_WORDS(0x22); | 539 | INSERT_PADDING_WORDS(0x21); |
| 540 | |||
| 541 | union { | ||
| 542 | BitField<2, 1, u32> coord_origin; | ||
| 543 | BitField<3, 10, u32> enable; | ||
| 544 | } point_coord_replace; | ||
| 532 | 545 | ||
| 533 | struct { | 546 | struct { |
| 534 | u32 code_address_high; | 547 | u32 code_address_high; |
| @@ -818,11 +831,14 @@ ASSERT_REG_POSITION(rt_control, 0x487); | |||
| 818 | ASSERT_REG_POSITION(depth_test_enable, 0x4B3); | 831 | ASSERT_REG_POSITION(depth_test_enable, 0x4B3); |
| 819 | ASSERT_REG_POSITION(independent_blend_enable, 0x4B9); | 832 | ASSERT_REG_POSITION(independent_blend_enable, 0x4B9); |
| 820 | ASSERT_REG_POSITION(depth_write_enabled, 0x4BA); | 833 | ASSERT_REG_POSITION(depth_write_enabled, 0x4BA); |
| 834 | ASSERT_REG_POSITION(d3d_cull_mode, 0x4C2); | ||
| 821 | ASSERT_REG_POSITION(depth_test_func, 0x4C3); | 835 | ASSERT_REG_POSITION(depth_test_func, 0x4C3); |
| 822 | ASSERT_REG_POSITION(blend, 0x4CF); | 836 | ASSERT_REG_POSITION(blend, 0x4CF); |
| 837 | ASSERT_REG_POSITION(screen_y_control, 0x4EB); | ||
| 823 | ASSERT_REG_POSITION(vb_element_base, 0x50D); | 838 | ASSERT_REG_POSITION(vb_element_base, 0x50D); |
| 824 | ASSERT_REG_POSITION(tsc, 0x557); | 839 | ASSERT_REG_POSITION(tsc, 0x557); |
| 825 | ASSERT_REG_POSITION(tic, 0x55D); | 840 | ASSERT_REG_POSITION(tic, 0x55D); |
| 841 | ASSERT_REG_POSITION(point_coord_replace, 0x581); | ||
| 826 | ASSERT_REG_POSITION(code_address, 0x582); | 842 | ASSERT_REG_POSITION(code_address, 0x582); |
| 827 | ASSERT_REG_POSITION(draw, 0x585); | 843 | ASSERT_REG_POSITION(draw, 0x585); |
| 828 | ASSERT_REG_POSITION(index_array, 0x5F2); | 844 | ASSERT_REG_POSITION(index_array, 0x5F2); |
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp index e516eb1ad..3c3657d9d 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp | |||
| @@ -771,6 +771,16 @@ void RasterizerOpenGL::SyncCullMode() { | |||
| 771 | if (state.cull.enabled) { | 771 | if (state.cull.enabled) { |
| 772 | state.cull.front_face = MaxwellToGL::FrontFace(regs.cull.front_face); | 772 | state.cull.front_face = MaxwellToGL::FrontFace(regs.cull.front_face); |
| 773 | state.cull.mode = MaxwellToGL::CullFace(regs.cull.cull_face); | 773 | state.cull.mode = MaxwellToGL::CullFace(regs.cull.cull_face); |
| 774 | |||
| 775 | // If the GPU is configured to flip the rasterized triangles, then we need to flip the | ||
| 776 | // notion of front and back. Note: We flip the triangles when the value of the register is 0 | ||
| 777 | // because OpenGL already does it for us. | ||
| 778 | if (regs.screen_y_control.triangle_rast_flip == 0) { | ||
| 779 | if (state.cull.front_face == GL_CCW) | ||
| 780 | state.cull.front_face = GL_CW; | ||
| 781 | else if (state.cull.front_face == GL_CW) | ||
| 782 | state.cull.front_face = GL_CCW; | ||
| 783 | } | ||
| 774 | } | 784 | } |
| 775 | } | 785 | } |
| 776 | 786 | ||
diff --git a/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp b/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp index 50469c05c..57d7763ff 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp | |||
| @@ -108,7 +108,8 @@ static constexpr std::array<FormatTuple, SurfaceParams::MaxPixelFormat> tex_form | |||
| 108 | {GL_DEPTH24_STENCIL8, GL_DEPTH_STENCIL, GL_UNSIGNED_INT_24_8, ComponentType::UNorm, | 108 | {GL_DEPTH24_STENCIL8, GL_DEPTH_STENCIL, GL_UNSIGNED_INT_24_8, ComponentType::UNorm, |
| 109 | false}, // Z24S8 | 109 | false}, // Z24S8 |
| 110 | {GL_DEPTH24_STENCIL8, GL_DEPTH_STENCIL, GL_UNSIGNED_INT_24_8, ComponentType::UNorm, | 110 | {GL_DEPTH24_STENCIL8, GL_DEPTH_STENCIL, GL_UNSIGNED_INT_24_8, ComponentType::UNorm, |
| 111 | false}, // S8Z24 | 111 | false}, // S8Z24 |
| 112 | {GL_DEPTH_COMPONENT32F, GL_DEPTH_COMPONENT, GL_FLOAT, ComponentType::Float, false}, // Z32F | ||
| 112 | }}; | 113 | }}; |
| 113 | 114 | ||
| 114 | static const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType component_type) { | 115 | static const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType component_type) { |
| @@ -191,7 +192,7 @@ static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr), | |||
| 191 | MortonCopy<true, PixelFormat::DXT1>, MortonCopy<true, PixelFormat::DXT23>, | 192 | MortonCopy<true, PixelFormat::DXT1>, MortonCopy<true, PixelFormat::DXT23>, |
| 192 | MortonCopy<true, PixelFormat::DXT45>, MortonCopy<true, PixelFormat::DXN1>, | 193 | MortonCopy<true, PixelFormat::DXT45>, MortonCopy<true, PixelFormat::DXN1>, |
| 193 | MortonCopy<true, PixelFormat::ASTC_2D_4X4>, MortonCopy<true, PixelFormat::Z24S8>, | 194 | MortonCopy<true, PixelFormat::ASTC_2D_4X4>, MortonCopy<true, PixelFormat::Z24S8>, |
| 194 | MortonCopy<true, PixelFormat::S8Z24>, | 195 | MortonCopy<true, PixelFormat::S8Z24>, MortonCopy<true, PixelFormat::Z32F>, |
| 195 | }; | 196 | }; |
| 196 | 197 | ||
| 197 | static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr), | 198 | static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr), |
| @@ -213,6 +214,7 @@ static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr), | |||
| 213 | MortonCopy<false, PixelFormat::ABGR8>, | 214 | MortonCopy<false, PixelFormat::ABGR8>, |
| 214 | MortonCopy<false, PixelFormat::Z24S8>, | 215 | MortonCopy<false, PixelFormat::Z24S8>, |
| 215 | MortonCopy<false, PixelFormat::S8Z24>, | 216 | MortonCopy<false, PixelFormat::S8Z24>, |
| 217 | MortonCopy<false, PixelFormat::Z32F>, | ||
| 216 | }; | 218 | }; |
| 217 | 219 | ||
| 218 | // Allocate an uninitialized texture of appropriate size and format for the surface | 220 | // Allocate an uninitialized texture of appropriate size and format for the surface |
diff --git a/src/video_core/renderer_opengl/gl_rasterizer_cache.h b/src/video_core/renderer_opengl/gl_rasterizer_cache.h index 8005a81b8..b4d7f8ebe 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer_cache.h +++ b/src/video_core/renderer_opengl/gl_rasterizer_cache.h | |||
| @@ -42,6 +42,7 @@ struct SurfaceParams { | |||
| 42 | // DepthStencil formats | 42 | // DepthStencil formats |
| 43 | Z24S8 = 13, | 43 | Z24S8 = 13, |
| 44 | S8Z24 = 14, | 44 | S8Z24 = 14, |
| 45 | Z32F = 15, | ||
| 45 | 46 | ||
| 46 | MaxDepthStencilFormat, | 47 | MaxDepthStencilFormat, |
| 47 | 48 | ||
| @@ -94,6 +95,7 @@ struct SurfaceParams { | |||
| 94 | 4, // ASTC_2D_4X4 | 95 | 4, // ASTC_2D_4X4 |
| 95 | 1, // Z24S8 | 96 | 1, // Z24S8 |
| 96 | 1, // S8Z24 | 97 | 1, // S8Z24 |
| 98 | 1, // Z32F | ||
| 97 | }}; | 99 | }}; |
| 98 | 100 | ||
| 99 | ASSERT(static_cast<size_t>(format) < compression_factor_table.size()); | 101 | ASSERT(static_cast<size_t>(format) < compression_factor_table.size()); |
| @@ -120,6 +122,7 @@ struct SurfaceParams { | |||
| 120 | 32, // ASTC_2D_4X4 | 122 | 32, // ASTC_2D_4X4 |
| 121 | 32, // Z24S8 | 123 | 32, // Z24S8 |
| 122 | 32, // S8Z24 | 124 | 32, // S8Z24 |
| 125 | 32, // Z32F | ||
| 123 | }}; | 126 | }}; |
| 124 | 127 | ||
| 125 | ASSERT(static_cast<size_t>(format) < bpp_table.size()); | 128 | ASSERT(static_cast<size_t>(format) < bpp_table.size()); |
| @@ -135,6 +138,8 @@ struct SurfaceParams { | |||
| 135 | return PixelFormat::S8Z24; | 138 | return PixelFormat::S8Z24; |
| 136 | case Tegra::DepthFormat::Z24_S8_UNORM: | 139 | case Tegra::DepthFormat::Z24_S8_UNORM: |
| 137 | return PixelFormat::Z24S8; | 140 | return PixelFormat::Z24S8; |
| 141 | case Tegra::DepthFormat::Z32_FLOAT: | ||
| 142 | return PixelFormat::Z32F; | ||
| 138 | default: | 143 | default: |
| 139 | LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format)); | 144 | LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format)); |
| 140 | UNREACHABLE(); | 145 | UNREACHABLE(); |
| @@ -235,6 +240,8 @@ struct SurfaceParams { | |||
| 235 | return Tegra::DepthFormat::S8_Z24_UNORM; | 240 | return Tegra::DepthFormat::S8_Z24_UNORM; |
| 236 | case PixelFormat::Z24S8: | 241 | case PixelFormat::Z24S8: |
| 237 | return Tegra::DepthFormat::Z24_S8_UNORM; | 242 | return Tegra::DepthFormat::Z24_S8_UNORM; |
| 243 | case PixelFormat::Z32F: | ||
| 244 | return Tegra::DepthFormat::Z32_FLOAT; | ||
| 238 | default: | 245 | default: |
| 239 | UNREACHABLE(); | 246 | UNREACHABLE(); |
| 240 | } | 247 | } |
| @@ -284,6 +291,8 @@ struct SurfaceParams { | |||
| 284 | case Tegra::DepthFormat::S8_Z24_UNORM: | 291 | case Tegra::DepthFormat::S8_Z24_UNORM: |
| 285 | case Tegra::DepthFormat::Z24_S8_UNORM: | 292 | case Tegra::DepthFormat::Z24_S8_UNORM: |
| 286 | return ComponentType::UNorm; | 293 | return ComponentType::UNorm; |
| 294 | case Tegra::DepthFormat::Z32_FLOAT: | ||
| 295 | return ComponentType::Float; | ||
| 287 | default: | 296 | default: |
| 288 | LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format)); | 297 | LOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format)); |
| 289 | UNREACHABLE(); | 298 | UNREACHABLE(); |
diff --git a/src/video_core/textures/decoders.cpp b/src/video_core/textures/decoders.cpp index 7b06fea3e..d5ab4e4f9 100644 --- a/src/video_core/textures/decoders.cpp +++ b/src/video_core/textures/decoders.cpp | |||
| @@ -78,6 +78,7 @@ static u32 DepthBytesPerPixel(DepthFormat format) { | |||
| 78 | switch (format) { | 78 | switch (format) { |
| 79 | case DepthFormat::S8_Z24_UNORM: | 79 | case DepthFormat::S8_Z24_UNORM: |
| 80 | case DepthFormat::Z24_S8_UNORM: | 80 | case DepthFormat::Z24_S8_UNORM: |
| 81 | case DepthFormat::Z32_FLOAT: | ||
| 81 | return 4; | 82 | return 4; |
| 82 | default: | 83 | default: |
| 83 | UNIMPLEMENTED_MSG("Format not implemented"); | 84 | UNIMPLEMENTED_MSG("Format not implemented"); |
| @@ -132,6 +133,7 @@ std::vector<u8> UnswizzleDepthTexture(VAddr address, DepthFormat format, u32 wid | |||
| 132 | switch (format) { | 133 | switch (format) { |
| 133 | case DepthFormat::S8_Z24_UNORM: | 134 | case DepthFormat::S8_Z24_UNORM: |
| 134 | case DepthFormat::Z24_S8_UNORM: | 135 | case DepthFormat::Z24_S8_UNORM: |
| 136 | case DepthFormat::Z32_FLOAT: | ||
| 135 | CopySwizzledData(width, height, bytes_per_pixel, bytes_per_pixel, data, | 137 | CopySwizzledData(width, height, bytes_per_pixel, bytes_per_pixel, data, |
| 136 | unswizzled_data.data(), true, block_height); | 138 | unswizzled_data.data(), true, block_height); |
| 137 | break; | 139 | break; |