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-rw-r--r--src/core/arm/arm_interface.h10
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.cpp8
-rw-r--r--src/core/gdbstub/gdbstub.cpp2
3 files changed, 15 insertions, 5 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index 16d528994..59da33f30 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -22,10 +22,16 @@ public:
22 std::array<u64, 31> cpu_registers; 22 std::array<u64, 31> cpu_registers;
23 u64 sp; 23 u64 sp;
24 u64 pc; 24 u64 pc;
25 u64 pstate; 25 u32 pstate;
26 std::array<u8, 4> padding;
26 std::array<u128, 32> vector_registers; 27 std::array<u128, 32> vector_registers;
27 u64 fpcr; 28 u32 fpcr;
29 u32 fpsr;
30 u64 tpidr;
28 }; 31 };
32 // Internally within the kernel, it expects the AArch64 version of the
33 // thread context to be 800 bytes in size.
34 static_assert(sizeof(ThreadContext) == 0x320);
29 35
30 /// Runs the CPU until an event happens 36 /// Runs the CPU until an event happens
31 virtual void Run() = 0; 37 virtual void Run() = 0;
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp
index 8cad070b4..9ea87cdbe 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic.cpp
@@ -247,15 +247,19 @@ void ARM_Dynarmic::SaveContext(ThreadContext& ctx) {
247 ctx.pstate = jit->GetPstate(); 247 ctx.pstate = jit->GetPstate();
248 ctx.vector_registers = jit->GetVectors(); 248 ctx.vector_registers = jit->GetVectors();
249 ctx.fpcr = jit->GetFpcr(); 249 ctx.fpcr = jit->GetFpcr();
250 ctx.fpsr = jit->GetFpsr();
251 ctx.tpidr = cb->tpidr_el0;
250} 252}
251 253
252void ARM_Dynarmic::LoadContext(const ThreadContext& ctx) { 254void ARM_Dynarmic::LoadContext(const ThreadContext& ctx) {
253 jit->SetRegisters(ctx.cpu_registers); 255 jit->SetRegisters(ctx.cpu_registers);
254 jit->SetSP(ctx.sp); 256 jit->SetSP(ctx.sp);
255 jit->SetPC(ctx.pc); 257 jit->SetPC(ctx.pc);
256 jit->SetPstate(static_cast<u32>(ctx.pstate)); 258 jit->SetPstate(ctx.pstate);
257 jit->SetVectors(ctx.vector_registers); 259 jit->SetVectors(ctx.vector_registers);
258 jit->SetFpcr(static_cast<u32>(ctx.fpcr)); 260 jit->SetFpcr(ctx.fpcr);
261 jit->SetFpsr(ctx.fpsr);
262 SetTPIDR_EL0(ctx.tpidr);
259} 263}
260 264
261void ARM_Dynarmic::PrepareReschedule() { 265void ARM_Dynarmic::PrepareReschedule() {
diff --git a/src/core/gdbstub/gdbstub.cpp b/src/core/gdbstub/gdbstub.cpp
index d8c7b3492..ae88440c2 100644
--- a/src/core/gdbstub/gdbstub.cpp
+++ b/src/core/gdbstub/gdbstub.cpp
@@ -250,7 +250,7 @@ static void RegWrite(std::size_t id, u64 val, Kernel::Thread* thread = nullptr)
250 } else if (id == PC_REGISTER) { 250 } else if (id == PC_REGISTER) {
251 thread->context.pc = val; 251 thread->context.pc = val;
252 } else if (id == PSTATE_REGISTER) { 252 } else if (id == PSTATE_REGISTER) {
253 thread->context.pstate = val; 253 thread->context.pstate = static_cast<u32>(val);
254 } else if (id > PSTATE_REGISTER && id < FPCR_REGISTER) { 254 } else if (id > PSTATE_REGISTER && id < FPCR_REGISTER) {
255 thread->context.vector_registers[id - (PSTATE_REGISTER + 1)][0] = val; 255 thread->context.vector_registers[id - (PSTATE_REGISTER + 1)][0] = val;
256 } 256 }