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m---------externals/sirit0
-rw-r--r--src/core/hle/service/caps/caps_su.cpp3
-rw-r--r--src/core/hle/service/nim/nim.cpp70
-rw-r--r--src/core/hle/service/ptm/psm.cpp21
-rw-r--r--src/video_core/engines/maxwell_3d.h1
-rw-r--r--src/video_core/engines/shader_bytecode.h4
-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer.cpp55
-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer.h3
-rw-r--r--src/video_core/renderer_opengl/gl_shader_decompiler.cpp10
-rw-r--r--src/video_core/renderer_vulkan/fixed_pipeline_state.cpp2
-rw-r--r--src/video_core/renderer_vulkan/fixed_pipeline_state.h2
-rw-r--r--src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp2
-rw-r--r--src/video_core/renderer_vulkan/vk_rasterizer.cpp4
-rw-r--r--src/video_core/renderer_vulkan/vk_shader_decompiler.cpp11
-rw-r--r--src/video_core/shader/decode/arithmetic_integer.cpp31
-rw-r--r--src/video_core/shader/decode/register_set_predicate.cpp52
-rw-r--r--src/video_core/shader/node.h2
-rw-r--r--src/video_core/shader/track.cpp20
-rw-r--r--src/video_core/texture_cache/texture_cache.h66
19 files changed, 261 insertions, 98 deletions
diff --git a/externals/sirit b/externals/sirit
Subproject a712959f1e373a33b48042b5934e288a243d595 Subproject 414fc4dbd28d8fe48f735a0c389db8a234f733c
diff --git a/src/core/hle/service/caps/caps_su.cpp b/src/core/hle/service/caps/caps_su.cpp
index 2b4c2d808..b4d9355ef 100644
--- a/src/core/hle/service/caps/caps_su.cpp
+++ b/src/core/hle/service/caps/caps_su.cpp
@@ -9,8 +9,11 @@ namespace Service::Capture {
9CAPS_SU::CAPS_SU() : ServiceFramework("caps:su") { 9CAPS_SU::CAPS_SU() : ServiceFramework("caps:su") {
10 // clang-format off 10 // clang-format off
11 static const FunctionInfo functions[] = { 11 static const FunctionInfo functions[] = {
12 {32, nullptr, "SetShimLibraryVersion"},
12 {201, nullptr, "SaveScreenShot"}, 13 {201, nullptr, "SaveScreenShot"},
13 {203, nullptr, "SaveScreenShotEx0"}, 14 {203, nullptr, "SaveScreenShotEx0"},
15 {205, nullptr, "SaveScreenShotEx1"},
16 {210, nullptr, "SaveScreenShotEx2"},
14 }; 17 };
15 // clang-format on 18 // clang-format on
16 19
diff --git a/src/core/hle/service/nim/nim.cpp b/src/core/hle/service/nim/nim.cpp
index e85f123e2..f19affce7 100644
--- a/src/core/hle/service/nim/nim.cpp
+++ b/src/core/hle/service/nim/nim.cpp
@@ -15,6 +15,66 @@
15 15
16namespace Service::NIM { 16namespace Service::NIM {
17 17
18class IShopServiceAsync final : public ServiceFramework<IShopServiceAsync> {
19public:
20 IShopServiceAsync() : ServiceFramework("IShopServiceAsync") {
21 // clang-format off
22 static const FunctionInfo functions[] = {
23 {0, nullptr, "Cancel"},
24 {1, nullptr, "GetSize"},
25 {2, nullptr, "Read"},
26 {3, nullptr, "GetErrorCode"},
27 {4, nullptr, "Request"},
28 {5, nullptr, "Prepare"},
29 };
30 // clang-format on
31
32 RegisterHandlers(functions);
33 }
34};
35
36class IShopServiceAccessor final : public ServiceFramework<IShopServiceAccessor> {
37public:
38 IShopServiceAccessor() : ServiceFramework("IShopServiceAccessor") {
39 // clang-format off
40 static const FunctionInfo functions[] = {
41 {0, &IShopServiceAccessor::CreateAsyncInterface, "CreateAsyncInterface"},
42 };
43 // clang-format on
44
45 RegisterHandlers(functions);
46 }
47
48private:
49 void CreateAsyncInterface(Kernel::HLERequestContext& ctx) {
50 LOG_WARNING(Service_NIM, "(STUBBED) called");
51 IPC::ResponseBuilder rb{ctx, 2, 0, 1};
52 rb.Push(RESULT_SUCCESS);
53 rb.PushIpcInterface<IShopServiceAsync>();
54 }
55};
56
57class IShopServiceAccessServer final : public ServiceFramework<IShopServiceAccessServer> {
58public:
59 IShopServiceAccessServer() : ServiceFramework("IShopServiceAccessServer") {
60 // clang-format off
61 static const FunctionInfo functions[] = {
62 {0, &IShopServiceAccessServer::CreateAccessorInterface, "CreateAccessorInterface"},
63 };
64 // clang-format on
65
66 RegisterHandlers(functions);
67 }
68
69private:
70 void CreateAccessorInterface(Kernel::HLERequestContext& ctx) {
71 LOG_WARNING(Service_NIM, "(STUBBED) called");
72 IPC::ResponseBuilder rb{ctx, 2, 0, 1};
73 rb.Push(RESULT_SUCCESS);
74 rb.PushIpcInterface<IShopServiceAccessor>();
75 }
76};
77
18class NIM final : public ServiceFramework<NIM> { 78class NIM final : public ServiceFramework<NIM> {
19public: 79public:
20 explicit NIM() : ServiceFramework{"nim"} { 80 explicit NIM() : ServiceFramework{"nim"} {
@@ -78,7 +138,7 @@ public:
78 explicit NIM_ECA() : ServiceFramework{"nim:eca"} { 138 explicit NIM_ECA() : ServiceFramework{"nim:eca"} {
79 // clang-format off 139 // clang-format off
80 static const FunctionInfo functions[] = { 140 static const FunctionInfo functions[] = {
81 {0, nullptr, "CreateServerInterface"}, 141 {0, &NIM_ECA::CreateServerInterface, "CreateServerInterface"},
82 {1, nullptr, "RefreshDebugAvailability"}, 142 {1, nullptr, "RefreshDebugAvailability"},
83 {2, nullptr, "ClearDebugResponse"}, 143 {2, nullptr, "ClearDebugResponse"},
84 {3, nullptr, "RegisterDebugResponse"}, 144 {3, nullptr, "RegisterDebugResponse"},
@@ -87,6 +147,14 @@ public:
87 147
88 RegisterHandlers(functions); 148 RegisterHandlers(functions);
89 } 149 }
150
151private:
152 void CreateServerInterface(Kernel::HLERequestContext& ctx) {
153 LOG_WARNING(Service_NIM, "(STUBBED) called");
154 IPC::ResponseBuilder rb{ctx, 2, 0, 1};
155 rb.Push(RESULT_SUCCESS);
156 rb.PushIpcInterface<IShopServiceAccessServer>();
157 }
90}; 158};
91 159
92class NIM_SHP final : public ServiceFramework<NIM_SHP> { 160class NIM_SHP final : public ServiceFramework<NIM_SHP> {
diff --git a/src/core/hle/service/ptm/psm.cpp b/src/core/hle/service/ptm/psm.cpp
index c2d5fda94..12d154ecf 100644
--- a/src/core/hle/service/ptm/psm.cpp
+++ b/src/core/hle/service/ptm/psm.cpp
@@ -12,9 +12,6 @@
12 12
13namespace Service::PSM { 13namespace Service::PSM {
14 14
15constexpr u32 BATTERY_FULLY_CHARGED = 100; // 100% Full
16constexpr u32 BATTERY_CURRENTLY_CHARGING = 1; // Plugged into an official dock
17
18class PSM final : public ServiceFramework<PSM> { 15class PSM final : public ServiceFramework<PSM> {
19public: 16public:
20 explicit PSM() : ServiceFramework{"psm"} { 17 explicit PSM() : ServiceFramework{"psm"} {
@@ -48,20 +45,30 @@ public:
48 45
49private: 46private:
50 void GetBatteryChargePercentage(Kernel::HLERequestContext& ctx) { 47 void GetBatteryChargePercentage(Kernel::HLERequestContext& ctx) {
51 LOG_WARNING(Service_PSM, "(STUBBED) called"); 48 LOG_DEBUG(Service_PSM, "called");
52 49
53 IPC::ResponseBuilder rb{ctx, 3}; 50 IPC::ResponseBuilder rb{ctx, 3};
54 rb.Push(RESULT_SUCCESS); 51 rb.Push(RESULT_SUCCESS);
55 rb.Push<u32>(BATTERY_FULLY_CHARGED); 52 rb.Push<u32>(battery_charge_percentage);
56 } 53 }
57 54
58 void GetChargerType(Kernel::HLERequestContext& ctx) { 55 void GetChargerType(Kernel::HLERequestContext& ctx) {
59 LOG_WARNING(Service_PSM, "(STUBBED) called"); 56 LOG_DEBUG(Service_PSM, "called");
60 57
61 IPC::ResponseBuilder rb{ctx, 3}; 58 IPC::ResponseBuilder rb{ctx, 3};
62 rb.Push(RESULT_SUCCESS); 59 rb.Push(RESULT_SUCCESS);
63 rb.Push<u32>(BATTERY_CURRENTLY_CHARGING); 60 rb.PushEnum(charger_type);
64 } 61 }
62
63 enum class ChargerType : u32 {
64 Unplugged = 0,
65 RegularCharger = 1,
66 LowPowerCharger = 2,
67 Unknown = 3,
68 };
69
70 u32 battery_charge_percentage{100}; // 100%
71 ChargerType charger_type{ChargerType::RegularCharger};
65}; 72};
66 73
67void InstallInterfaces(SM::ServiceManager& sm) { 74void InstallInterfaces(SM::ServiceManager& sm) {
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 3dfba8197..5e522e0d2 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -1179,6 +1179,7 @@ public:
1179 BitField<0, 1, u32> depth_range_0_1; 1179 BitField<0, 1, u32> depth_range_0_1;
1180 BitField<3, 1, u32> depth_clamp_near; 1180 BitField<3, 1, u32> depth_clamp_near;
1181 BitField<4, 1, u32> depth_clamp_far; 1181 BitField<4, 1, u32> depth_clamp_far;
1182 BitField<11, 1, u32> depth_clamp_disabled;
1182 } view_volume_clip_control; 1183 } view_volume_clip_control;
1183 1184
1184 INSERT_UNION_PADDING_WORDS(0x1F); 1185 INSERT_UNION_PADDING_WORDS(0x1F);
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index cde3a26b9..8dae754d4 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -814,6 +814,10 @@ union Instruction {
814 } alu_integer; 814 } alu_integer;
815 815
816 union { 816 union {
817 BitField<43, 1, u64> x;
818 } iadd;
819
820 union {
817 BitField<39, 1, u64> ftz; 821 BitField<39, 1, u64> ftz;
818 BitField<32, 1, u64> saturate; 822 BitField<32, 1, u64> saturate;
819 BitField<49, 2, HalfMerge> merge; 823 BitField<49, 2, HalfMerge> merge;
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp
index 6fe155bcc..f33c4a8f9 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer.cpp
+++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp
@@ -348,7 +348,7 @@ void RasterizerOpenGL::ConfigureFramebuffers() {
348 348
349 texture_cache.GuardRenderTargets(true); 349 texture_cache.GuardRenderTargets(true);
350 350
351 View depth_surface = texture_cache.GetDepthBufferSurface(); 351 View depth_surface = texture_cache.GetDepthBufferSurface(true);
352 352
353 const auto& regs = gpu.regs; 353 const auto& regs = gpu.regs;
354 UNIMPLEMENTED_IF(regs.rt_separate_frag_data == 0); 354 UNIMPLEMENTED_IF(regs.rt_separate_frag_data == 0);
@@ -357,7 +357,7 @@ void RasterizerOpenGL::ConfigureFramebuffers() {
357 FramebufferCacheKey key; 357 FramebufferCacheKey key;
358 const auto colors_count = static_cast<std::size_t>(regs.rt_control.count); 358 const auto colors_count = static_cast<std::size_t>(regs.rt_control.count);
359 for (std::size_t index = 0; index < colors_count; ++index) { 359 for (std::size_t index = 0; index < colors_count; ++index) {
360 View color_surface{texture_cache.GetColorBufferSurface(index)}; 360 View color_surface{texture_cache.GetColorBufferSurface(index, true)};
361 if (!color_surface) { 361 if (!color_surface) {
362 continue; 362 continue;
363 } 363 }
@@ -381,28 +381,52 @@ void RasterizerOpenGL::ConfigureFramebuffers() {
381 glBindFramebuffer(GL_DRAW_FRAMEBUFFER, framebuffer_cache.GetFramebuffer(key)); 381 glBindFramebuffer(GL_DRAW_FRAMEBUFFER, framebuffer_cache.GetFramebuffer(key));
382} 382}
383 383
384void RasterizerOpenGL::ConfigureClearFramebuffer(bool using_color_fb, bool using_depth_fb, 384void RasterizerOpenGL::ConfigureClearFramebuffer(bool using_color, bool using_depth_stencil) {
385 bool using_stencil_fb) {
386 auto& gpu = system.GPU().Maxwell3D(); 385 auto& gpu = system.GPU().Maxwell3D();
387 const auto& regs = gpu.regs; 386 const auto& regs = gpu.regs;
388 387
389 texture_cache.GuardRenderTargets(true); 388 texture_cache.GuardRenderTargets(true);
390 View color_surface; 389 View color_surface;
391 if (using_color_fb) { 390
391 if (using_color) {
392 // Determine if we have to preserve the contents.
393 // First we have to make sure all clear masks are enabled.
394 bool preserve_contents = !regs.clear_buffers.R || !regs.clear_buffers.G ||
395 !regs.clear_buffers.B || !regs.clear_buffers.A;
392 const std::size_t index = regs.clear_buffers.RT; 396 const std::size_t index = regs.clear_buffers.RT;
393 color_surface = texture_cache.GetColorBufferSurface(index); 397 if (regs.clear_flags.scissor) {
398 // Then we have to confirm scissor testing clears the whole image.
399 const auto& scissor = regs.scissor_test[0];
400 preserve_contents |= scissor.min_x > 0;
401 preserve_contents |= scissor.min_y > 0;
402 preserve_contents |= scissor.max_x < regs.rt[index].width;
403 preserve_contents |= scissor.max_y < regs.rt[index].height;
404 }
405
406 color_surface = texture_cache.GetColorBufferSurface(index, preserve_contents);
394 texture_cache.MarkColorBufferInUse(index); 407 texture_cache.MarkColorBufferInUse(index);
395 } 408 }
409
396 View depth_surface; 410 View depth_surface;
397 if (using_depth_fb || using_stencil_fb) { 411 if (using_depth_stencil) {
398 depth_surface = texture_cache.GetDepthBufferSurface(); 412 bool preserve_contents = false;
413 if (regs.clear_flags.scissor) {
414 // For depth stencil clears we only have to confirm scissor test covers the whole image.
415 const auto& scissor = regs.scissor_test[0];
416 preserve_contents |= scissor.min_x > 0;
417 preserve_contents |= scissor.min_y > 0;
418 preserve_contents |= scissor.max_x < regs.zeta_width;
419 preserve_contents |= scissor.max_y < regs.zeta_height;
420 }
421
422 depth_surface = texture_cache.GetDepthBufferSurface(preserve_contents);
399 texture_cache.MarkDepthBufferInUse(); 423 texture_cache.MarkDepthBufferInUse();
400 } 424 }
401 texture_cache.GuardRenderTargets(false); 425 texture_cache.GuardRenderTargets(false);
402 426
403 FramebufferCacheKey key; 427 FramebufferCacheKey key;
404 key.colors[0] = color_surface; 428 key.colors[0] = std::move(color_surface);
405 key.zeta = depth_surface; 429 key.zeta = std::move(depth_surface);
406 430
407 state_tracker.NotifyFramebuffer(); 431 state_tracker.NotifyFramebuffer();
408 glBindFramebuffer(GL_DRAW_FRAMEBUFFER, framebuffer_cache.GetFramebuffer(key)); 432 glBindFramebuffer(GL_DRAW_FRAMEBUFFER, framebuffer_cache.GetFramebuffer(key));
@@ -422,8 +446,7 @@ void RasterizerOpenGL::Clear() {
422 if (regs.clear_buffers.R || regs.clear_buffers.G || regs.clear_buffers.B || 446 if (regs.clear_buffers.R || regs.clear_buffers.G || regs.clear_buffers.B ||
423 regs.clear_buffers.A) { 447 regs.clear_buffers.A) {
424 use_color = true; 448 use_color = true;
425 } 449
426 if (use_color) {
427 state_tracker.NotifyColorMask0(); 450 state_tracker.NotifyColorMask0();
428 glColorMaski(0, regs.clear_buffers.R != 0, regs.clear_buffers.G != 0, 451 glColorMaski(0, regs.clear_buffers.R != 0, regs.clear_buffers.G != 0,
429 regs.clear_buffers.B != 0, regs.clear_buffers.A != 0); 452 regs.clear_buffers.B != 0, regs.clear_buffers.A != 0);
@@ -461,7 +484,7 @@ void RasterizerOpenGL::Clear() {
461 484
462 UNIMPLEMENTED_IF(regs.clear_flags.viewport); 485 UNIMPLEMENTED_IF(regs.clear_flags.viewport);
463 486
464 ConfigureClearFramebuffer(use_color, use_depth, use_stencil); 487 ConfigureClearFramebuffer(use_color, use_depth || use_stencil);
465 488
466 if (use_color) { 489 if (use_color) {
467 glClearBufferfv(GL_COLOR, 0, regs.clear_color); 490 glClearBufferfv(GL_COLOR, 0, regs.clear_color);
@@ -999,11 +1022,7 @@ void RasterizerOpenGL::SyncDepthClamp() {
999 } 1022 }
1000 flags[Dirty::DepthClampEnabled] = false; 1023 flags[Dirty::DepthClampEnabled] = false;
1001 1024
1002 const auto& state = gpu.regs.view_volume_clip_control; 1025 oglEnable(GL_DEPTH_CLAMP, gpu.regs.view_volume_clip_control.depth_clamp_disabled == 0);
1003 UNIMPLEMENTED_IF_MSG(state.depth_clamp_far != state.depth_clamp_near,
1004 "Unimplemented depth clamp separation!");
1005
1006 oglEnable(GL_DEPTH_CLAMP, state.depth_clamp_far || state.depth_clamp_near);
1007} 1026}
1008 1027
1009void RasterizerOpenGL::SyncClipEnabled(u32 clip_mask) { 1028void RasterizerOpenGL::SyncClipEnabled(u32 clip_mask) {
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.h b/src/video_core/renderer_opengl/gl_rasterizer.h
index ebd2173eb..87249fb6f 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer.h
+++ b/src/video_core/renderer_opengl/gl_rasterizer.h
@@ -95,7 +95,8 @@ private:
95 /// Configures the color and depth framebuffer states. 95 /// Configures the color and depth framebuffer states.
96 void ConfigureFramebuffers(); 96 void ConfigureFramebuffers();
97 97
98 void ConfigureClearFramebuffer(bool using_color_fb, bool using_depth_fb, bool using_stencil_fb); 98 /// Configures the color and depth framebuffer for clearing.
99 void ConfigureClearFramebuffer(bool using_color, bool using_depth_stencil);
99 100
100 /// Configures the current constbuffers to use for the draw command. 101 /// Configures the current constbuffers to use for the draw command.
101 void SetupDrawConstBuffers(std::size_t stage_index, const Shader& shader); 102 void SetupDrawConstBuffers(std::size_t stage_index, const Shader& shader);
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
index 0cd3ad7e1..3803a6f3a 100644
--- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
@@ -1870,6 +1870,14 @@ private:
1870 return GenerateBinaryInfix(operation, ">=", Type::Bool, type, type); 1870 return GenerateBinaryInfix(operation, ">=", Type::Bool, type, type);
1871 } 1871 }
1872 1872
1873 Expression LogicalAddCarry(Operation operation) {
1874 const std::string carry = code.GenerateTemporary();
1875 code.AddLine("uint {};", carry);
1876 code.AddLine("uaddCarry({}, {}, {});", VisitOperand(operation, 0).AsUint(),
1877 VisitOperand(operation, 1).AsUint(), carry);
1878 return {fmt::format("({} != 0)", carry), Type::Bool};
1879 }
1880
1873 Expression LogicalFIsNan(Operation operation) { 1881 Expression LogicalFIsNan(Operation operation) {
1874 return GenerateUnary(operation, "isnan", Type::Bool, Type::Float); 1882 return GenerateUnary(operation, "isnan", Type::Bool, Type::Float);
1875 } 1883 }
@@ -2441,6 +2449,8 @@ private:
2441 &GLSLDecompiler::LogicalNotEqual<Type::Uint>, 2449 &GLSLDecompiler::LogicalNotEqual<Type::Uint>,
2442 &GLSLDecompiler::LogicalGreaterEqual<Type::Uint>, 2450 &GLSLDecompiler::LogicalGreaterEqual<Type::Uint>,
2443 2451
2452 &GLSLDecompiler::LogicalAddCarry,
2453
2444 &GLSLDecompiler::Logical2HLessThan<false>, 2454 &GLSLDecompiler::Logical2HLessThan<false>,
2445 &GLSLDecompiler::Logical2HEqual<false>, 2455 &GLSLDecompiler::Logical2HEqual<false>,
2446 &GLSLDecompiler::Logical2HLessEqual<false>, 2456 &GLSLDecompiler::Logical2HLessEqual<false>,
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
index a7f256ff9..648b1e71b 100644
--- a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
+++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
@@ -81,7 +81,7 @@ void FixedPipelineState::Rasterizer::Fill(const Maxwell& regs) noexcept {
81 primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0); 81 primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0);
82 cull_enable.Assign(regs.cull_test_enabled != 0 ? 1 : 0); 82 cull_enable.Assign(regs.cull_test_enabled != 0 ? 1 : 0);
83 depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0); 83 depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0);
84 depth_clamp_enable.Assign(clip.depth_clamp_near == 1 || clip.depth_clamp_far == 1 ? 1 : 0); 84 depth_clamp_disabled.Assign(regs.view_volume_clip_control.depth_clamp_disabled.Value());
85 ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0); 85 ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0);
86 cull_face.Assign(PackCullFace(regs.cull_face)); 86 cull_face.Assign(PackCullFace(regs.cull_face));
87 front_face.Assign(packed_front_face); 87 front_face.Assign(packed_front_face);
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.h b/src/video_core/renderer_vulkan/fixed_pipeline_state.h
index 77188b862..8652067a7 100644
--- a/src/video_core/renderer_vulkan/fixed_pipeline_state.h
+++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.h
@@ -153,7 +153,7 @@ struct FixedPipelineState {
153 BitField<4, 1, u32> primitive_restart_enable; 153 BitField<4, 1, u32> primitive_restart_enable;
154 BitField<5, 1, u32> cull_enable; 154 BitField<5, 1, u32> cull_enable;
155 BitField<6, 1, u32> depth_bias_enable; 155 BitField<6, 1, u32> depth_bias_enable;
156 BitField<7, 1, u32> depth_clamp_enable; 156 BitField<7, 1, u32> depth_clamp_disabled;
157 BitField<8, 1, u32> ndc_minus_one_to_one; 157 BitField<8, 1, u32> ndc_minus_one_to_one;
158 BitField<9, 2, u32> cull_face; 158 BitField<9, 2, u32> cull_face;
159 BitField<11, 1, u32> front_face; 159 BitField<11, 1, u32> front_face;
diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
index 45bd1fc6c..852a17a70 100644
--- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
+++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
@@ -249,7 +249,7 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
249 rasterization_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO; 249 rasterization_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO;
250 rasterization_ci.pNext = nullptr; 250 rasterization_ci.pNext = nullptr;
251 rasterization_ci.flags = 0; 251 rasterization_ci.flags = 0;
252 rasterization_ci.depthClampEnable = rs.depth_clamp_enable; 252 rasterization_ci.depthClampEnable = rs.depth_clamp_disabled == 0 ? VK_TRUE : VK_FALSE;
253 rasterization_ci.rasterizerDiscardEnable = VK_FALSE; 253 rasterization_ci.rasterizerDiscardEnable = VK_FALSE;
254 rasterization_ci.polygonMode = VK_POLYGON_MODE_FILL; 254 rasterization_ci.polygonMode = VK_POLYGON_MODE_FILL;
255 rasterization_ci.cullMode = 255 rasterization_ci.cullMode =
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
index c821b1229..776053de5 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -656,7 +656,7 @@ RasterizerVulkan::Texceptions RasterizerVulkan::UpdateAttachments() {
656 Texceptions texceptions; 656 Texceptions texceptions;
657 for (std::size_t rt = 0; rt < Maxwell::NumRenderTargets; ++rt) { 657 for (std::size_t rt = 0; rt < Maxwell::NumRenderTargets; ++rt) {
658 if (update_rendertargets) { 658 if (update_rendertargets) {
659 color_attachments[rt] = texture_cache.GetColorBufferSurface(rt); 659 color_attachments[rt] = texture_cache.GetColorBufferSurface(rt, true);
660 } 660 }
661 if (color_attachments[rt] && WalkAttachmentOverlaps(*color_attachments[rt])) { 661 if (color_attachments[rt] && WalkAttachmentOverlaps(*color_attachments[rt])) {
662 texceptions[rt] = true; 662 texceptions[rt] = true;
@@ -664,7 +664,7 @@ RasterizerVulkan::Texceptions RasterizerVulkan::UpdateAttachments() {
664 } 664 }
665 665
666 if (update_rendertargets) { 666 if (update_rendertargets) {
667 zeta_attachment = texture_cache.GetDepthBufferSurface(); 667 zeta_attachment = texture_cache.GetDepthBufferSurface(true);
668 } 668 }
669 if (zeta_attachment && WalkAttachmentOverlaps(*zeta_attachment)) { 669 if (zeta_attachment && WalkAttachmentOverlaps(*zeta_attachment)) {
670 texceptions[ZETA_TEXCEPTION_INDEX] = true; 670 texceptions[ZETA_TEXCEPTION_INDEX] = true;
diff --git a/src/video_core/renderer_vulkan/vk_shader_decompiler.cpp b/src/video_core/renderer_vulkan/vk_shader_decompiler.cpp
index aaa138f52..20b6ca0ad 100644
--- a/src/video_core/renderer_vulkan/vk_shader_decompiler.cpp
+++ b/src/video_core/renderer_vulkan/vk_shader_decompiler.cpp
@@ -1584,6 +1584,15 @@ private:
1584 return {OpCompositeConstruct(t_half, low, high), Type::HalfFloat}; 1584 return {OpCompositeConstruct(t_half, low, high), Type::HalfFloat};
1585 } 1585 }
1586 1586
1587 Expression LogicalAddCarry(Operation operation) {
1588 const Id op_a = AsUint(Visit(operation[0]));
1589 const Id op_b = AsUint(Visit(operation[1]));
1590
1591 const Id result = OpIAddCarry(TypeStruct({t_uint, t_uint}), op_a, op_b);
1592 const Id carry = OpCompositeExtract(t_uint, result, 1);
1593 return {OpINotEqual(t_bool, carry, Constant(t_uint, 0)), Type::Bool};
1594 }
1595
1587 Expression LogicalAssign(Operation operation) { 1596 Expression LogicalAssign(Operation operation) {
1588 const Node& dest = operation[0]; 1597 const Node& dest = operation[0];
1589 const Node& src = operation[1]; 1598 const Node& src = operation[1];
@@ -2518,6 +2527,8 @@ private:
2518 &SPIRVDecompiler::Binary<&Module::OpINotEqual, Type::Bool, Type::Uint>, 2527 &SPIRVDecompiler::Binary<&Module::OpINotEqual, Type::Bool, Type::Uint>,
2519 &SPIRVDecompiler::Binary<&Module::OpUGreaterThanEqual, Type::Bool, Type::Uint>, 2528 &SPIRVDecompiler::Binary<&Module::OpUGreaterThanEqual, Type::Bool, Type::Uint>,
2520 2529
2530 &SPIRVDecompiler::LogicalAddCarry,
2531
2521 &SPIRVDecompiler::Binary<&Module::OpFOrdLessThan, Type::Bool2, Type::HalfFloat>, 2532 &SPIRVDecompiler::Binary<&Module::OpFOrdLessThan, Type::Bool2, Type::HalfFloat>,
2522 &SPIRVDecompiler::Binary<&Module::OpFOrdEqual, Type::Bool2, Type::HalfFloat>, 2533 &SPIRVDecompiler::Binary<&Module::OpFOrdEqual, Type::Bool2, Type::HalfFloat>,
2523 &SPIRVDecompiler::Binary<&Module::OpFOrdLessThanEqual, Type::Bool2, Type::HalfFloat>, 2534 &SPIRVDecompiler::Binary<&Module::OpFOrdLessThanEqual, Type::Bool2, Type::HalfFloat>,
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp
index 9af8c606d..a041519b7 100644
--- a/src/video_core/shader/decode/arithmetic_integer.cpp
+++ b/src/video_core/shader/decode/arithmetic_integer.cpp
@@ -35,15 +35,38 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
35 case OpCode::Id::IADD_C: 35 case OpCode::Id::IADD_C:
36 case OpCode::Id::IADD_R: 36 case OpCode::Id::IADD_R:
37 case OpCode::Id::IADD_IMM: { 37 case OpCode::Id::IADD_IMM: {
38 UNIMPLEMENTED_IF_MSG(instr.alu.saturate_d, "IADD saturation not implemented"); 38 UNIMPLEMENTED_IF_MSG(instr.alu.saturate_d, "IADD.SAT");
39 UNIMPLEMENTED_IF_MSG(instr.iadd.x && instr.generates_cc, "IADD.X Rd.CC");
39 40
40 op_a = GetOperandAbsNegInteger(op_a, false, instr.alu_integer.negate_a, true); 41 op_a = GetOperandAbsNegInteger(op_a, false, instr.alu_integer.negate_a, true);
41 op_b = GetOperandAbsNegInteger(op_b, false, instr.alu_integer.negate_b, true); 42 op_b = GetOperandAbsNegInteger(op_b, false, instr.alu_integer.negate_b, true);
42 43
43 const Node value = Operation(OperationCode::IAdd, PRECISE, op_a, op_b); 44 Node value = Operation(OperationCode::UAdd, op_a, op_b);
44 45
45 SetInternalFlagsFromInteger(bb, value, instr.generates_cc); 46 if (instr.iadd.x) {
46 SetRegister(bb, instr.gpr0, value); 47 Node carry = GetInternalFlag(InternalFlag::Carry);
48 Node x = Operation(OperationCode::Select, std::move(carry), Immediate(1), Immediate(0));
49 value = Operation(OperationCode::UAdd, std::move(value), std::move(x));
50 }
51
52 if (instr.generates_cc) {
53 const Node i0 = Immediate(0);
54
55 Node zero = Operation(OperationCode::LogicalIEqual, value, i0);
56 Node sign = Operation(OperationCode::LogicalILessThan, value, i0);
57 Node carry = Operation(OperationCode::LogicalAddCarry, op_a, op_b);
58
59 Node pos_a = Operation(OperationCode::LogicalIGreaterThan, op_a, i0);
60 Node pos_b = Operation(OperationCode::LogicalIGreaterThan, op_b, i0);
61 Node pos = Operation(OperationCode::LogicalAnd, std::move(pos_a), std::move(pos_b));
62 Node overflow = Operation(OperationCode::LogicalAnd, pos, sign);
63
64 SetInternalFlag(bb, InternalFlag::Zero, std::move(zero));
65 SetInternalFlag(bb, InternalFlag::Sign, std::move(sign));
66 SetInternalFlag(bb, InternalFlag::Carry, std::move(carry));
67 SetInternalFlag(bb, InternalFlag::Overflow, std::move(overflow));
68 }
69 SetRegister(bb, instr.gpr0, std::move(value));
47 break; 70 break;
48 } 71 }
49 case OpCode::Id::IADD3_C: 72 case OpCode::Id::IADD3_C:
diff --git a/src/video_core/shader/decode/register_set_predicate.cpp b/src/video_core/shader/decode/register_set_predicate.cpp
index 8d54cce34..6116c31aa 100644
--- a/src/video_core/shader/decode/register_set_predicate.cpp
+++ b/src/video_core/shader/decode/register_set_predicate.cpp
@@ -2,6 +2,8 @@
2// Licensed under GPLv2 or any later version 2// Licensed under GPLv2 or any later version
3// Refer to the license.txt file included. 3// Refer to the license.txt file included.
4 4
5#include <utility>
6
5#include "common/assert.h" 7#include "common/assert.h"
6#include "common/common_types.h" 8#include "common/common_types.h"
7#include "video_core/engines/shader_bytecode.h" 9#include "video_core/engines/shader_bytecode.h"
@@ -10,20 +12,20 @@
10 12
11namespace VideoCommon::Shader { 13namespace VideoCommon::Shader {
12 14
15using std::move;
13using Tegra::Shader::Instruction; 16using Tegra::Shader::Instruction;
14using Tegra::Shader::OpCode; 17using Tegra::Shader::OpCode;
15 18
16namespace { 19namespace {
17constexpr u64 NUM_PROGRAMMABLE_PREDICATES = 7; 20constexpr u64 NUM_CONDITION_CODES = 4;
18} 21constexpr u64 NUM_PREDICATES = 7;
22} // namespace
19 23
20u32 ShaderIR::DecodeRegisterSetPredicate(NodeBlock& bb, u32 pc) { 24u32 ShaderIR::DecodeRegisterSetPredicate(NodeBlock& bb, u32 pc) {
21 const Instruction instr = {program_code[pc]}; 25 const Instruction instr = {program_code[pc]};
22 const auto opcode = OpCode::Decode(instr); 26 const auto opcode = OpCode::Decode(instr);
23 27
24 UNIMPLEMENTED_IF(instr.p2r_r2p.mode != Tegra::Shader::R2pMode::Pr); 28 Node apply_mask = [this, opcode, instr] {
25
26 const Node apply_mask = [&] {
27 switch (opcode->get().GetId()) { 29 switch (opcode->get().GetId()) {
28 case OpCode::Id::R2P_IMM: 30 case OpCode::Id::R2P_IMM:
29 case OpCode::Id::P2R_IMM: 31 case OpCode::Id::P2R_IMM:
@@ -34,39 +36,43 @@ u32 ShaderIR::DecodeRegisterSetPredicate(NodeBlock& bb, u32 pc) {
34 } 36 }
35 }(); 37 }();
36 38
37 const auto offset = static_cast<u32>(instr.p2r_r2p.byte) * 8; 39 const u32 offset = static_cast<u32>(instr.p2r_r2p.byte) * 8;
40
41 const bool cc = instr.p2r_r2p.mode == Tegra::Shader::R2pMode::Cc;
42 const u64 num_entries = cc ? NUM_CONDITION_CODES : NUM_PREDICATES;
43 const auto get_entry = [this, cc](u64 entry) {
44 return cc ? GetInternalFlag(static_cast<InternalFlag>(entry)) : GetPredicate(entry);
45 };
38 46
39 switch (opcode->get().GetId()) { 47 switch (opcode->get().GetId()) {
40 case OpCode::Id::R2P_IMM: { 48 case OpCode::Id::R2P_IMM: {
41 const Node mask = GetRegister(instr.gpr8); 49 Node mask = GetRegister(instr.gpr8);
42 50
43 for (u64 pred = 0; pred < NUM_PROGRAMMABLE_PREDICATES; ++pred) { 51 for (u64 entry = 0; entry < num_entries; ++entry) {
44 const auto shift = static_cast<u32>(pred); 52 const u32 shift = static_cast<u32>(entry);
45 53
46 const Node apply_compare = BitfieldExtract(apply_mask, shift, 1); 54 Node apply = BitfieldExtract(apply_mask, shift, 1);
47 const Node condition = 55 Node condition = Operation(OperationCode::LogicalUNotEqual, apply, Immediate(0));
48 Operation(OperationCode::LogicalUNotEqual, apply_compare, Immediate(0));
49 56
50 const Node value_compare = BitfieldExtract(mask, offset + shift, 1); 57 Node compare = BitfieldExtract(mask, offset + shift, 1);
51 const Node value = 58 Node value = Operation(OperationCode::LogicalUNotEqual, move(compare), Immediate(0));
52 Operation(OperationCode::LogicalUNotEqual, value_compare, Immediate(0));
53 59
54 const Node code = Operation(OperationCode::LogicalAssign, GetPredicate(pred), value); 60 Node code = Operation(OperationCode::LogicalAssign, get_entry(entry), move(value));
55 bb.push_back(Conditional(condition, {code})); 61 bb.push_back(Conditional(condition, {move(code)}));
56 } 62 }
57 break; 63 break;
58 } 64 }
59 case OpCode::Id::P2R_IMM: { 65 case OpCode::Id::P2R_IMM: {
60 Node value = Immediate(0); 66 Node value = Immediate(0);
61 for (u64 pred = 0; pred < NUM_PROGRAMMABLE_PREDICATES; ++pred) { 67 for (u64 entry = 0; entry < num_entries; ++entry) {
62 Node bit = Operation(OperationCode::Select, GetPredicate(pred), Immediate(1U << pred), 68 Node bit = Operation(OperationCode::Select, get_entry(entry), Immediate(1U << entry),
63 Immediate(0)); 69 Immediate(0));
64 value = Operation(OperationCode::UBitwiseOr, std::move(value), std::move(bit)); 70 value = Operation(OperationCode::UBitwiseOr, move(value), move(bit));
65 } 71 }
66 value = Operation(OperationCode::UBitwiseAnd, std::move(value), apply_mask); 72 value = Operation(OperationCode::UBitwiseAnd, move(value), apply_mask);
67 value = BitfieldInsert(GetRegister(instr.gpr8), std::move(value), offset, 8); 73 value = BitfieldInsert(GetRegister(instr.gpr8), move(value), offset, 8);
68 74
69 SetRegister(bb, instr.gpr0, std::move(value)); 75 SetRegister(bb, instr.gpr0, move(value));
70 break; 76 break;
71 } 77 }
72 default: 78 default:
diff --git a/src/video_core/shader/node.h b/src/video_core/shader/node.h
index 3eee961f5..3f5a7bc7a 100644
--- a/src/video_core/shader/node.h
+++ b/src/video_core/shader/node.h
@@ -132,6 +132,8 @@ enum class OperationCode {
132 LogicalUNotEqual, /// (uint a, uint b) -> bool 132 LogicalUNotEqual, /// (uint a, uint b) -> bool
133 LogicalUGreaterEqual, /// (uint a, uint b) -> bool 133 LogicalUGreaterEqual, /// (uint a, uint b) -> bool
134 134
135 LogicalAddCarry, /// (uint a, uint b) -> bool
136
135 Logical2HLessThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2 137 Logical2HLessThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
136 Logical2HEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2 138 Logical2HEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
137 Logical2HLessEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2 139 Logical2HLessEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
diff --git a/src/video_core/shader/track.cpp b/src/video_core/shader/track.cpp
index 513e9bf49..eb97bfd41 100644
--- a/src/video_core/shader/track.cpp
+++ b/src/video_core/shader/track.cpp
@@ -153,21 +153,13 @@ std::tuple<Node, u32, u32> ShaderIR::TrackCbuf(Node tracked, const NodeBlock& co
153 if (gpr->GetIndex() == Tegra::Shader::Register::ZeroIndex) { 153 if (gpr->GetIndex() == Tegra::Shader::Register::ZeroIndex) {
154 return {}; 154 return {};
155 } 155 }
156 s64 current_cursor = cursor; 156 // Reduce the cursor in one to avoid infinite loops when the instruction sets the same
157 while (current_cursor > 0) { 157 // register that it uses as operand
158 // Reduce the cursor in one to avoid infinite loops when the instruction sets the same 158 const auto [source, new_cursor] = TrackRegister(gpr, code, cursor - 1);
159 // register that it uses as operand 159 if (!source) {
160 const auto [source, new_cursor] = TrackRegister(gpr, code, current_cursor - 1); 160 return {};
161 current_cursor = new_cursor;
162 if (!source) {
163 continue;
164 }
165 const auto [base_address, index, offset] = TrackCbuf(source, code, current_cursor);
166 if (base_address != nullptr) {
167 return {base_address, index, offset};
168 }
169 } 161 }
170 return {}; 162 return TrackCbuf(source, code, new_cursor);
171 } 163 }
172 if (const auto operation = std::get_if<OperationNode>(&*tracked)) { 164 if (const auto operation = std::get_if<OperationNode>(&*tracked)) {
173 for (std::size_t i = operation->GetOperandsCount(); i > 0; --i) { 165 for (std::size_t i = operation->GetOperandsCount(); i > 0; --i) {
diff --git a/src/video_core/texture_cache/texture_cache.h b/src/video_core/texture_cache/texture_cache.h
index cf6bd005a..d2d2846e6 100644
--- a/src/video_core/texture_cache/texture_cache.h
+++ b/src/video_core/texture_cache/texture_cache.h
@@ -143,7 +143,7 @@ public:
143 } 143 }
144 144
145 const auto params{SurfaceParams::CreateForTexture(format_lookup_table, tic, entry)}; 145 const auto params{SurfaceParams::CreateForTexture(format_lookup_table, tic, entry)};
146 const auto [surface, view] = GetSurface(gpu_addr, *cpu_addr, params, false); 146 const auto [surface, view] = GetSurface(gpu_addr, *cpu_addr, params, true, false);
147 if (guard_samplers) { 147 if (guard_samplers) {
148 sampled_textures.push_back(surface); 148 sampled_textures.push_back(surface);
149 } 149 }
@@ -163,7 +163,7 @@ public:
163 return GetNullSurface(SurfaceParams::ExpectedTarget(entry)); 163 return GetNullSurface(SurfaceParams::ExpectedTarget(entry));
164 } 164 }
165 const auto params{SurfaceParams::CreateForImage(format_lookup_table, tic, entry)}; 165 const auto params{SurfaceParams::CreateForImage(format_lookup_table, tic, entry)};
166 const auto [surface, view] = GetSurface(gpu_addr, *cpu_addr, params, false); 166 const auto [surface, view] = GetSurface(gpu_addr, *cpu_addr, params, true, false);
167 if (guard_samplers) { 167 if (guard_samplers) {
168 sampled_textures.push_back(surface); 168 sampled_textures.push_back(surface);
169 } 169 }
@@ -178,7 +178,7 @@ public:
178 return any_rt; 178 return any_rt;
179 } 179 }
180 180
181 TView GetDepthBufferSurface() { 181 TView GetDepthBufferSurface(bool preserve_contents) {
182 std::lock_guard lock{mutex}; 182 std::lock_guard lock{mutex};
183 auto& maxwell3d = system.GPU().Maxwell3D(); 183 auto& maxwell3d = system.GPU().Maxwell3D();
184 if (!maxwell3d.dirty.flags[VideoCommon::Dirty::ZetaBuffer]) { 184 if (!maxwell3d.dirty.flags[VideoCommon::Dirty::ZetaBuffer]) {
@@ -199,7 +199,7 @@ public:
199 return {}; 199 return {};
200 } 200 }
201 const auto depth_params{SurfaceParams::CreateForDepthBuffer(system)}; 201 const auto depth_params{SurfaceParams::CreateForDepthBuffer(system)};
202 auto surface_view = GetSurface(gpu_addr, *cpu_addr, depth_params, true); 202 auto surface_view = GetSurface(gpu_addr, *cpu_addr, depth_params, preserve_contents, true);
203 if (depth_buffer.target) 203 if (depth_buffer.target)
204 depth_buffer.target->MarkAsRenderTarget(false, NO_RT); 204 depth_buffer.target->MarkAsRenderTarget(false, NO_RT);
205 depth_buffer.target = surface_view.first; 205 depth_buffer.target = surface_view.first;
@@ -209,7 +209,7 @@ public:
209 return surface_view.second; 209 return surface_view.second;
210 } 210 }
211 211
212 TView GetColorBufferSurface(std::size_t index) { 212 TView GetColorBufferSurface(std::size_t index, bool preserve_contents) {
213 std::lock_guard lock{mutex}; 213 std::lock_guard lock{mutex};
214 ASSERT(index < Tegra::Engines::Maxwell3D::Regs::NumRenderTargets); 214 ASSERT(index < Tegra::Engines::Maxwell3D::Regs::NumRenderTargets);
215 auto& maxwell3d = system.GPU().Maxwell3D(); 215 auto& maxwell3d = system.GPU().Maxwell3D();
@@ -239,8 +239,9 @@ public:
239 return {}; 239 return {};
240 } 240 }
241 241
242 auto surface_view = GetSurface(gpu_addr, *cpu_addr, 242 auto surface_view =
243 SurfaceParams::CreateForFramebuffer(system, index), true); 243 GetSurface(gpu_addr, *cpu_addr, SurfaceParams::CreateForFramebuffer(system, index),
244 preserve_contents, true);
244 if (render_targets[index].target) { 245 if (render_targets[index].target) {
245 auto& surface = render_targets[index].target; 246 auto& surface = render_targets[index].target;
246 surface->MarkAsRenderTarget(false, NO_RT); 247 surface->MarkAsRenderTarget(false, NO_RT);
@@ -300,9 +301,9 @@ public:
300 const std::optional<VAddr> src_cpu_addr = 301 const std::optional<VAddr> src_cpu_addr =
301 system.GPU().MemoryManager().GpuToCpuAddress(src_gpu_addr); 302 system.GPU().MemoryManager().GpuToCpuAddress(src_gpu_addr);
302 std::pair<TSurface, TView> dst_surface = 303 std::pair<TSurface, TView> dst_surface =
303 GetSurface(dst_gpu_addr, *dst_cpu_addr, dst_params, false); 304 GetSurface(dst_gpu_addr, *dst_cpu_addr, dst_params, true, false);
304 std::pair<TSurface, TView> src_surface = 305 std::pair<TSurface, TView> src_surface =
305 GetSurface(src_gpu_addr, *src_cpu_addr, src_params, false); 306 GetSurface(src_gpu_addr, *src_cpu_addr, src_params, true, false);
306 ImageBlit(src_surface.second, dst_surface.second, copy_config); 307 ImageBlit(src_surface.second, dst_surface.second, copy_config);
307 dst_surface.first->MarkAsModified(true, Tick()); 308 dst_surface.first->MarkAsModified(true, Tick());
308 } 309 }
@@ -532,18 +533,22 @@ private:
532 * @param overlaps The overlapping surfaces registered in the cache. 533 * @param overlaps The overlapping surfaces registered in the cache.
533 * @param params The parameters for the new surface. 534 * @param params The parameters for the new surface.
534 * @param gpu_addr The starting address of the new surface. 535 * @param gpu_addr The starting address of the new surface.
536 * @param preserve_contents Indicates that the new surface should be loaded from memory or left
537 * blank.
535 * @param untopological Indicates to the recycler that the texture has no way to match the 538 * @param untopological Indicates to the recycler that the texture has no way to match the
536 * overlaps due to topological reasons. 539 * overlaps due to topological reasons.
537 **/ 540 **/
538 std::pair<TSurface, TView> RecycleSurface(std::vector<TSurface>& overlaps, 541 std::pair<TSurface, TView> RecycleSurface(std::vector<TSurface>& overlaps,
539 const SurfaceParams& params, const GPUVAddr gpu_addr, 542 const SurfaceParams& params, const GPUVAddr gpu_addr,
543 const bool preserve_contents,
540 const MatchTopologyResult untopological) { 544 const MatchTopologyResult untopological) {
545 const bool do_load = preserve_contents && Settings::IsGPULevelExtreme();
541 for (auto& surface : overlaps) { 546 for (auto& surface : overlaps) {
542 Unregister(surface); 547 Unregister(surface);
543 } 548 }
544 switch (PickStrategy(overlaps, params, gpu_addr, untopological)) { 549 switch (PickStrategy(overlaps, params, gpu_addr, untopological)) {
545 case RecycleStrategy::Ignore: { 550 case RecycleStrategy::Ignore: {
546 return InitializeSurface(gpu_addr, params, Settings::IsGPULevelExtreme()); 551 return InitializeSurface(gpu_addr, params, do_load);
547 } 552 }
548 case RecycleStrategy::Flush: { 553 case RecycleStrategy::Flush: {
549 std::sort(overlaps.begin(), overlaps.end(), 554 std::sort(overlaps.begin(), overlaps.end(),
@@ -553,7 +558,7 @@ private:
553 for (auto& surface : overlaps) { 558 for (auto& surface : overlaps) {
554 FlushSurface(surface); 559 FlushSurface(surface);
555 } 560 }
556 return InitializeSurface(gpu_addr, params); 561 return InitializeSurface(gpu_addr, params, preserve_contents);
557 } 562 }
558 case RecycleStrategy::BufferCopy: { 563 case RecycleStrategy::BufferCopy: {
559 auto new_surface = GetUncachedSurface(gpu_addr, params); 564 auto new_surface = GetUncachedSurface(gpu_addr, params);
@@ -562,7 +567,7 @@ private:
562 } 567 }
563 default: { 568 default: {
564 UNIMPLEMENTED_MSG("Unimplemented Texture Cache Recycling Strategy!"); 569 UNIMPLEMENTED_MSG("Unimplemented Texture Cache Recycling Strategy!");
565 return InitializeSurface(gpu_addr, params); 570 return InitializeSurface(gpu_addr, params, do_load);
566 } 571 }
567 } 572 }
568 } 573 }
@@ -700,11 +705,14 @@ private:
700 * @param params The parameters on the new surface. 705 * @param params The parameters on the new surface.
701 * @param gpu_addr The starting address of the new surface. 706 * @param gpu_addr The starting address of the new surface.
702 * @param cpu_addr The starting address of the new surface on physical memory. 707 * @param cpu_addr The starting address of the new surface on physical memory.
708 * @param preserve_contents Indicates that the new surface should be loaded from memory or
709 * left blank.
703 */ 710 */
704 std::optional<std::pair<TSurface, TView>> Manage3DSurfaces(std::vector<TSurface>& overlaps, 711 std::optional<std::pair<TSurface, TView>> Manage3DSurfaces(std::vector<TSurface>& overlaps,
705 const SurfaceParams& params, 712 const SurfaceParams& params,
706 const GPUVAddr gpu_addr, 713 const GPUVAddr gpu_addr,
707 const VAddr cpu_addr) { 714 const VAddr cpu_addr,
715 bool preserve_contents) {
708 if (params.target == SurfaceTarget::Texture3D) { 716 if (params.target == SurfaceTarget::Texture3D) {
709 bool failed = false; 717 bool failed = false;
710 if (params.num_levels > 1) { 718 if (params.num_levels > 1) {
@@ -754,7 +762,7 @@ private:
754 return std::nullopt; 762 return std::nullopt;
755 } 763 }
756 Unregister(surface); 764 Unregister(surface);
757 return InitializeSurface(gpu_addr, params); 765 return InitializeSurface(gpu_addr, params, preserve_contents);
758 } 766 }
759 return std::nullopt; 767 return std::nullopt;
760 } 768 }
@@ -765,7 +773,7 @@ private:
765 return {{surface, surface->GetMainView()}}; 773 return {{surface, surface->GetMainView()}};
766 } 774 }
767 } 775 }
768 return InitializeSurface(gpu_addr, params); 776 return InitializeSurface(gpu_addr, params, preserve_contents);
769 } 777 }
770 } 778 }
771 779
@@ -788,10 +796,13 @@ private:
788 * 796 *
789 * @param gpu_addr The starting address of the candidate surface. 797 * @param gpu_addr The starting address of the candidate surface.
790 * @param params The parameters on the candidate surface. 798 * @param params The parameters on the candidate surface.
799 * @param preserve_contents Indicates that the new surface should be loaded from memory or
800 * left blank.
791 * @param is_render Whether or not the surface is a render target. 801 * @param is_render Whether or not the surface is a render target.
792 **/ 802 **/
793 std::pair<TSurface, TView> GetSurface(const GPUVAddr gpu_addr, const VAddr cpu_addr, 803 std::pair<TSurface, TView> GetSurface(const GPUVAddr gpu_addr, const VAddr cpu_addr,
794 const SurfaceParams& params, bool is_render) { 804 const SurfaceParams& params, bool preserve_contents,
805 bool is_render) {
795 // Step 1 806 // Step 1
796 // Check Level 1 Cache for a fast structural match. If candidate surface 807 // Check Level 1 Cache for a fast structural match. If candidate surface
797 // matches at certain level we are pretty much done. 808 // matches at certain level we are pretty much done.
@@ -800,7 +811,8 @@ private:
800 const auto topological_result = current_surface->MatchesTopology(params); 811 const auto topological_result = current_surface->MatchesTopology(params);
801 if (topological_result != MatchTopologyResult::FullMatch) { 812 if (topological_result != MatchTopologyResult::FullMatch) {
802 std::vector<TSurface> overlaps{current_surface}; 813 std::vector<TSurface> overlaps{current_surface};
803 return RecycleSurface(overlaps, params, gpu_addr, topological_result); 814 return RecycleSurface(overlaps, params, gpu_addr, preserve_contents,
815 topological_result);
804 } 816 }
805 817
806 const auto struct_result = current_surface->MatchesStructure(params); 818 const auto struct_result = current_surface->MatchesStructure(params);
@@ -825,7 +837,7 @@ private:
825 837
826 // If none are found, we are done. we just load the surface and create it. 838 // If none are found, we are done. we just load the surface and create it.
827 if (overlaps.empty()) { 839 if (overlaps.empty()) {
828 return InitializeSurface(gpu_addr, params); 840 return InitializeSurface(gpu_addr, params, preserve_contents);
829 } 841 }
830 842
831 // Step 3 843 // Step 3
@@ -835,13 +847,15 @@ private:
835 for (const auto& surface : overlaps) { 847 for (const auto& surface : overlaps) {
836 const auto topological_result = surface->MatchesTopology(params); 848 const auto topological_result = surface->MatchesTopology(params);
837 if (topological_result != MatchTopologyResult::FullMatch) { 849 if (topological_result != MatchTopologyResult::FullMatch) {
838 return RecycleSurface(overlaps, params, gpu_addr, topological_result); 850 return RecycleSurface(overlaps, params, gpu_addr, preserve_contents,
851 topological_result);
839 } 852 }
840 } 853 }
841 854
842 // Check if it's a 3D texture 855 // Check if it's a 3D texture
843 if (params.block_depth > 0) { 856 if (params.block_depth > 0) {
844 auto surface = Manage3DSurfaces(overlaps, params, gpu_addr, cpu_addr); 857 auto surface =
858 Manage3DSurfaces(overlaps, params, gpu_addr, cpu_addr, preserve_contents);
845 if (surface) { 859 if (surface) {
846 return *surface; 860 return *surface;
847 } 861 }
@@ -861,7 +875,8 @@ private:
861 return *view; 875 return *view;
862 } 876 }
863 } 877 }
864 return RecycleSurface(overlaps, params, gpu_addr, MatchTopologyResult::FullMatch); 878 return RecycleSurface(overlaps, params, gpu_addr, preserve_contents,
879 MatchTopologyResult::FullMatch);
865 } 880 }
866 // Now we check if the candidate is a mipmap/layer of the overlap 881 // Now we check if the candidate is a mipmap/layer of the overlap
867 std::optional<TView> view = 882 std::optional<TView> view =
@@ -885,7 +900,7 @@ private:
885 pair.first->EmplaceView(params, gpu_addr, candidate_size); 900 pair.first->EmplaceView(params, gpu_addr, candidate_size);
886 if (mirage_view) 901 if (mirage_view)
887 return {pair.first, *mirage_view}; 902 return {pair.first, *mirage_view};
888 return RecycleSurface(overlaps, params, gpu_addr, 903 return RecycleSurface(overlaps, params, gpu_addr, preserve_contents,
889 MatchTopologyResult::FullMatch); 904 MatchTopologyResult::FullMatch);
890 } 905 }
891 return {current_surface, *view}; 906 return {current_surface, *view};
@@ -901,7 +916,8 @@ private:
901 } 916 }
902 } 917 }
903 // We failed all the tests, recycle the overlaps into a new texture. 918 // We failed all the tests, recycle the overlaps into a new texture.
904 return RecycleSurface(overlaps, params, gpu_addr, MatchTopologyResult::FullMatch); 919 return RecycleSurface(overlaps, params, gpu_addr, preserve_contents,
920 MatchTopologyResult::FullMatch);
905 } 921 }
906 922
907 /** 923 /**
@@ -1059,10 +1075,10 @@ private:
1059 } 1075 }
1060 1076
1061 std::pair<TSurface, TView> InitializeSurface(GPUVAddr gpu_addr, const SurfaceParams& params, 1077 std::pair<TSurface, TView> InitializeSurface(GPUVAddr gpu_addr, const SurfaceParams& params,
1062 bool do_load = true) { 1078 bool preserve_contents) {
1063 auto new_surface{GetUncachedSurface(gpu_addr, params)}; 1079 auto new_surface{GetUncachedSurface(gpu_addr, params)};
1064 Register(new_surface); 1080 Register(new_surface);
1065 if (do_load) { 1081 if (preserve_contents) {
1066 LoadSurface(new_surface); 1082 LoadSurface(new_surface);
1067 } 1083 }
1068 return {new_surface, new_surface->GetMainView()}; 1084 return {new_surface, new_surface->GetMainView()};