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-rw-r--r--src/video_core/pica.h8
-rw-r--r--src/video_core/shader/shader.cpp18
2 files changed, 19 insertions, 7 deletions
diff --git a/src/video_core/pica.h b/src/video_core/pica.h
index 2e0c33201..54187bcad 100644
--- a/src/video_core/pica.h
+++ b/src/video_core/pica.h
@@ -71,7 +71,7 @@ struct Regs {
71 BitField<0, 24, u32> viewport_depth_range; // float24 71 BitField<0, 24, u32> viewport_depth_range; // float24
72 BitField<0, 24, u32> viewport_depth_far_plane; // float24 72 BitField<0, 24, u32> viewport_depth_far_plane; // float24
73 73
74 INSERT_PADDING_WORDS(0x1); 74 BitField<0, 3, u32> vs_output_total;
75 75
76 union VSOutputAttributes { 76 union VSOutputAttributes {
77 // Maps components of output vertex attributes to semantics 77 // Maps components of output vertex attributes to semantics
@@ -1157,8 +1157,10 @@ struct Regs {
1157 } 1157 }
1158 } input_register_map; 1158 } input_register_map;
1159 1159
1160 // OUTMAP_MASK, 0x28E, CODETRANSFER_END 1160 BitField<0, 16, u32> output_mask;
1161 INSERT_PADDING_WORDS(0x3); 1161
1162 // 0x28E, CODETRANSFER_END
1163 INSERT_PADDING_WORDS(0x2);
1162 1164
1163 struct { 1165 struct {
1164 enum Format : u32 1166 enum Format : u32
diff --git a/src/video_core/shader/shader.cpp b/src/video_core/shader/shader.cpp
index 5e8930476..dbb8fd804 100644
--- a/src/video_core/shader/shader.cpp
+++ b/src/video_core/shader/shader.cpp
@@ -109,15 +109,23 @@ OutputVertex Run(UnitState<false>& state, const InputVertex& input, int num_attr
109 OutputVertex ret; 109 OutputVertex ret;
110 // TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to 110 // TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to
111 // figure out what those circumstances are and enable the remaining outputs then. 111 // figure out what those circumstances are and enable the remaining outputs then.
112 for (int i = 0; i < 7; ++i) { 112 unsigned index = 0;
113 const auto& output_register_map = g_state.regs.vs_output_attributes[i]; // TODO: Don't hardcode VS here 113 for (unsigned i = 0; i < 7; ++i) {
114
115 if (index >= g_state.regs.vs_output_total)
116 break;
117
118 if ((g_state.regs.vs.output_mask & (1 << i)) == 0)
119 continue;
120
121 const auto& output_register_map = g_state.regs.vs_output_attributes[index]; // TODO: Don't hardcode VS here
114 122
115 u32 semantics[4] = { 123 u32 semantics[4] = {
116 output_register_map.map_x, output_register_map.map_y, 124 output_register_map.map_x, output_register_map.map_y,
117 output_register_map.map_z, output_register_map.map_w 125 output_register_map.map_z, output_register_map.map_w
118 }; 126 };
119 127
120 for (int comp = 0; comp < 4; ++comp) { 128 for (unsigned comp = 0; comp < 4; ++comp) {
121 float24* out = ((float24*)&ret) + semantics[comp]; 129 float24* out = ((float24*)&ret) + semantics[comp];
122 if (semantics[comp] != Regs::VSOutputAttributes::INVALID) { 130 if (semantics[comp] != Regs::VSOutputAttributes::INVALID) {
123 *out = state.registers.output[i][comp]; 131 *out = state.registers.output[i][comp];
@@ -127,10 +135,12 @@ OutputVertex Run(UnitState<false>& state, const InputVertex& input, int num_attr
127 memset(out, 0, sizeof(*out)); 135 memset(out, 0, sizeof(*out));
128 } 136 }
129 } 137 }
138
139 index++;
130 } 140 }
131 141
132 // The hardware takes the absolute and saturates vertex colors like this, *before* doing interpolation 142 // The hardware takes the absolute and saturates vertex colors like this, *before* doing interpolation
133 for (int i = 0; i < 4; ++i) { 143 for (unsigned i = 0; i < 4; ++i) {
134 ret.color[i] = float24::FromFloat32( 144 ret.color[i] = float24::FromFloat32(
135 std::fmin(std::fabs(ret.color[i].ToFloat32()), 1.0f)); 145 std::fmin(std::fabs(ret.color[i].ToFloat32()), 1.0f));
136 } 146 }