diff options
Diffstat (limited to '')
| -rw-r--r-- | src/video_core/renderer_opengl/gl_arb_decompiler.cpp | 4 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_shader_cache.cpp | 2 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 2 | ||||
| -rw-r--r-- | src/video_core/shader/decode/arithmetic_integer.cpp | 6 | ||||
| -rw-r--r-- | src/video_core/shader/decode/video.cpp | 19 | ||||
| -rw-r--r-- | src/video_core/shader/decode/xmad.cpp | 15 | ||||
| -rw-r--r-- | src/video_core/shader/shader_ir.cpp | 4 |
7 files changed, 26 insertions, 26 deletions
diff --git a/src/video_core/renderer_opengl/gl_arb_decompiler.cpp b/src/video_core/renderer_opengl/gl_arb_decompiler.cpp index 7ab7755f5..b7e9ed2e9 100644 --- a/src/video_core/renderer_opengl/gl_arb_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_arb_decompiler.cpp | |||
| @@ -1704,7 +1704,7 @@ std::string ARBDecompiler::HCastFloat(Operation operation) { | |||
| 1704 | } | 1704 | } |
| 1705 | 1705 | ||
| 1706 | std::string ARBDecompiler::HUnpack(Operation operation) { | 1706 | std::string ARBDecompiler::HUnpack(Operation operation) { |
| 1707 | const std::string operand = Visit(operation[0]); | 1707 | std::string operand = Visit(operation[0]); |
| 1708 | switch (std::get<Tegra::Shader::HalfType>(operation.GetMeta())) { | 1708 | switch (std::get<Tegra::Shader::HalfType>(operation.GetMeta())) { |
| 1709 | case Tegra::Shader::HalfType::H0_H1: | 1709 | case Tegra::Shader::HalfType::H0_H1: |
| 1710 | return operand; | 1710 | return operand; |
| @@ -2054,7 +2054,7 @@ std::string ARBDecompiler::InvocationId(Operation) { | |||
| 2054 | 2054 | ||
| 2055 | std::string ARBDecompiler::YNegate(Operation) { | 2055 | std::string ARBDecompiler::YNegate(Operation) { |
| 2056 | LOG_WARNING(Render_OpenGL, "(STUBBED)"); | 2056 | LOG_WARNING(Render_OpenGL, "(STUBBED)"); |
| 2057 | const std::string temporary = AllocTemporary(); | 2057 | std::string temporary = AllocTemporary(); |
| 2058 | AddLine("MOV.F {}, 1;", temporary); | 2058 | AddLine("MOV.F {}, 1;", temporary); |
| 2059 | return temporary; | 2059 | return temporary; |
| 2060 | } | 2060 | } |
diff --git a/src/video_core/renderer_opengl/gl_shader_cache.cpp b/src/video_core/renderer_opengl/gl_shader_cache.cpp index 28d47a211..be71e1733 100644 --- a/src/video_core/renderer_opengl/gl_shader_cache.cpp +++ b/src/video_core/renderer_opengl/gl_shader_cache.cpp | |||
| @@ -126,7 +126,7 @@ std::shared_ptr<Registry> MakeRegistry(const ShaderDiskCacheEntry& entry) { | |||
| 126 | const VideoCore::GuestDriverProfile guest_profile{entry.texture_handler_size}; | 126 | const VideoCore::GuestDriverProfile guest_profile{entry.texture_handler_size}; |
| 127 | const VideoCommon::Shader::SerializedRegistryInfo info{guest_profile, entry.bound_buffer, | 127 | const VideoCommon::Shader::SerializedRegistryInfo info{guest_profile, entry.bound_buffer, |
| 128 | entry.graphics_info, entry.compute_info}; | 128 | entry.graphics_info, entry.compute_info}; |
| 129 | const auto registry = std::make_shared<Registry>(entry.type, info); | 129 | auto registry = std::make_shared<Registry>(entry.type, info); |
| 130 | for (const auto& [address, value] : entry.keys) { | 130 | for (const auto& [address, value] : entry.keys) { |
| 131 | const auto [buffer, offset] = address; | 131 | const auto [buffer, offset] = address; |
| 132 | registry->InsertKey(buffer, offset, value); | 132 | registry->InsertKey(buffer, offset, value); |
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index 1b1c97239..3f75fcd2b 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp | |||
| @@ -1919,7 +1919,7 @@ private: | |||
| 1919 | Expression Comparison(Operation operation) { | 1919 | Expression Comparison(Operation operation) { |
| 1920 | static_assert(!unordered || type == Type::Float); | 1920 | static_assert(!unordered || type == Type::Float); |
| 1921 | 1921 | ||
| 1922 | const Expression expr = GenerateBinaryInfix(operation, op, Type::Bool, type, type); | 1922 | Expression expr = GenerateBinaryInfix(operation, op, Type::Bool, type, type); |
| 1923 | 1923 | ||
| 1924 | if constexpr (op.compare("!=") == 0 && type == Type::Float && !unordered) { | 1924 | if constexpr (op.compare("!=") == 0 && type == Type::Float && !unordered) { |
| 1925 | // GLSL's operator!=(float, float) doesn't seem be ordered. This happens on both AMD's | 1925 | // GLSL's operator!=(float, float) doesn't seem be ordered. This happens on both AMD's |
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp index a041519b7..73155966f 100644 --- a/src/video_core/shader/decode/arithmetic_integer.cpp +++ b/src/video_core/shader/decode/arithmetic_integer.cpp | |||
| @@ -98,12 +98,12 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) { | |||
| 98 | op_b = GetOperandAbsNegInteger(op_b, false, instr.iadd3.neg_b, true); | 98 | op_b = GetOperandAbsNegInteger(op_b, false, instr.iadd3.neg_b, true); |
| 99 | op_c = GetOperandAbsNegInteger(op_c, false, instr.iadd3.neg_c, true); | 99 | op_c = GetOperandAbsNegInteger(op_c, false, instr.iadd3.neg_c, true); |
| 100 | 100 | ||
| 101 | const Node value = [&]() { | 101 | const Node value = [&] { |
| 102 | const Node add_ab = Operation(OperationCode::IAdd, NO_PRECISE, op_a, op_b); | 102 | Node add_ab = Operation(OperationCode::IAdd, NO_PRECISE, op_a, op_b); |
| 103 | if (opcode->get().GetId() != OpCode::Id::IADD3_R) { | 103 | if (opcode->get().GetId() != OpCode::Id::IADD3_R) { |
| 104 | return Operation(OperationCode::IAdd, NO_PRECISE, add_ab, op_c); | 104 | return Operation(OperationCode::IAdd, NO_PRECISE, add_ab, op_c); |
| 105 | } | 105 | } |
| 106 | const Node shifted = [&]() { | 106 | const Node shifted = [&] { |
| 107 | switch (instr.iadd3.mode) { | 107 | switch (instr.iadd3.mode) { |
| 108 | case Tegra::Shader::IAdd3Mode::RightShift: | 108 | case Tegra::Shader::IAdd3Mode::RightShift: |
| 109 | // TODO(tech4me): According to | 109 | // TODO(tech4me): According to |
diff --git a/src/video_core/shader/decode/video.cpp b/src/video_core/shader/decode/video.cpp index 64ba60ea2..1c0957277 100644 --- a/src/video_core/shader/decode/video.cpp +++ b/src/video_core/shader/decode/video.cpp | |||
| @@ -91,29 +91,28 @@ u32 ShaderIR::DecodeVideo(NodeBlock& bb, u32 pc) { | |||
| 91 | return pc; | 91 | return pc; |
| 92 | } | 92 | } |
| 93 | 93 | ||
| 94 | Node ShaderIR::GetVideoOperand(Node op, bool is_chunk, bool is_signed, | 94 | Node ShaderIR::GetVideoOperand(Node op, bool is_chunk, bool is_signed, VideoType type, |
| 95 | Tegra::Shader::VideoType type, u64 byte_height) { | 95 | u64 byte_height) { |
| 96 | if (!is_chunk) { | 96 | if (!is_chunk) { |
| 97 | return BitfieldExtract(op, static_cast<u32>(byte_height * 8), 8); | 97 | return BitfieldExtract(op, static_cast<u32>(byte_height * 8), 8); |
| 98 | } | 98 | } |
| 99 | const Node zero = Immediate(0); | ||
| 100 | 99 | ||
| 101 | switch (type) { | 100 | switch (type) { |
| 102 | case Tegra::Shader::VideoType::Size16_Low: | 101 | case VideoType::Size16_Low: |
| 103 | return BitfieldExtract(op, 0, 16); | 102 | return BitfieldExtract(op, 0, 16); |
| 104 | case Tegra::Shader::VideoType::Size16_High: | 103 | case VideoType::Size16_High: |
| 105 | return BitfieldExtract(op, 16, 16); | 104 | return BitfieldExtract(op, 16, 16); |
| 106 | case Tegra::Shader::VideoType::Size32: | 105 | case VideoType::Size32: |
| 107 | // TODO(Rodrigo): From my hardware tests it becomes a bit "mad" when this type is used | 106 | // TODO(Rodrigo): From my hardware tests it becomes a bit "mad" when this type is used |
| 108 | // (1 * 1 + 0 == 0x5b800000). Until a better explanation is found: abort. | 107 | // (1 * 1 + 0 == 0x5b800000). Until a better explanation is found: abort. |
| 109 | UNIMPLEMENTED(); | 108 | UNIMPLEMENTED(); |
| 110 | return zero; | 109 | return Immediate(0); |
| 111 | case Tegra::Shader::VideoType::Invalid: | 110 | case VideoType::Invalid: |
| 112 | UNREACHABLE_MSG("Invalid instruction encoding"); | 111 | UNREACHABLE_MSG("Invalid instruction encoding"); |
| 113 | return zero; | 112 | return Immediate(0); |
| 114 | default: | 113 | default: |
| 115 | UNREACHABLE(); | 114 | UNREACHABLE(); |
| 116 | return zero; | 115 | return Immediate(0); |
| 117 | } | 116 | } |
| 118 | } | 117 | } |
| 119 | 118 | ||
diff --git a/src/video_core/shader/decode/xmad.cpp b/src/video_core/shader/decode/xmad.cpp index c83dc6615..233b8fa42 100644 --- a/src/video_core/shader/decode/xmad.cpp +++ b/src/video_core/shader/decode/xmad.cpp | |||
| @@ -81,20 +81,21 @@ u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) { | |||
| 81 | SetTemporary(bb, 0, product); | 81 | SetTemporary(bb, 0, product); |
| 82 | product = GetTemporary(0); | 82 | product = GetTemporary(0); |
| 83 | 83 | ||
| 84 | const Node original_c = op_c; | 84 | Node original_c = op_c; |
| 85 | const Tegra::Shader::XmadMode set_mode = mode; // Workaround to clang compile error | 85 | const Tegra::Shader::XmadMode set_mode = mode; // Workaround to clang compile error |
| 86 | op_c = [&]() { | 86 | op_c = [&] { |
| 87 | switch (set_mode) { | 87 | switch (set_mode) { |
| 88 | case Tegra::Shader::XmadMode::None: | 88 | case Tegra::Shader::XmadMode::None: |
| 89 | return original_c; | 89 | return original_c; |
| 90 | case Tegra::Shader::XmadMode::CLo: | 90 | case Tegra::Shader::XmadMode::CLo: |
| 91 | return BitfieldExtract(original_c, 0, 16); | 91 | return BitfieldExtract(std::move(original_c), 0, 16); |
| 92 | case Tegra::Shader::XmadMode::CHi: | 92 | case Tegra::Shader::XmadMode::CHi: |
| 93 | return BitfieldExtract(original_c, 16, 16); | 93 | return BitfieldExtract(std::move(original_c), 16, 16); |
| 94 | case Tegra::Shader::XmadMode::CBcc: { | 94 | case Tegra::Shader::XmadMode::CBcc: { |
| 95 | const Node shifted_b = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_b, | 95 | Node shifted_b = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_b, |
| 96 | original_b, Immediate(16)); | 96 | original_b, Immediate(16)); |
| 97 | return SignedOperation(OperationCode::IAdd, is_signed_c, original_c, shifted_b); | 97 | return SignedOperation(OperationCode::IAdd, is_signed_c, std::move(original_c), |
| 98 | std::move(shifted_b)); | ||
| 98 | } | 99 | } |
| 99 | case Tegra::Shader::XmadMode::CSfu: { | 100 | case Tegra::Shader::XmadMode::CSfu: { |
| 100 | const Node comp_a = | 101 | const Node comp_a = |
diff --git a/src/video_core/shader/shader_ir.cpp b/src/video_core/shader/shader_ir.cpp index e322c3402..29d794b34 100644 --- a/src/video_core/shader/shader_ir.cpp +++ b/src/video_core/shader/shader_ir.cpp | |||
| @@ -112,9 +112,9 @@ Node ShaderIR::GetOutputAttribute(Attribute::Index index, u64 element, Node buff | |||
| 112 | } | 112 | } |
| 113 | 113 | ||
| 114 | Node ShaderIR::GetInternalFlag(InternalFlag flag, bool negated) const { | 114 | Node ShaderIR::GetInternalFlag(InternalFlag flag, bool negated) const { |
| 115 | const Node node = MakeNode<InternalFlagNode>(flag); | 115 | Node node = MakeNode<InternalFlagNode>(flag); |
| 116 | if (negated) { | 116 | if (negated) { |
| 117 | return Operation(OperationCode::LogicalNegate, node); | 117 | return Operation(OperationCode::LogicalNegate, std::move(node)); |
| 118 | } | 118 | } |
| 119 | return node; | 119 | return node; |
| 120 | } | 120 | } |