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-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer.cpp31
-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer.h2
-rw-r--r--src/video_core/textures/texture.h13
3 files changed, 33 insertions, 13 deletions
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp
index a404764f5..40f474e07 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer.cpp
+++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp
@@ -740,9 +740,9 @@ void RasterizerOpenGL::SamplerInfo::Create() {
740 glSamplerParameteri(sampler.handle, GL_TEXTURE_COMPARE_FUNC, GL_NEVER); 740 glSamplerParameteri(sampler.handle, GL_TEXTURE_COMPARE_FUNC, GL_NEVER);
741} 741}
742 742
743void RasterizerOpenGL::SamplerInfo::SyncWithConfig(const Tegra::Texture::TSCEntry& config) { 743void RasterizerOpenGL::SamplerInfo::SyncWithConfig(const Tegra::Texture::FullTextureInfo& info) {
744 const GLuint s = sampler.handle; 744 const GLuint s = sampler.handle;
745 745 const Tegra::Texture::TSCEntry& config = info.tsc;
746 if (mag_filter != config.mag_filter) { 746 if (mag_filter != config.mag_filter) {
747 mag_filter = config.mag_filter; 747 mag_filter = config.mag_filter;
748 glSamplerParameteri( 748 glSamplerParameteri(
@@ -793,6 +793,17 @@ void RasterizerOpenGL::SamplerInfo::SyncWithConfig(const Tegra::Texture::TSCEntr
793 glSamplerParameterfv(s, GL_TEXTURE_BORDER_COLOR, border_color.data()); 793 glSamplerParameterfv(s, GL_TEXTURE_BORDER_COLOR, border_color.data());
794 } 794 }
795 } 795 }
796 if (info.tic.use_header_opt_control == 0) {
797 glSamplerParameterf(s, GL_TEXTURE_MAX_ANISOTROPY_EXT,
798 static_cast<float>(1 << info.tic.max_anisotropy.Value()));
799 glSamplerParameterf(s, GL_TEXTURE_MIN_LOD,
800 static_cast<float>(info.tic.res_min_mip_level.Value()));
801 glSamplerParameterf(s, GL_TEXTURE_MAX_LOD,
802 static_cast<float>(info.tic.res_max_mip_level.Value() == 0
803 ? 16
804 : info.tic.res_max_mip_level.Value()));
805 glSamplerParameterf(s, GL_TEXTURE_LOD_BIAS, info.tic.mip_lod_bias.Value() / 256.f);
806 }
796} 807}
797 808
798u32 RasterizerOpenGL::SetupConstBuffers(Maxwell::ShaderStage stage, Shader& shader, 809u32 RasterizerOpenGL::SetupConstBuffers(Maxwell::ShaderStage stage, Shader& shader,
@@ -890,7 +901,7 @@ u32 RasterizerOpenGL::SetupTextures(Maxwell::ShaderStage stage, Shader& shader,
890 continue; 901 continue;
891 } 902 }
892 903
893 texture_samplers[current_bindpoint].SyncWithConfig(texture.tsc); 904 texture_samplers[current_bindpoint].SyncWithConfig(texture);
894 Surface surface = res_cache.GetTextureSurface(texture, entry); 905 Surface surface = res_cache.GetTextureSurface(texture, entry);
895 if (surface != nullptr) { 906 if (surface != nullptr) {
896 state.texture_units[current_bindpoint].texture = surface->Texture().handle; 907 state.texture_units[current_bindpoint].texture = surface->Texture().handle;
@@ -996,13 +1007,13 @@ void RasterizerOpenGL::SyncStencilTestState() {
996 state.stencil.front.action_depth_pass = MaxwellToGL::StencilOp(regs.stencil_front_op_zpass); 1007 state.stencil.front.action_depth_pass = MaxwellToGL::StencilOp(regs.stencil_front_op_zpass);
997 state.stencil.front.write_mask = regs.stencil_front_mask; 1008 state.stencil.front.write_mask = regs.stencil_front_mask;
998 1009
999 state.stencil.back.test_func = MaxwellToGL::ComparisonOp(regs.stencil_back_func_func); 1010 state.stencil.back.test_func = MaxwellToGL::ComparisonOp(regs.stencil_back_func_func);
1000 state.stencil.back.test_ref = regs.stencil_back_func_ref; 1011 state.stencil.back.test_ref = regs.stencil_back_func_ref;
1001 state.stencil.back.test_mask = regs.stencil_back_func_mask; 1012 state.stencil.back.test_mask = regs.stencil_back_func_mask;
1002 state.stencil.back.action_stencil_fail = MaxwellToGL::StencilOp(regs.stencil_back_op_fail); 1013 state.stencil.back.action_stencil_fail = MaxwellToGL::StencilOp(regs.stencil_back_op_fail);
1003 state.stencil.back.action_depth_fail = MaxwellToGL::StencilOp(regs.stencil_back_op_zfail); 1014 state.stencil.back.action_depth_fail = MaxwellToGL::StencilOp(regs.stencil_back_op_zfail);
1004 state.stencil.back.action_depth_pass = MaxwellToGL::StencilOp(regs.stencil_back_op_zpass); 1015 state.stencil.back.action_depth_pass = MaxwellToGL::StencilOp(regs.stencil_back_op_zpass);
1005 state.stencil.back.write_mask = regs.stencil_back_mask; 1016 state.stencil.back.write_mask = regs.stencil_back_mask;
1006} 1017}
1007 1018
1008void RasterizerOpenGL::SyncColorMask() { 1019void RasterizerOpenGL::SyncColorMask() {
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.h b/src/video_core/renderer_opengl/gl_rasterizer.h
index 5eee5f088..aa793caf2 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer.h
+++ b/src/video_core/renderer_opengl/gl_rasterizer.h
@@ -88,7 +88,7 @@ private:
88 /// SamplerInfo struct. 88 /// SamplerInfo struct.
89 void Create(); 89 void Create();
90 /// Syncs the sampler object with the config, updating any necessary state. 90 /// Syncs the sampler object with the config, updating any necessary state.
91 void SyncWithConfig(const Tegra::Texture::TSCEntry& config); 91 void SyncWithConfig(const Tegra::Texture::FullTextureInfo& info);
92 92
93 private: 93 private:
94 Tegra::Texture::TextureFilter mag_filter; 94 Tegra::Texture::TextureFilter mag_filter;
diff --git a/src/video_core/textures/texture.h b/src/video_core/textures/texture.h
index d12d2ecb8..e199d019a 100644
--- a/src/video_core/textures/texture.h
+++ b/src/video_core/textures/texture.h
@@ -168,20 +168,29 @@ struct TICEntry {
168 168
169 // High 16 bits of the pitch value 169 // High 16 bits of the pitch value
170 BitField<0, 16, u32> pitch_high; 170 BitField<0, 16, u32> pitch_high;
171 171 BitField<26, 1, u32> use_header_opt_control;
172 BitField<27, 1, u32> depth_texture;
172 BitField<28, 4, u32> max_mip_level; 173 BitField<28, 4, u32> max_mip_level;
173 }; 174 };
174 union { 175 union {
175 BitField<0, 16, u32> width_minus_1; 176 BitField<0, 16, u32> width_minus_1;
176 BitField<22, 1, u32> srgb_conversion; 177 BitField<22, 1, u32> srgb_conversion;
177 BitField<23, 4, TextureType> texture_type; 178 BitField<23, 4, TextureType> texture_type;
179 BitField<29, 3, u32> border_size;
178 }; 180 };
179 union { 181 union {
180 BitField<0, 16, u32> height_minus_1; 182 BitField<0, 16, u32> height_minus_1;
181 BitField<16, 15, u32> depth_minus_1; 183 BitField<16, 15, u32> depth_minus_1;
182 }; 184 };
185 union {
186 BitField<6, 13, u32> mip_lod_bias;
187 BitField<27, 3, u32> max_anisotropy;
188 };
183 189
184 INSERT_PADDING_BYTES(8); 190 union {
191 BitField<0, 4, u32> res_min_mip_level;
192 BitField<4, 4, u32> res_max_mip_level;
193 };
185 194
186 GPUVAddr Address() const { 195 GPUVAddr Address() const {
187 return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low); 196 return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low);