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-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index ab77da965..976e81480 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -111,8 +111,8 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
111 ctx.pc = state->Reg[15]; 111 ctx.pc = state->Reg[15];
112 ctx.cpsr = state->Cpsr; 112 ctx.cpsr = state->Cpsr;
113 113
114 ctx.fpscr = state->VFP[1]; 114 ctx.fpscr = state->VFP[VFP_FPSCR];
115 ctx.fpexc = state->VFP[2]; 115 ctx.fpexc = state->VFP[VFP_FPEXC];
116} 116}
117 117
118void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) { 118void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
@@ -124,8 +124,8 @@ void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
124 state->Reg[15] = ctx.pc; 124 state->Reg[15] = ctx.pc;
125 state->Cpsr = ctx.cpsr; 125 state->Cpsr = ctx.cpsr;
126 126
127 state->VFP[1] = ctx.fpscr; 127 state->VFP[VFP_FPSCR] = ctx.fpscr;
128 state->VFP[2] = ctx.fpexc; 128 state->VFP[VFP_FPEXC] = ctx.fpexc;
129} 129}
130 130
131void ARM_DynCom::PrepareReschedule() { 131void ARM_DynCom::PrepareReschedule() {