diff options
Diffstat (limited to '')
9 files changed, 3 insertions, 26 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h index c9f4826ce..12afda43b 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h +++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |||
| @@ -306,7 +306,6 @@ void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | |||
| 306 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | 306 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); |
| 307 | void EmitINeg64(EmitContext& ctx, IR::Inst& inst, Register value); | 307 | void EmitINeg64(EmitContext& ctx, IR::Inst& inst, Register value); |
| 308 | void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | 308 | void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); |
| 309 | void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 310 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); | 309 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); |
| 311 | void EmitShiftLeftLogical64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base, ScalarU32 shift); | 310 | void EmitShiftLeftLogical64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base, ScalarU32 shift); |
| 312 | void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); | 311 | void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); |
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp index cea45a3e0..587bbfe06 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp | |||
| @@ -82,10 +82,6 @@ void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) { | |||
| 82 | ctx.Add("ABS.S {},{};", inst, value); | 82 | ctx.Add("ABS.S {},{};", inst, value); |
| 83 | } | 83 | } |
| 84 | 84 | ||
| 85 | void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, Register value) { | ||
| 86 | ctx.LongAdd("MOV.S64 {},|{}|;", inst, value); | ||
| 87 | } | ||
| 88 | |||
| 89 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift) { | 85 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift) { |
| 90 | ctx.Add("SHL.U {}.x,{},{};", inst, base, shift); | 86 | ctx.Add("SHL.U {}.x,{},{};", inst, base, shift); |
| 91 | } | 87 | } |
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h b/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h index 6a30785bb..5936d086f 100644 --- a/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h +++ b/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h | |||
| @@ -365,7 +365,6 @@ void EmitIMul32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::strin | |||
| 365 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 365 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
| 366 | void EmitINeg64(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 366 | void EmitINeg64(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
| 367 | void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 367 | void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
| 368 | void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, std::string_view value); | ||
| 369 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, std::string_view base, | 368 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, std::string_view base, |
| 370 | std::string_view shift); | 369 | std::string_view shift); |
| 371 | void EmitShiftLeftLogical64(EmitContext& ctx, IR::Inst& inst, std::string_view base, | 370 | void EmitShiftLeftLogical64(EmitContext& ctx, IR::Inst& inst, std::string_view base, |
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_integer.cpp b/src/shader_recompiler/backend/glsl/emit_glsl_integer.cpp index fcc9afd85..40f453593 100644 --- a/src/shader_recompiler/backend/glsl/emit_glsl_integer.cpp +++ b/src/shader_recompiler/backend/glsl/emit_glsl_integer.cpp | |||
| @@ -80,10 +80,6 @@ void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, std::string_view value) { | |||
| 80 | ctx.AddU32("{}=abs(int({}));", inst, value); | 80 | ctx.AddU32("{}=abs(int({}));", inst, value); |
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, std::string_view value) { | ||
| 84 | ctx.AddU64("{}=abs(int64_t({}));", inst, value); | ||
| 85 | } | ||
| 86 | |||
| 87 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, std::string_view base, | 83 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, std::string_view base, |
| 88 | std::string_view shift) { | 84 | std::string_view shift) { |
| 89 | ctx.AddU32("{}={}<<{};", inst, base, shift); | 85 | ctx.AddU32("{}={}<<{};", inst, base, shift); |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h index 1181e7b4f..f99c02848 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h | |||
| @@ -284,7 +284,6 @@ Id EmitIMul32(EmitContext& ctx, Id a, Id b); | |||
| 284 | Id EmitINeg32(EmitContext& ctx, Id value); | 284 | Id EmitINeg32(EmitContext& ctx, Id value); |
| 285 | Id EmitINeg64(EmitContext& ctx, Id value); | 285 | Id EmitINeg64(EmitContext& ctx, Id value); |
| 286 | Id EmitIAbs32(EmitContext& ctx, Id value); | 286 | Id EmitIAbs32(EmitContext& ctx, Id value); |
| 287 | Id EmitIAbs64(EmitContext& ctx, Id value); | ||
| 288 | Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift); | 287 | Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift); |
| 289 | Id EmitShiftLeftLogical64(EmitContext& ctx, Id base, Id shift); | 288 | Id EmitShiftLeftLogical64(EmitContext& ctx, Id base, Id shift); |
| 290 | Id EmitShiftRightLogical32(EmitContext& ctx, Id base, Id shift); | 289 | Id EmitShiftRightLogical32(EmitContext& ctx, Id base, Id shift); |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index 06ab23b1d..3501d7495 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |||
| @@ -84,10 +84,6 @@ Id EmitIAbs32(EmitContext& ctx, Id value) { | |||
| 84 | return ctx.OpSAbs(ctx.U32[1], value); | 84 | return ctx.OpSAbs(ctx.U32[1], value); |
| 85 | } | 85 | } |
| 86 | 86 | ||
| 87 | Id EmitIAbs64(EmitContext& ctx, Id value) { | ||
| 88 | return ctx.OpSAbs(ctx.U64, value); | ||
| 89 | } | ||
| 90 | |||
| 91 | Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift) { | 87 | Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift) { |
| 92 | return ctx.OpShiftLeftLogical(ctx.U32[1], base, shift); | 88 | return ctx.OpShiftLeftLogical(ctx.U32[1], base, shift); |
| 93 | } | 89 | } |
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp index 2e75208e6..13159a68d 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp +++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp | |||
| @@ -1152,15 +1152,8 @@ U32U64 IREmitter::INeg(const U32U64& value) { | |||
| 1152 | } | 1152 | } |
| 1153 | } | 1153 | } |
| 1154 | 1154 | ||
| 1155 | U32U64 IREmitter::IAbs(const U32U64& value) { | 1155 | U32 IREmitter::IAbs(const U32& value) { |
| 1156 | switch (value.Type()) { | 1156 | return Inst<U32>(Opcode::IAbs32, value); |
| 1157 | case Type::U32: | ||
| 1158 | return Inst<U32>(Opcode::IAbs32, value); | ||
| 1159 | case Type::U64: | ||
| 1160 | return Inst<U64>(Opcode::IAbs64, value); | ||
| 1161 | default: | ||
| 1162 | ThrowInvalidType(value.Type()); | ||
| 1163 | } | ||
| 1164 | } | 1157 | } |
| 1165 | 1158 | ||
| 1166 | U32U64 IREmitter::ShiftLeftLogical(const U32U64& base, const U32& shift) { | 1159 | U32U64 IREmitter::ShiftLeftLogical(const U32U64& base, const U32& shift) { |
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h index bb3500c54..53f7b3b06 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.h +++ b/src/shader_recompiler/frontend/ir/ir_emitter.h | |||
| @@ -208,7 +208,7 @@ public: | |||
| 208 | [[nodiscard]] U32U64 ISub(const U32U64& a, const U32U64& b); | 208 | [[nodiscard]] U32U64 ISub(const U32U64& a, const U32U64& b); |
| 209 | [[nodiscard]] U32 IMul(const U32& a, const U32& b); | 209 | [[nodiscard]] U32 IMul(const U32& a, const U32& b); |
| 210 | [[nodiscard]] U32U64 INeg(const U32U64& value); | 210 | [[nodiscard]] U32U64 INeg(const U32U64& value); |
| 211 | [[nodiscard]] U32U64 IAbs(const U32U64& value); | 211 | [[nodiscard]] U32 IAbs(const U32& value); |
| 212 | [[nodiscard]] U32U64 ShiftLeftLogical(const U32U64& base, const U32& shift); | 212 | [[nodiscard]] U32U64 ShiftLeftLogical(const U32U64& base, const U32& shift); |
| 213 | [[nodiscard]] U32U64 ShiftRightLogical(const U32U64& base, const U32& shift); | 213 | [[nodiscard]] U32U64 ShiftRightLogical(const U32U64& base, const U32& shift); |
| 214 | [[nodiscard]] U32U64 ShiftRightArithmetic(const U32U64& base, const U32& shift); | 214 | [[nodiscard]] U32U64 ShiftRightArithmetic(const U32U64& base, const U32& shift); |
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc index 8a8d0d759..9af750283 100644 --- a/src/shader_recompiler/frontend/ir/opcodes.inc +++ b/src/shader_recompiler/frontend/ir/opcodes.inc | |||
| @@ -289,7 +289,6 @@ OPCODE(IMul32, U32, U32, | |||
| 289 | OPCODE(INeg32, U32, U32, ) | 289 | OPCODE(INeg32, U32, U32, ) |
| 290 | OPCODE(INeg64, U64, U64, ) | 290 | OPCODE(INeg64, U64, U64, ) |
| 291 | OPCODE(IAbs32, U32, U32, ) | 291 | OPCODE(IAbs32, U32, U32, ) |
| 292 | OPCODE(IAbs64, U64, U64, ) | ||
| 293 | OPCODE(ShiftLeftLogical32, U32, U32, U32, ) | 292 | OPCODE(ShiftLeftLogical32, U32, U32, U32, ) |
| 294 | OPCODE(ShiftLeftLogical64, U64, U64, U32, ) | 293 | OPCODE(ShiftLeftLogical64, U64, U64, U32, ) |
| 295 | OPCODE(ShiftRightLogical32, U32, U32, U32, ) | 294 | OPCODE(ShiftRightLogical32, U32, U32, U32, ) |