diff options
Diffstat (limited to '')
| -rw-r--r-- | src/video_core/engines/maxwell_3d.cpp | 5 | ||||
| -rw-r--r-- | src/video_core/engines/maxwell_3d.h | 16 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer.cpp | 2 | ||||
| -rw-r--r-- | src/video_core/renderer_vulkan/fixed_pipeline_state.cpp | 1 | ||||
| -rw-r--r-- | src/video_core/renderer_vulkan/fixed_pipeline_state.h | 1 | ||||
| -rw-r--r-- | src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp | 12 |
6 files changed, 32 insertions, 5 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 4a2f2c1fd..d502d181c 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp | |||
| @@ -249,6 +249,11 @@ void Maxwell3D::ProcessMethodCall(u32 method, u32 argument, u32 nonshadow_argume | |||
| 249 | return; | 249 | return; |
| 250 | case MAXWELL3D_REG_INDEX(fragment_barrier): | 250 | case MAXWELL3D_REG_INDEX(fragment_barrier): |
| 251 | return rasterizer->FragmentBarrier(); | 251 | return rasterizer->FragmentBarrier(); |
| 252 | case MAXWELL3D_REG_INDEX(invalidate_texture_data_cache): | ||
| 253 | rasterizer->InvalidateGPUCache(); | ||
| 254 | return rasterizer->WaitForIdle(); | ||
| 255 | case MAXWELL3D_REG_INDEX(tiled_cache_barrier): | ||
| 256 | return rasterizer->TiledCacheBarrier(); | ||
| 252 | } | 257 | } |
| 253 | } | 258 | } |
| 254 | 259 | ||
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 910ab213a..34b085388 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h | |||
| @@ -707,7 +707,7 @@ public: | |||
| 707 | case Size::Size_A2_B10_G10_R10: | 707 | case Size::Size_A2_B10_G10_R10: |
| 708 | return "2_10_10_10"; | 708 | return "2_10_10_10"; |
| 709 | case Size::Size_B10_G11_R11: | 709 | case Size::Size_B10_G11_R11: |
| 710 | return "10_11_12"; | 710 | return "10_11_11"; |
| 711 | default: | 711 | default: |
| 712 | ASSERT(false); | 712 | ASSERT(false); |
| 713 | return {}; | 713 | return {}; |
| @@ -2639,7 +2639,7 @@ public: | |||
| 2639 | L2CacheControl l2_cache_control; ///< 0x0218 | 2639 | L2CacheControl l2_cache_control; ///< 0x0218 |
| 2640 | InvalidateShaderCache invalidate_shader_cache; ///< 0x021C | 2640 | InvalidateShaderCache invalidate_shader_cache; ///< 0x021C |
| 2641 | INSERT_PADDING_BYTES_NOINIT(0xA8); | 2641 | INSERT_PADDING_BYTES_NOINIT(0xA8); |
| 2642 | SyncInfo sync_info; ///< 0x02C8 | 2642 | SyncInfo sync_info; ///< 0x02C8 |
| 2643 | INSERT_PADDING_BYTES_NOINIT(0x4); | 2643 | INSERT_PADDING_BYTES_NOINIT(0x4); |
| 2644 | u32 prim_circular_buffer_throttle; ///< 0x02D0 | 2644 | u32 prim_circular_buffer_throttle; ///< 0x02D0 |
| 2645 | u32 flush_invalidate_rop_mini_cache; ///< 0x02D4 | 2645 | u32 flush_invalidate_rop_mini_cache; ///< 0x02D4 |
| @@ -2731,7 +2731,11 @@ public: | |||
| 2731 | s32 stencil_back_ref; ///< 0x0F54 | 2731 | s32 stencil_back_ref; ///< 0x0F54 |
| 2732 | u32 stencil_back_mask; ///< 0x0F58 | 2732 | u32 stencil_back_mask; ///< 0x0F58 |
| 2733 | u32 stencil_back_func_mask; ///< 0x0F5C | 2733 | u32 stencil_back_func_mask; ///< 0x0F5C |
| 2734 | INSERT_PADDING_BYTES_NOINIT(0x24); | 2734 | INSERT_PADDING_BYTES_NOINIT(0x14); |
| 2735 | u32 invalidate_texture_data_cache; ///< 0x0F74 Assumed - Not in official docs. | ||
| 2736 | INSERT_PADDING_BYTES_NOINIT(0x4); | ||
| 2737 | u32 tiled_cache_barrier; ///< 0x0F7C Assumed - Not in official docs. | ||
| 2738 | INSERT_PADDING_BYTES_NOINIT(0x4); | ||
| 2735 | VertexStreamSubstitute vertex_stream_substitute; ///< 0x0F84 | 2739 | VertexStreamSubstitute vertex_stream_substitute; ///< 0x0F84 |
| 2736 | u32 line_mode_clip_generated_edge_do_not_draw; ///< 0x0F8C | 2740 | u32 line_mode_clip_generated_edge_do_not_draw; ///< 0x0F8C |
| 2737 | u32 color_mask_common; ///< 0x0F90 | 2741 | u32 color_mask_common; ///< 0x0F90 |
| @@ -2791,7 +2795,8 @@ public: | |||
| 2791 | FillViaTriangleMode fill_via_triangle_mode; ///< 0x113C | 2795 | FillViaTriangleMode fill_via_triangle_mode; ///< 0x113C |
| 2792 | u32 blend_per_format_snorm8_unorm16_snorm16_enabled; ///< 0x1140 | 2796 | u32 blend_per_format_snorm8_unorm16_snorm16_enabled; ///< 0x1140 |
| 2793 | u32 flush_pending_writes_sm_gloal_store; ///< 0x1144 | 2797 | u32 flush_pending_writes_sm_gloal_store; ///< 0x1144 |
| 2794 | INSERT_PADDING_BYTES_NOINIT(0x18); | 2798 | u32 conservative_raster_enable; ///< 0x1148 Assumed - Not in official docs. |
| 2799 | INSERT_PADDING_BYTES_NOINIT(0x14); | ||
| 2795 | std::array<VertexAttribute, NumVertexAttributes> vertex_attrib_format; ///< 0x1160 | 2800 | std::array<VertexAttribute, NumVertexAttributes> vertex_attrib_format; ///< 0x1160 |
| 2796 | std::array<MsaaSampleLocation, 4> multisample_sample_locations; ///< 0x11E0 | 2801 | std::array<MsaaSampleLocation, 4> multisample_sample_locations; ///< 0x11E0 |
| 2797 | u32 offset_render_target_index_by_viewport_index; ///< 0x11F0 | 2802 | u32 offset_render_target_index_by_viewport_index; ///< 0x11F0 |
| @@ -3287,6 +3292,8 @@ ASSERT_REG_POSITION(const_color_rendering, 0x0F40); | |||
| 3287 | ASSERT_REG_POSITION(stencil_back_ref, 0x0F54); | 3292 | ASSERT_REG_POSITION(stencil_back_ref, 0x0F54); |
| 3288 | ASSERT_REG_POSITION(stencil_back_mask, 0x0F58); | 3293 | ASSERT_REG_POSITION(stencil_back_mask, 0x0F58); |
| 3289 | ASSERT_REG_POSITION(stencil_back_func_mask, 0x0F5C); | 3294 | ASSERT_REG_POSITION(stencil_back_func_mask, 0x0F5C); |
| 3295 | ASSERT_REG_POSITION(invalidate_texture_data_cache, 0x0F74); | ||
| 3296 | ASSERT_REG_POSITION(tiled_cache_barrier, 0x0F7C); | ||
| 3290 | ASSERT_REG_POSITION(vertex_stream_substitute, 0x0F84); | 3297 | ASSERT_REG_POSITION(vertex_stream_substitute, 0x0F84); |
| 3291 | ASSERT_REG_POSITION(line_mode_clip_generated_edge_do_not_draw, 0x0F8C); | 3298 | ASSERT_REG_POSITION(line_mode_clip_generated_edge_do_not_draw, 0x0F8C); |
| 3292 | ASSERT_REG_POSITION(color_mask_common, 0x0F90); | 3299 | ASSERT_REG_POSITION(color_mask_common, 0x0F90); |
| @@ -3343,6 +3350,7 @@ ASSERT_REG_POSITION(post_ps_use_pre_ps_coverage, 0x1138); | |||
| 3343 | ASSERT_REG_POSITION(fill_via_triangle_mode, 0x113C); | 3350 | ASSERT_REG_POSITION(fill_via_triangle_mode, 0x113C); |
| 3344 | ASSERT_REG_POSITION(blend_per_format_snorm8_unorm16_snorm16_enabled, 0x1140); | 3351 | ASSERT_REG_POSITION(blend_per_format_snorm8_unorm16_snorm16_enabled, 0x1140); |
| 3345 | ASSERT_REG_POSITION(flush_pending_writes_sm_gloal_store, 0x1144); | 3352 | ASSERT_REG_POSITION(flush_pending_writes_sm_gloal_store, 0x1144); |
| 3353 | ASSERT_REG_POSITION(conservative_raster_enable, 0x1148); | ||
| 3346 | ASSERT_REG_POSITION(vertex_attrib_format, 0x1160); | 3354 | ASSERT_REG_POSITION(vertex_attrib_format, 0x1160); |
| 3347 | ASSERT_REG_POSITION(multisample_sample_locations, 0x11E0); | 3355 | ASSERT_REG_POSITION(multisample_sample_locations, 0x11E0); |
| 3348 | ASSERT_REG_POSITION(offset_render_target_index_by_viewport_index, 0x11F0); | 3356 | ASSERT_REG_POSITION(offset_render_target_index_by_viewport_index, 0x11F0); |
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp index 8a8b5ce54..d05a5f60b 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp | |||
| @@ -770,7 +770,7 @@ void RasterizerOpenGL::SyncStencilTestState() { | |||
| 770 | 770 | ||
| 771 | if (regs.stencil_two_side_enable) { | 771 | if (regs.stencil_two_side_enable) { |
| 772 | glStencilFuncSeparate(GL_BACK, MaxwellToGL::ComparisonOp(regs.stencil_back_op.func), | 772 | glStencilFuncSeparate(GL_BACK, MaxwellToGL::ComparisonOp(regs.stencil_back_op.func), |
| 773 | regs.stencil_back_ref, regs.stencil_back_mask); | 773 | regs.stencil_back_ref, regs.stencil_back_func_mask); |
| 774 | glStencilOpSeparate(GL_BACK, MaxwellToGL::StencilOp(regs.stencil_back_op.fail), | 774 | glStencilOpSeparate(GL_BACK, MaxwellToGL::StencilOp(regs.stencil_back_op.fail), |
| 775 | MaxwellToGL::StencilOp(regs.stencil_back_op.zfail), | 775 | MaxwellToGL::StencilOp(regs.stencil_back_op.zfail), |
| 776 | MaxwellToGL::StencilOp(regs.stencil_back_op.zpass)); | 776 | MaxwellToGL::StencilOp(regs.stencil_back_op.zpass)); |
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp index f85ed8e5b..98cc26679 100644 --- a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp +++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp | |||
| @@ -90,6 +90,7 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d, | |||
| 90 | depth_format.Assign(static_cast<u32>(regs.zeta.format)); | 90 | depth_format.Assign(static_cast<u32>(regs.zeta.format)); |
| 91 | y_negate.Assign(regs.window_origin.mode != Maxwell::WindowOrigin::Mode::UpperLeft ? 1 : 0); | 91 | y_negate.Assign(regs.window_origin.mode != Maxwell::WindowOrigin::Mode::UpperLeft ? 1 : 0); |
| 92 | provoking_vertex_last.Assign(regs.provoking_vertex == Maxwell::ProvokingVertex::Last ? 1 : 0); | 92 | provoking_vertex_last.Assign(regs.provoking_vertex == Maxwell::ProvokingVertex::Last ? 1 : 0); |
| 93 | conservative_raster_enable.Assign(regs.conservative_raster_enable != 0 ? 1 : 0); | ||
| 93 | smooth_lines.Assign(regs.line_anti_alias_enable != 0 ? 1 : 0); | 94 | smooth_lines.Assign(regs.line_anti_alias_enable != 0 ? 1 : 0); |
| 94 | 95 | ||
| 95 | for (size_t i = 0; i < regs.rt.size(); ++i) { | 96 | for (size_t i = 0; i < regs.rt.size(); ++i) { |
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.h b/src/video_core/renderer_vulkan/fixed_pipeline_state.h index 43441209c..1afdef329 100644 --- a/src/video_core/renderer_vulkan/fixed_pipeline_state.h +++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.h | |||
| @@ -193,6 +193,7 @@ struct FixedPipelineState { | |||
| 193 | BitField<6, 5, u32> depth_format; | 193 | BitField<6, 5, u32> depth_format; |
| 194 | BitField<11, 1, u32> y_negate; | 194 | BitField<11, 1, u32> y_negate; |
| 195 | BitField<12, 1, u32> provoking_vertex_last; | 195 | BitField<12, 1, u32> provoking_vertex_last; |
| 196 | BitField<13, 1, u32> conservative_raster_enable; | ||
| 196 | BitField<14, 1, u32> smooth_lines; | 197 | BitField<14, 1, u32> smooth_lines; |
| 197 | }; | 198 | }; |
| 198 | std::array<u8, Maxwell::NumRenderTargets> color_formats; | 199 | std::array<u8, Maxwell::NumRenderTargets> color_formats; |
diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp index 1aa116cea..ef75c126c 100644 --- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp +++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp | |||
| @@ -680,6 +680,15 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) { | |||
| 680 | .lineStippleFactor = 0, | 680 | .lineStippleFactor = 0, |
| 681 | .lineStipplePattern = 0, | 681 | .lineStipplePattern = 0, |
| 682 | }; | 682 | }; |
| 683 | VkPipelineRasterizationConservativeStateCreateInfoEXT conservative_raster{ | ||
| 684 | .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_CONSERVATIVE_STATE_CREATE_INFO_EXT, | ||
| 685 | .pNext = nullptr, | ||
| 686 | .flags = 0, | ||
| 687 | .conservativeRasterizationMode = key.state.conservative_raster_enable != 0 | ||
| 688 | ? VK_CONSERVATIVE_RASTERIZATION_MODE_OVERESTIMATE_EXT | ||
| 689 | : VK_CONSERVATIVE_RASTERIZATION_MODE_DISABLED_EXT, | ||
| 690 | .extraPrimitiveOverestimationSize = 0.0f, | ||
| 691 | }; | ||
| 683 | VkPipelineRasterizationProvokingVertexStateCreateInfoEXT provoking_vertex{ | 692 | VkPipelineRasterizationProvokingVertexStateCreateInfoEXT provoking_vertex{ |
| 684 | .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_PROVOKING_VERTEX_STATE_CREATE_INFO_EXT, | 693 | .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_PROVOKING_VERTEX_STATE_CREATE_INFO_EXT, |
| 685 | .pNext = nullptr, | 694 | .pNext = nullptr, |
| @@ -690,6 +699,9 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) { | |||
| 690 | if (IsLine(input_assembly_topology) && device.IsExtLineRasterizationSupported()) { | 699 | if (IsLine(input_assembly_topology) && device.IsExtLineRasterizationSupported()) { |
| 691 | line_state.pNext = std::exchange(rasterization_ci.pNext, &line_state); | 700 | line_state.pNext = std::exchange(rasterization_ci.pNext, &line_state); |
| 692 | } | 701 | } |
| 702 | if (device.IsExtConservativeRasterizationSupported()) { | ||
| 703 | conservative_raster.pNext = std::exchange(rasterization_ci.pNext, &conservative_raster); | ||
| 704 | } | ||
| 693 | if (device.IsExtProvokingVertexSupported()) { | 705 | if (device.IsExtProvokingVertexSupported()) { |
| 694 | provoking_vertex.pNext = std::exchange(rasterization_ci.pNext, &provoking_vertex); | 706 | provoking_vertex.pNext = std::exchange(rasterization_ci.pNext, &provoking_vertex); |
| 695 | } | 707 | } |