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authorGravatar bunnei2018-06-15 22:04:03 -0400
committerGravatar GitHub2018-06-15 22:04:03 -0400
commitfb5bd0920db68eb65c1d57bcf5f10ca0d55e4a4a (patch)
tree1ae606b3dceb2edee147e2199aabfe5f226e4a9d /src
parentMerge pull request #566 from bunnei/set_pos_w (diff)
parentgl_shader_decompiler: Implement LOP32I LogicOperation PassB. (diff)
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Merge pull request #564 from bunnei/lop32i_passb
gl_shader_decompiler: Implement LOP32I LogicOperation PassB.
Diffstat (limited to 'src')
-rw-r--r--src/video_core/renderer_opengl/gl_shader_decompiler.cpp18
1 files changed, 12 insertions, 6 deletions
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
index 7ce150fda..9093eca32 100644
--- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
@@ -930,20 +930,26 @@ private:
930 if (instr.alu.lop.invert_b) 930 if (instr.alu.lop.invert_b)
931 imm = ~imm; 931 imm = ~imm;
932 932
933 std::string op_b = std::to_string(imm);
934
933 switch (instr.alu.lop.operation) { 935 switch (instr.alu.lop.operation) {
934 case Tegra::Shader::LogicOperation::And: { 936 case Tegra::Shader::LogicOperation::And: {
935 regs.SetRegisterToInteger(instr.gpr0, true, 0, 937 regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " & " + op_b + ')',
936 '(' + op_a + " & " + std::to_string(imm) + ')', 1, 1); 938 1, 1);
937 break; 939 break;
938 } 940 }
939 case Tegra::Shader::LogicOperation::Or: { 941 case Tegra::Shader::LogicOperation::Or: {
940 regs.SetRegisterToInteger(instr.gpr0, true, 0, 942 regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " | " + op_b + ')',
941 '(' + op_a + " | " + std::to_string(imm) + ')', 1, 1); 943 1, 1);
942 break; 944 break;
943 } 945 }
944 case Tegra::Shader::LogicOperation::Xor: { 946 case Tegra::Shader::LogicOperation::Xor: {
945 regs.SetRegisterToInteger(instr.gpr0, true, 0, 947 regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " ^ " + op_b + ')',
946 '(' + op_a + " ^ " + std::to_string(imm) + ')', 1, 1); 948 1, 1);
949 break;
950 }
951 case Tegra::Shader::LogicOperation::PassB: {
952 regs.SetRegisterToInteger(instr.gpr0, true, 0, op_b, 1, 1);
947 break; 953 break;
948 } 954 }
949 default: 955 default: