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| author | 2019-12-08 22:28:25 -0500 | |
|---|---|---|
| committer | 2019-12-08 22:28:25 -0500 | |
| commit | faf5ae6a507329dc702428e42d2cf60ee632aac0 (patch) | |
| tree | f81728990fd4a73ec4d6db9e0215459fbe2a494f /src | |
| parent | Merge pull request #3204 from ReinUsesLisp/vulkan-headers (diff) | |
| parent | maxwell_3d: Add tessellation tess level registers (diff) | |
| download | yuzu-faf5ae6a507329dc702428e42d2cf60ee632aac0.tar.gz yuzu-faf5ae6a507329dc702428e42d2cf60ee632aac0.tar.xz yuzu-faf5ae6a507329dc702428e42d2cf60ee632aac0.zip | |
Merge pull request #3198 from ReinUsesLisp/tessellation-maxwell
maxwell_3d: Add tessellation state entries
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/engines/maxwell_3d.h | 39 |
1 files changed, 37 insertions, 2 deletions
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 4cb7339b5..dcc7cd1fe 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h | |||
| @@ -491,6 +491,23 @@ public: | |||
| 491 | INSERT_UNION_PADDING_WORDS(1); | 491 | INSERT_UNION_PADDING_WORDS(1); |
| 492 | }; | 492 | }; |
| 493 | 493 | ||
| 494 | enum class DepthMode : u32 { | ||
| 495 | MinusOneToOne = 0, | ||
| 496 | ZeroToOne = 1, | ||
| 497 | }; | ||
| 498 | |||
| 499 | enum class TessellationPrimitive : u32 { | ||
| 500 | Isolines = 0, | ||
| 501 | Triangles = 1, | ||
| 502 | Quads = 2, | ||
| 503 | }; | ||
| 504 | |||
| 505 | enum class TessellationSpacing : u32 { | ||
| 506 | Equal = 0, | ||
| 507 | FractionalOdd = 1, | ||
| 508 | FractionalEven = 2, | ||
| 509 | }; | ||
| 510 | |||
| 494 | struct RenderTargetConfig { | 511 | struct RenderTargetConfig { |
| 495 | u32 address_high; | 512 | u32 address_high; |
| 496 | u32 address_low; | 513 | u32 address_low; |
| @@ -628,7 +645,19 @@ public: | |||
| 628 | }; | 645 | }; |
| 629 | } sync_info; | 646 | } sync_info; |
| 630 | 647 | ||
| 631 | INSERT_UNION_PADDING_WORDS(0x11E); | 648 | INSERT_UNION_PADDING_WORDS(0x15); |
| 649 | |||
| 650 | union { | ||
| 651 | BitField<0, 2, TessellationPrimitive> prim; | ||
| 652 | BitField<4, 2, TessellationSpacing> spacing; | ||
| 653 | BitField<8, 1, u32> cw; | ||
| 654 | BitField<9, 1, u32> connected; | ||
| 655 | } tess_mode; | ||
| 656 | |||
| 657 | std::array<f32, 4> tess_level_outer; | ||
| 658 | std::array<f32, 2> tess_level_inner; | ||
| 659 | |||
| 660 | INSERT_UNION_PADDING_WORDS(0x102); | ||
| 632 | 661 | ||
| 633 | u32 tfb_enabled; | 662 | u32 tfb_enabled; |
| 634 | 663 | ||
| @@ -662,7 +691,9 @@ public: | |||
| 662 | u32 polygon_offset_line_enable; | 691 | u32 polygon_offset_line_enable; |
| 663 | u32 polygon_offset_fill_enable; | 692 | u32 polygon_offset_fill_enable; |
| 664 | 693 | ||
| 665 | INSERT_UNION_PADDING_WORDS(0xD); | 694 | u32 patch_vertices; |
| 695 | |||
| 696 | INSERT_UNION_PADDING_WORDS(0xC); | ||
| 666 | 697 | ||
| 667 | std::array<ScissorTest, NumViewports> scissor_test; | 698 | std::array<ScissorTest, NumViewports> scissor_test; |
| 668 | 699 | ||
| @@ -1386,6 +1417,9 @@ ASSERT_REG_POSITION(upload, 0x60); | |||
| 1386 | ASSERT_REG_POSITION(exec_upload, 0x6C); | 1417 | ASSERT_REG_POSITION(exec_upload, 0x6C); |
| 1387 | ASSERT_REG_POSITION(data_upload, 0x6D); | 1418 | ASSERT_REG_POSITION(data_upload, 0x6D); |
| 1388 | ASSERT_REG_POSITION(sync_info, 0xB2); | 1419 | ASSERT_REG_POSITION(sync_info, 0xB2); |
| 1420 | ASSERT_REG_POSITION(tess_mode, 0xC8); | ||
| 1421 | ASSERT_REG_POSITION(tess_level_outer, 0xC9); | ||
| 1422 | ASSERT_REG_POSITION(tess_level_inner, 0xCD); | ||
| 1389 | ASSERT_REG_POSITION(tfb_enabled, 0x1D1); | 1423 | ASSERT_REG_POSITION(tfb_enabled, 0x1D1); |
| 1390 | ASSERT_REG_POSITION(rt, 0x200); | 1424 | ASSERT_REG_POSITION(rt, 0x200); |
| 1391 | ASSERT_REG_POSITION(viewport_transform, 0x280); | 1425 | ASSERT_REG_POSITION(viewport_transform, 0x280); |
| @@ -1397,6 +1431,7 @@ ASSERT_REG_POSITION(clear_stencil, 0x368); | |||
| 1397 | ASSERT_REG_POSITION(polygon_offset_point_enable, 0x370); | 1431 | ASSERT_REG_POSITION(polygon_offset_point_enable, 0x370); |
| 1398 | ASSERT_REG_POSITION(polygon_offset_line_enable, 0x371); | 1432 | ASSERT_REG_POSITION(polygon_offset_line_enable, 0x371); |
| 1399 | ASSERT_REG_POSITION(polygon_offset_fill_enable, 0x372); | 1433 | ASSERT_REG_POSITION(polygon_offset_fill_enable, 0x372); |
| 1434 | ASSERT_REG_POSITION(patch_vertices, 0x373); | ||
| 1400 | ASSERT_REG_POSITION(scissor_test, 0x380); | 1435 | ASSERT_REG_POSITION(scissor_test, 0x380); |
| 1401 | ASSERT_REG_POSITION(stencil_back_func_ref, 0x3D5); | 1436 | ASSERT_REG_POSITION(stencil_back_func_ref, 0x3D5); |
| 1402 | ASSERT_REG_POSITION(stencil_back_func_mask, 0x3D6); | 1437 | ASSERT_REG_POSITION(stencil_back_func_mask, 0x3D6); |