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authorGravatar bunnei2019-08-29 12:58:43 -0400
committerGravatar GitHub2019-08-29 12:58:43 -0400
commitf8cc5668f80d0c63f5ce850286760807462e1d72 (patch)
tree8856d97bfb22f9cc9c726e7020de051a9deef178 /src
parentMerge pull request #2786 from ReinUsesLisp/vote (diff)
parentshader/decode: Implement S2R Tic (diff)
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Merge pull request #2758 from ReinUsesLisp/packed-tid
shader/decode: Implement S2R Tic
Diffstat (limited to 'src')
-rw-r--r--src/video_core/shader/decode/other.cpp7
-rw-r--r--src/video_core/shader/shader_ir.cpp5
-rw-r--r--src/video_core/shader/shader_ir.h3
3 files changed, 15 insertions, 0 deletions
diff --git a/src/video_core/shader/decode/other.cpp b/src/video_core/shader/decode/other.cpp
index ac0e764d6..d46e0f823 100644
--- a/src/video_core/shader/decode/other.cpp
+++ b/src/video_core/shader/decode/other.cpp
@@ -74,6 +74,13 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
74 case SystemVariable::InvocationInfo: 74 case SystemVariable::InvocationInfo:
75 LOG_WARNING(HW_GPU, "MOV_SYS instruction with InvocationInfo is incomplete"); 75 LOG_WARNING(HW_GPU, "MOV_SYS instruction with InvocationInfo is incomplete");
76 return Immediate(0u); 76 return Immediate(0u);
77 case SystemVariable::Tid: {
78 Node value = Immediate(0);
79 value = BitfieldInsert(value, Operation(OperationCode::LocalInvocationIdX), 0, 9);
80 value = BitfieldInsert(value, Operation(OperationCode::LocalInvocationIdY), 16, 9);
81 value = BitfieldInsert(value, Operation(OperationCode::LocalInvocationIdZ), 26, 5);
82 return value;
83 }
77 case SystemVariable::TidX: 84 case SystemVariable::TidX:
78 return Operation(OperationCode::LocalInvocationIdX); 85 return Operation(OperationCode::LocalInvocationIdX);
79 case SystemVariable::TidY: 86 case SystemVariable::TidY:
diff --git a/src/video_core/shader/shader_ir.cpp b/src/video_core/shader/shader_ir.cpp
index 5e91fe129..1e5c7f660 100644
--- a/src/video_core/shader/shader_ir.cpp
+++ b/src/video_core/shader/shader_ir.cpp
@@ -405,4 +405,9 @@ Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) {
405 Immediate(offset), Immediate(bits)); 405 Immediate(offset), Immediate(bits));
406} 406}
407 407
408Node ShaderIR::BitfieldInsert(Node base, Node insert, u32 offset, u32 bits) {
409 return Operation(OperationCode::UBitfieldInsert, NO_PRECISE, base, insert, Immediate(offset),
410 Immediate(bits));
411}
412
408} // namespace VideoCommon::Shader 413} // namespace VideoCommon::Shader
diff --git a/src/video_core/shader/shader_ir.h b/src/video_core/shader/shader_ir.h
index 99d06ff4a..bcc9b79b6 100644
--- a/src/video_core/shader/shader_ir.h
+++ b/src/video_core/shader/shader_ir.h
@@ -280,6 +280,9 @@ private:
280 /// Extracts a sequence of bits from a node 280 /// Extracts a sequence of bits from a node
281 Node BitfieldExtract(Node value, u32 offset, u32 bits); 281 Node BitfieldExtract(Node value, u32 offset, u32 bits);
282 282
283 /// Inserts a sequence of bits from a node
284 Node BitfieldInsert(Node base, Node insert, u32 offset, u32 bits);
285
283 void WriteTexInstructionFloat(NodeBlock& bb, Tegra::Shader::Instruction instr, 286 void WriteTexInstructionFloat(NodeBlock& bb, Tegra::Shader::Instruction instr,
284 const Node4& components); 287 const Node4& components);
285 288