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authorGravatar ReinUsesLisp2020-03-02 01:54:00 -0300
committerGravatar ReinUsesLisp2020-03-09 18:40:53 -0300
commiteb5861e0a22851cd2b2ca38136bfc7870790836e (patch)
tree2af932e6d3d4b7992b342576788fbab62cf94a36 /src
parentshader/registry: Address feedback (diff)
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engines/maxwell_3d: Add TFB registers and store them in shader registry
Diffstat (limited to 'src')
-rw-r--r--src/video_core/engines/maxwell_3d.h34
-rw-r--r--src/video_core/renderer_opengl/gl_shader_disk_cache.cpp2
-rw-r--r--src/video_core/shader/registry.cpp3
-rw-r--r--src/video_core/shader/registry.h12
4 files changed, 45 insertions, 6 deletions
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 491cff370..7000b0589 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -67,6 +67,7 @@ public:
67 static constexpr std::size_t NumVaryings = 31; 67 static constexpr std::size_t NumVaryings = 31;
68 static constexpr std::size_t NumImages = 8; // TODO(Rodrigo): Investigate this number 68 static constexpr std::size_t NumImages = 8; // TODO(Rodrigo): Investigate this number
69 static constexpr std::size_t NumClipDistances = 8; 69 static constexpr std::size_t NumClipDistances = 8;
70 static constexpr std::size_t NumTransformFeedbackBuffers = 4;
70 static constexpr std::size_t MaxShaderProgram = 6; 71 static constexpr std::size_t MaxShaderProgram = 6;
71 static constexpr std::size_t MaxShaderStage = 5; 72 static constexpr std::size_t MaxShaderStage = 5;
72 // Maximum number of const buffers per shader stage. 73 // Maximum number of const buffers per shader stage.
@@ -621,6 +622,22 @@ public:
621 float depth_range_far; 622 float depth_range_far;
622 }; 623 };
623 624
625 struct alignas(32) TransformFeedbackBinding {
626 u32 buffer_enable;
627 u32 address_high;
628 u32 address_low;
629 s32 buffer_size;
630 s32 buffer_offset;
631 };
632 static_assert(sizeof(TransformFeedbackBinding) == 32);
633
634 struct alignas(16) TransformFeedbackLayout {
635 u32 stream;
636 u32 varying_count;
637 u32 stride;
638 };
639 static_assert(sizeof(TransformFeedbackLayout) == 16);
640
624 bool IsShaderConfigEnabled(std::size_t index) const { 641 bool IsShaderConfigEnabled(std::size_t index) const {
625 // The VertexB is always enabled. 642 // The VertexB is always enabled.
626 if (index == static_cast<std::size_t>(Regs::ShaderProgram::VertexB)) { 643 if (index == static_cast<std::size_t>(Regs::ShaderProgram::VertexB)) {
@@ -677,7 +694,13 @@ public:
677 694
678 u32 rasterize_enable; 695 u32 rasterize_enable;
679 696
680 INSERT_UNION_PADDING_WORDS(0xF1); 697 std::array<TransformFeedbackBinding, NumTransformFeedbackBuffers> tfb_bindings;
698
699 INSERT_UNION_PADDING_WORDS(0xC0);
700
701 std::array<TransformFeedbackLayout, NumTransformFeedbackBuffers> tfb_layouts;
702
703 INSERT_UNION_PADDING_WORDS(0x1);
681 704
682 u32 tfb_enabled; 705 u32 tfb_enabled;
683 706
@@ -1187,7 +1210,11 @@ public:
1187 1210
1188 u32 tex_cb_index; 1211 u32 tex_cb_index;
1189 1212
1190 INSERT_UNION_PADDING_WORDS(0x395); 1213 INSERT_UNION_PADDING_WORDS(0x7D);
1214
1215 std::array<std::array<u8, 128>, NumTransformFeedbackBuffers> tfb_varying_locs;
1216
1217 INSERT_UNION_PADDING_WORDS(0x298);
1191 1218
1192 struct { 1219 struct {
1193 /// Compressed address of a buffer that holds information about bound SSBOs. 1220 /// Compressed address of a buffer that holds information about bound SSBOs.
@@ -1413,6 +1440,8 @@ ASSERT_REG_POSITION(tess_mode, 0xC8);
1413ASSERT_REG_POSITION(tess_level_outer, 0xC9); 1440ASSERT_REG_POSITION(tess_level_outer, 0xC9);
1414ASSERT_REG_POSITION(tess_level_inner, 0xCD); 1441ASSERT_REG_POSITION(tess_level_inner, 0xCD);
1415ASSERT_REG_POSITION(rasterize_enable, 0xDF); 1442ASSERT_REG_POSITION(rasterize_enable, 0xDF);
1443ASSERT_REG_POSITION(tfb_bindings, 0xE0);
1444ASSERT_REG_POSITION(tfb_layouts, 0x1C0);
1416ASSERT_REG_POSITION(tfb_enabled, 0x1D1); 1445ASSERT_REG_POSITION(tfb_enabled, 0x1D1);
1417ASSERT_REG_POSITION(rt, 0x200); 1446ASSERT_REG_POSITION(rt, 0x200);
1418ASSERT_REG_POSITION(viewport_transform, 0x280); 1447ASSERT_REG_POSITION(viewport_transform, 0x280);
@@ -1508,6 +1537,7 @@ ASSERT_REG_POSITION(firmware, 0x8C0);
1508ASSERT_REG_POSITION(const_buffer, 0x8E0); 1537ASSERT_REG_POSITION(const_buffer, 0x8E0);
1509ASSERT_REG_POSITION(cb_bind[0], 0x904); 1538ASSERT_REG_POSITION(cb_bind[0], 0x904);
1510ASSERT_REG_POSITION(tex_cb_index, 0x982); 1539ASSERT_REG_POSITION(tex_cb_index, 0x982);
1540ASSERT_REG_POSITION(tfb_varying_locs, 0xA00);
1511ASSERT_REG_POSITION(ssbo_info, 0xD18); 1541ASSERT_REG_POSITION(ssbo_info, 0xD18);
1512ASSERT_REG_POSITION(tex_info_buffers.address[0], 0xD2A); 1542ASSERT_REG_POSITION(tex_info_buffers.address[0], 0xD2A);
1513ASSERT_REG_POSITION(tex_info_buffers.size[0], 0xD2F); 1543ASSERT_REG_POSITION(tex_info_buffers.size[0], 0xD2F);
diff --git a/src/video_core/renderer_opengl/gl_shader_disk_cache.cpp b/src/video_core/renderer_opengl/gl_shader_disk_cache.cpp
index 3b0db5393..9e95a122b 100644
--- a/src/video_core/renderer_opengl/gl_shader_disk_cache.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_disk_cache.cpp
@@ -48,7 +48,7 @@ struct BindlessSamplerKey {
48 Tegra::Engines::SamplerDescriptor sampler; 48 Tegra::Engines::SamplerDescriptor sampler;
49}; 49};
50 50
51constexpr u32 NativeVersion = 19; 51constexpr u32 NativeVersion = 20;
52 52
53ShaderCacheVersionHash GetShaderCacheVersionHash() { 53ShaderCacheVersionHash GetShaderCacheVersionHash() {
54 ShaderCacheVersionHash hash{}; 54 ShaderCacheVersionHash hash{};
diff --git a/src/video_core/shader/registry.cpp b/src/video_core/shader/registry.cpp
index 4a1e16c1e..af70b3f35 100644
--- a/src/video_core/shader/registry.cpp
+++ b/src/video_core/shader/registry.cpp
@@ -27,9 +27,12 @@ GraphicsInfo MakeGraphicsInfo(ShaderType shader_stage, ConstBufferEngineInterfac
27 auto& graphics = static_cast<Tegra::Engines::Maxwell3D&>(engine); 27 auto& graphics = static_cast<Tegra::Engines::Maxwell3D&>(engine);
28 28
29 GraphicsInfo info; 29 GraphicsInfo info;
30 info.tfb_layouts = graphics.regs.tfb_layouts;
31 info.tfb_varying_locs = graphics.regs.tfb_varying_locs;
30 info.primitive_topology = graphics.regs.draw.topology; 32 info.primitive_topology = graphics.regs.draw.topology;
31 info.tessellation_primitive = graphics.regs.tess_mode.prim; 33 info.tessellation_primitive = graphics.regs.tess_mode.prim;
32 info.tessellation_spacing = graphics.regs.tess_mode.spacing; 34 info.tessellation_spacing = graphics.regs.tess_mode.spacing;
35 info.tfb_enabled = graphics.regs.tfb_enabled;
33 info.tessellation_clockwise = graphics.regs.tess_mode.cw; 36 info.tessellation_clockwise = graphics.regs.tess_mode.cw;
34 return info; 37 return info;
35} 38}
diff --git a/src/video_core/shader/registry.h b/src/video_core/shader/registry.h
index 07998c4db..0c80d35fd 100644
--- a/src/video_core/shader/registry.h
+++ b/src/video_core/shader/registry.h
@@ -25,9 +25,15 @@ using BindlessSamplerMap =
25 std::unordered_map<std::pair<u32, u32>, Tegra::Engines::SamplerDescriptor, Common::PairHash>; 25 std::unordered_map<std::pair<u32, u32>, Tegra::Engines::SamplerDescriptor, Common::PairHash>;
26 26
27struct GraphicsInfo { 27struct GraphicsInfo {
28 Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology primitive_topology{}; 28 using Maxwell = Tegra::Engines::Maxwell3D::Regs;
29 Tegra::Engines::Maxwell3D::Regs::TessellationPrimitive tessellation_primitive{}; 29
30 Tegra::Engines::Maxwell3D::Regs::TessellationSpacing tessellation_spacing{}; 30 std::array<Maxwell::TransformFeedbackLayout, Maxwell::NumTransformFeedbackBuffers>
31 tfb_layouts{};
32 std::array<std::array<u8, 128>, Maxwell::NumTransformFeedbackBuffers> tfb_varying_locs{};
33 Maxwell::PrimitiveTopology primitive_topology{};
34 Maxwell::TessellationPrimitive tessellation_primitive{};
35 Maxwell::TessellationSpacing tessellation_spacing{};
36 bool tfb_enabled = false;
31 bool tessellation_clockwise = false; 37 bool tessellation_clockwise = false;
32}; 38};
33static_assert(std::is_trivially_copyable_v<GraphicsInfo> && 39static_assert(std::is_trivially_copyable_v<GraphicsInfo> &&