summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorGravatar Subv2018-06-18 19:50:35 -0500
committerGravatar Subv2018-06-18 19:50:35 -0500
commiteab7457c00e4ab21ea2533441de03ff9cdda5ff3 (patch)
treef187d57807adbca8cbf87f3d2fe9915f06b09224 /src
parentMerge pull request #570 from bunnei/astc (diff)
downloadyuzu-eab7457c00e4ab21ea2533441de03ff9cdda5ff3.tar.gz
yuzu-eab7457c00e4ab21ea2533441de03ff9cdda5ff3.tar.xz
yuzu-eab7457c00e4ab21ea2533441de03ff9cdda5ff3.zip
GPU: Don't mark uniform buffers and registers as used for instructions which don't have them.
Like the MOV32I and FMUL32I instructions. This fixes a potential crash when using these instructions.
Diffstat (limited to 'src')
-rw-r--r--src/video_core/engines/shader_bytecode.h5
-rw-r--r--src/video_core/renderer_opengl/gl_shader_decompiler.cpp27
2 files changed, 18 insertions, 14 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index cefd57f4c..5ff861b04 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -526,6 +526,7 @@ public:
526 enum class Type { 526 enum class Type {
527 Trivial, 527 Trivial,
528 Arithmetic, 528 Arithmetic,
529 ArithmeticImmediate,
529 ArithmeticInteger, 530 ArithmeticInteger,
530 ArithmeticIntegerImmediate, 531 ArithmeticIntegerImmediate,
531 Bfe, 532 Bfe,
@@ -655,7 +656,7 @@ private:
655 INST("0100110001101---", Id::FMUL_C, Type::Arithmetic, "FMUL_C"), 656 INST("0100110001101---", Id::FMUL_C, Type::Arithmetic, "FMUL_C"),
656 INST("0101110001101---", Id::FMUL_R, Type::Arithmetic, "FMUL_R"), 657 INST("0101110001101---", Id::FMUL_R, Type::Arithmetic, "FMUL_R"),
657 INST("0011100-01101---", Id::FMUL_IMM, Type::Arithmetic, "FMUL_IMM"), 658 INST("0011100-01101---", Id::FMUL_IMM, Type::Arithmetic, "FMUL_IMM"),
658 INST("00011110--------", Id::FMUL32_IMM, Type::Arithmetic, "FMUL32_IMM"), 659 INST("00011110--------", Id::FMUL32_IMM, Type::ArithmeticImmediate, "FMUL32_IMM"),
659 INST("0100110000010---", Id::IADD_C, Type::ArithmeticInteger, "IADD_C"), 660 INST("0100110000010---", Id::IADD_C, Type::ArithmeticInteger, "IADD_C"),
660 INST("0101110000010---", Id::IADD_R, Type::ArithmeticInteger, "IADD_R"), 661 INST("0101110000010---", Id::IADD_R, Type::ArithmeticInteger, "IADD_R"),
661 INST("0011100-00010---", Id::IADD_IMM, Type::ArithmeticInteger, "IADD_IMM"), 662 INST("0011100-00010---", Id::IADD_IMM, Type::ArithmeticInteger, "IADD_IMM"),
@@ -676,7 +677,7 @@ private:
676 INST("0100110010011---", Id::MOV_C, Type::Arithmetic, "MOV_C"), 677 INST("0100110010011---", Id::MOV_C, Type::Arithmetic, "MOV_C"),
677 INST("0101110010011---", Id::MOV_R, Type::Arithmetic, "MOV_R"), 678 INST("0101110010011---", Id::MOV_R, Type::Arithmetic, "MOV_R"),
678 INST("0011100-10011---", Id::MOV_IMM, Type::Arithmetic, "MOV_IMM"), 679 INST("0011100-10011---", Id::MOV_IMM, Type::Arithmetic, "MOV_IMM"),
679 INST("000000010000----", Id::MOV32_IMM, Type::Arithmetic, "MOV32_IMM"), 680 INST("000000010000----", Id::MOV32_IMM, Type::ArithmeticImmediate, "MOV32_IMM"),
680 INST("0100110001100---", Id::FMNMX_C, Type::Arithmetic, "FMNMX_C"), 681 INST("0100110001100---", Id::FMNMX_C, Type::Arithmetic, "FMNMX_C"),
681 INST("0101110001100---", Id::FMNMX_R, Type::Arithmetic, "FMNMX_R"), 682 INST("0101110001100---", Id::FMNMX_R, Type::Arithmetic, "FMNMX_R"),
682 INST("0011100-01100---", Id::FMNMX_IMM, Type::Arithmetic, "FMNMX_IMM"), 683 INST("0011100-01100---", Id::FMNMX_IMM, Type::Arithmetic, "FMNMX_IMM"),
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
index 6ec0a0742..6dc695def 100644
--- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
@@ -852,11 +852,6 @@ private:
852 break; 852 break;
853 } 853 }
854 854
855 case OpCode::Id::MOV32_IMM: {
856 // mov32i doesn't have abs or neg bits.
857 regs.SetRegisterToFloat(instr.gpr0, 0, GetImmediate32(instr), 1, 1);
858 break;
859 }
860 case OpCode::Id::FMUL_C: 855 case OpCode::Id::FMUL_C:
861 case OpCode::Id::FMUL_R: 856 case OpCode::Id::FMUL_R:
862 case OpCode::Id::FMUL_IMM: { 857 case OpCode::Id::FMUL_IMM: {
@@ -864,13 +859,6 @@ private:
864 instr.alu.saturate_d); 859 instr.alu.saturate_d);
865 break; 860 break;
866 } 861 }
867 case OpCode::Id::FMUL32_IMM: {
868 // fmul32i doesn't have abs or neg bits.
869 regs.SetRegisterToFloat(
870 instr.gpr0, 0,
871 regs.GetRegisterAsFloat(instr.gpr8) + " * " + GetImmediate32(instr), 1, 1);
872 break;
873 }
874 case OpCode::Id::FADD_C: 862 case OpCode::Id::FADD_C:
875 case OpCode::Id::FADD_R: 863 case OpCode::Id::FADD_R:
876 case OpCode::Id::FADD_IMM: { 864 case OpCode::Id::FADD_IMM: {
@@ -943,6 +931,21 @@ private:
943 } 931 }
944 break; 932 break;
945 } 933 }
934 case OpCode::Type::ArithmeticImmediate: {
935 switch (opcode->GetId()) {
936 case OpCode::Id::MOV32_IMM: {
937 regs.SetRegisterToFloat(instr.gpr0, 0, GetImmediate32(instr), 1, 1);
938 break;
939 }
940 case OpCode::Id::FMUL32_IMM: {
941 regs.SetRegisterToFloat(
942 instr.gpr0, 0,
943 regs.GetRegisterAsFloat(instr.gpr8) + " * " + GetImmediate32(instr), 1, 1);
944 break;
945 }
946 }
947 break;
948 }
946 case OpCode::Type::Bfe: { 949 case OpCode::Type::Bfe: {
947 ASSERT_MSG(!instr.bfe.negate_b, "Unimplemented"); 950 ASSERT_MSG(!instr.bfe.negate_b, "Unimplemented");
948 951