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| author | 2018-12-24 18:13:50 -0300 | |
|---|---|---|
| committer | 2019-01-15 17:54:53 -0300 | |
| commit | ea78c78253c6183938da6fc87bc763ed93957499 (patch) | |
| tree | 7d4d3b702c8a5efe581bdb70058febdfac27ce10 /src | |
| parent | glsl_decompiler: Fixup permissive member function declarations (diff) | |
| download | yuzu-ea78c78253c6183938da6fc87bc763ed93957499.tar.gz yuzu-ea78c78253c6183938da6fc87bc763ed93957499.tar.xz yuzu-ea78c78253c6183938da6fc87bc763ed93957499.zip | |
shader_decode: Fixup WriteLogicOperation zero comparison
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/shader/decode/arithmetic_integer_immediate.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/video_core/shader/decode/arithmetic_integer_immediate.cpp b/src/video_core/shader/decode/arithmetic_integer_immediate.cpp index a158d345a..3b8a60c6b 100644 --- a/src/video_core/shader/decode/arithmetic_integer_immediate.cpp +++ b/src/video_core/shader/decode/arithmetic_integer_immediate.cpp | |||
| @@ -89,7 +89,7 @@ void ShaderIR::WriteLogicOperation(BasicBlock& bb, Register dest, LogicOperation | |||
| 89 | return; | 89 | return; |
| 90 | case PredicateResultMode::NotZero: { | 90 | case PredicateResultMode::NotZero: { |
| 91 | // Set the predicate to true if the result is not zero. | 91 | // Set the predicate to true if the result is not zero. |
| 92 | const Node compare = Operation(OperationCode::LogicalIEqual, result, Immediate(0)); | 92 | const Node compare = Operation(OperationCode::LogicalINotEqual, result, Immediate(0)); |
| 93 | SetPredicate(bb, static_cast<u64>(predicate), compare); | 93 | SetPredicate(bb, static_cast<u64>(predicate), compare); |
| 94 | break; | 94 | break; |
| 95 | } | 95 | } |