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authorGravatar Lioncash2015-08-20 04:28:39 -0400
committerGravatar Lioncash2015-08-20 04:45:30 -0400
commite88dc7fc6d329697908a54d14d0e53f40d038655 (patch)
treea293cb486b997196c32e22502616b3f6d33c6bfa /src
parentemitter: Remove unimplemented JMP prototype (diff)
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emitter: Remove unused code
Diffstat (limited to 'src')
-rw-r--r--src/common/x64/emitter.cpp24
-rw-r--r--src/common/x64/emitter.h20
2 files changed, 0 insertions, 44 deletions
diff --git a/src/common/x64/emitter.cpp b/src/common/x64/emitter.cpp
index 99c682a11..1229d0654 100644
--- a/src/common/x64/emitter.cpp
+++ b/src/common/x64/emitter.cpp
@@ -512,30 +512,6 @@ void XEmitter::SetJumpTarget(const FixupBranch& branch)
512 } 512 }
513} 513}
514 514
515// INC/DEC considered harmful on newer CPUs due to partial flag set.
516// Use ADD, SUB instead.
517
518/*
519void XEmitter::INC(int bits, OpArg arg)
520{
521 if (arg.IsImm()) ASSERT_MSG(0, "INC - Imm argument");
522 arg.operandReg = 0;
523 if (bits == 16) {Write8(0x66);}
524 arg.WriteRex(this, bits, bits);
525 Write8(bits == 8 ? 0xFE : 0xFF);
526 arg.WriteRest(this);
527}
528void XEmitter::DEC(int bits, OpArg arg)
529{
530 if (arg.IsImm()) ASSERT_MSG(0, "DEC - Imm argument");
531 arg.operandReg = 1;
532 if (bits == 16) {Write8(0x66);}
533 arg.WriteRex(this, bits, bits);
534 Write8(bits == 8 ? 0xFE : 0xFF);
535 arg.WriteRest(this);
536}
537*/
538
539//Single byte opcodes 515//Single byte opcodes
540//There is no PUSHAD/POPAD in 64-bit mode. 516//There is no PUSHAD/POPAD in 64-bit mode.
541void XEmitter::INT3() {Write8(0xCC);} 517void XEmitter::INT3() {Write8(0xCC);}
diff --git a/src/common/x64/emitter.h b/src/common/x64/emitter.h
index aa1ead4ca..86f4a1fff 100644
--- a/src/common/x64/emitter.h
+++ b/src/common/x64/emitter.h
@@ -328,8 +328,6 @@ enum SSECompare
328 ORD, 328 ORD,
329}; 329};
330 330
331typedef const u8* JumpTarget;
332
333class XEmitter 331class XEmitter
334{ 332{
335 friend struct OpArg; // for Write8 etc 333 friend struct OpArg; // for Write8 etc
@@ -434,7 +432,6 @@ public:
434 void CALLptr(OpArg arg); 432 void CALLptr(OpArg arg);
435 433
436 FixupBranch J_CC(CCFlags conditionCode, bool force5bytes = false); 434 FixupBranch J_CC(CCFlags conditionCode, bool force5bytes = false);
437 //void J_CC(CCFlags conditionCode, JumpTarget target);
438 void J_CC(CCFlags conditionCode, const u8* addr, bool force5Bytes = false); 435 void J_CC(CCFlags conditionCode, const u8* addr, bool force5Bytes = false);
439 436
440 void SetJumpTarget(const FixupBranch& branch); 437 void SetJumpTarget(const FixupBranch& branch);
@@ -640,23 +637,6 @@ public:
640 // SSE/SSE2: Useful alternative to shuffle in some cases. 637 // SSE/SSE2: Useful alternative to shuffle in some cases.
641 void MOVDDUP(X64Reg regOp, const OpArg& arg); 638 void MOVDDUP(X64Reg regOp, const OpArg& arg);
642 639
643 // TODO: Actually implement
644#if 0
645 // SSE3: Horizontal operations in SIMD registers. Could be useful for various VFPU things like dot products...
646 void ADDSUBPS(X64Reg dest, const OpArg& src);
647 void ADDSUBPD(X64Reg dest, const OpArg& src);
648 void HADDPD(X64Reg dest, const OpArg& src);
649 void HSUBPS(X64Reg dest, const OpArg& src);
650 void HSUBPD(X64Reg dest, const OpArg& src);
651
652 // SSE4: Further horizontal operations - dot products. These are weirdly flexible, the arg contains both a read mask and a write "mask".
653 void DPPD(X64Reg dest, const OpArg& src, u8 arg);
654
655 // These are probably useful for VFPU emulation.
656 void INSERTPS(X64Reg dest, const OpArg& src, u8 arg);
657 void EXTRACTPS(const OpArg& dest, X64Reg src, u8 arg);
658#endif
659
660 // SSE3: Horizontal operations in SIMD registers. Very slow! shufps-based code beats it handily on Ivy. 640 // SSE3: Horizontal operations in SIMD registers. Very slow! shufps-based code beats it handily on Ivy.
661 void HADDPS(X64Reg dest, const OpArg& src); 641 void HADDPS(X64Reg dest, const OpArg& src);
662 642