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authorGravatar Tony Wasserka2014-07-25 11:22:40 +0200
committerGravatar Tony Wasserka2014-08-25 22:02:33 +0200
commite832bbe554e174694cb43d4fe86f31af283a10da (patch)
tree3f531825b588c74ae12775e997869b35b33fc072 /src
parentMerge pull request #75 from xsacha/qt5 (diff)
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GSP: Add a helper function for convenience.
Diffstat (limited to 'src')
-rw-r--r--src/core/hle/service/gsp.cpp39
1 files changed, 22 insertions, 17 deletions
diff --git a/src/core/hle/service/gsp.cpp b/src/core/hle/service/gsp.cpp
index 635f50a53..f793b592c 100644
--- a/src/core/hle/service/gsp.cpp
+++ b/src/core/hle/service/gsp.cpp
@@ -42,35 +42,40 @@ static inline InterruptRelayQueue* GetInterruptRelayQueue(u32 thread_id) {
42 sizeof(InterruptRelayQueue) * thread_id); 42 sizeof(InterruptRelayQueue) * thread_id);
43} 43}
44 44
45/// Write a GSP GPU hardware register 45void WriteHWRegs(u32 base_address, u32 size_in_bytes, const u32* data) {
46void WriteHWRegs(Service::Interface* self) {
47 u32* cmd_buff = Service::GetCommandBuffer();
48 u32 reg_addr = cmd_buff[1];
49 u32 size = cmd_buff[2];
50
51 // TODO: Return proper error codes 46 // TODO: Return proper error codes
52 if (reg_addr + size >= 0x420000) { 47 if (base_address + size_in_bytes >= 0x420000) {
53 ERROR_LOG(GPU, "Write address out of range! (address=0x%08x, size=0x%08x)", reg_addr, size); 48 ERROR_LOG(GPU, "Write address out of range! (address=0x%08x, size=0x%08x)",
49 base_address, size_in_bytes);
54 return; 50 return;
55 } 51 }
56 52
57 // size should be word-aligned 53 // size should be word-aligned
58 if ((size % 4) != 0) { 54 if ((size_in_bytes % 4) != 0) {
59 ERROR_LOG(GPU, "Invalid size 0x%08x", size); 55 ERROR_LOG(GPU, "Invalid size 0x%08x", size_in_bytes);
60 return; 56 return;
61 } 57 }
62 58
63 u32* src = (u32*)Memory::GetPointer(cmd_buff[0x4]); 59 while (size_in_bytes > 0) {
64 60 GPU::Write<u32>(base_address + 0x1EB00000, *data);
65 while (size > 0) {
66 GPU::Write<u32>(reg_addr + 0x1EB00000, *src);
67 61
68 size -= 4; 62 size_in_bytes -= 4;
69 ++src; 63 ++data;
70 reg_addr += 4; 64 base_address += 4;
71 } 65 }
72} 66}
73 67
68/// Write a GSP GPU hardware register
69void WriteHWRegs(Service::Interface* self) {
70 u32* cmd_buff = Service::GetCommandBuffer();
71 u32 reg_addr = cmd_buff[1];
72 u32 size = cmd_buff[2];
73
74 u32* src = (u32*)Memory::GetPointer(cmd_buff[0x4]);
75
76 WriteHWRegs(reg_addr, size, src);
77}
78
74/// Read a GSP GPU hardware register 79/// Read a GSP GPU hardware register
75void ReadHWRegs(Service::Interface* self) { 80void ReadHWRegs(Service::Interface* self) {
76 u32* cmd_buff = Service::GetCommandBuffer(); 81 u32* cmd_buff = Service::GetCommandBuffer();