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authorGravatar Fernando Sahmkow2019-04-25 12:57:10 -0400
committerGravatar FernandoS272019-05-01 15:31:39 -0400
commite64c41efe88e8f88014fef912b06b71b3df17e85 (patch)
tree626793bd10db844237b8136154ea6b81fe72e4b1 /src
parentFixes and Corrections to DMA Engine (diff)
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Refactors and name corrections.
Diffstat (limited to 'src')
-rw-r--r--src/video_core/engines/engine_upload.cpp39
-rw-r--r--src/video_core/engines/engine_upload.h9
-rw-r--r--src/video_core/engines/kepler_compute.h4
-rw-r--r--src/video_core/engines/kepler_memory.h2
-rw-r--r--src/video_core/engines/maxwell_3d.h2
-rw-r--r--src/video_core/engines/maxwell_dma.h14
6 files changed, 35 insertions, 35 deletions
diff --git a/src/video_core/engines/engine_upload.cpp b/src/video_core/engines/engine_upload.cpp
index 867457f25..f8aa4ff55 100644
--- a/src/video_core/engines/engine_upload.cpp
+++ b/src/video_core/engines/engine_upload.cpp
@@ -9,7 +9,7 @@
9 9
10namespace Tegra::Engines::Upload { 10namespace Tegra::Engines::Upload {
11 11
12State::State(MemoryManager& memory_manager, Data& regs) 12State::State(MemoryManager& memory_manager, Registers& regs)
13 : memory_manager(memory_manager), regs(regs) {} 13 : memory_manager(memory_manager), regs(regs) {}
14 14
15void State::ProcessExec(const bool is_linear) { 15void State::ProcessExec(const bool is_linear) {
@@ -23,24 +23,25 @@ void State::ProcessData(const u32 data, const bool is_last_call) {
23 const u32 sub_copy_size = std::min(4U, copy_size - write_offset); 23 const u32 sub_copy_size = std::min(4U, copy_size - write_offset);
24 std::memcpy(&inner_buffer[write_offset], &data, sub_copy_size); 24 std::memcpy(&inner_buffer[write_offset], &data, sub_copy_size);
25 write_offset += sub_copy_size; 25 write_offset += sub_copy_size;
26 if (is_last_call) { 26 if (!is_last_call) {
27 const GPUVAddr address{regs.dest.Address()}; 27 return;
28 if (is_linear) { 28 }
29 memory_manager.WriteBlock(address, inner_buffer.data(), copy_size); 29 const GPUVAddr address{regs.dest.Address()};
30 } else { 30 if (is_linear) {
31 UNIMPLEMENTED_IF(regs.dest.z != 0); 31 memory_manager.WriteBlock(address, inner_buffer.data(), copy_size);
32 UNIMPLEMENTED_IF(regs.dest.depth != 1); 32 } else {
33 UNIMPLEMENTED_IF(regs.dest.BlockWidth() != 1); 33 UNIMPLEMENTED_IF(regs.dest.z != 0);
34 UNIMPLEMENTED_IF(regs.dest.BlockDepth() != 1); 34 UNIMPLEMENTED_IF(regs.dest.depth != 1);
35 const std::size_t dst_size = Tegra::Texture::CalculateSize( 35 UNIMPLEMENTED_IF(regs.dest.BlockWidth() != 1);
36 true, 1, regs.dest.width, regs.dest.height, 1, regs.dest.BlockHeight(), 1); 36 UNIMPLEMENTED_IF(regs.dest.BlockDepth() != 1);
37 std::vector<u8> tmp_buffer(dst_size); 37 const std::size_t dst_size = Tegra::Texture::CalculateSize(
38 memory_manager.ReadBlock(address, tmp_buffer.data(), dst_size); 38 true, 1, regs.dest.width, regs.dest.height, 1, regs.dest.BlockHeight(), 1);
39 Tegra::Texture::SwizzleKepler(regs.dest.width, regs.dest.height, regs.dest.x, 39 tmp_buffer.resize(dst_size);
40 regs.dest.y, regs.dest.BlockHeight(), copy_size, 40 memory_manager.ReadBlock(address, tmp_buffer.data(), dst_size);
41 inner_buffer.data(), tmp_buffer.data()); 41 Tegra::Texture::SwizzleKepler(regs.dest.width, regs.dest.height, regs.dest.x, regs.dest.y,
42 memory_manager.WriteBlock(address, tmp_buffer.data(), dst_size); 42 regs.dest.BlockHeight(), copy_size, inner_buffer.data(),
43 } 43 tmp_buffer.data());
44 memory_manager.WriteBlock(address, tmp_buffer.data(), dst_size);
44 } 45 }
45} 46}
46 47
diff --git a/src/video_core/engines/engine_upload.h b/src/video_core/engines/engine_upload.h
index 431f56030..9c6e0d21c 100644
--- a/src/video_core/engines/engine_upload.h
+++ b/src/video_core/engines/engine_upload.h
@@ -16,7 +16,7 @@ class MemoryManager;
16 16
17namespace Tegra::Engines::Upload { 17namespace Tegra::Engines::Upload {
18 18
19struct Data { 19struct Registers {
20 u32 line_length_in; 20 u32 line_length_in;
21 u32 line_count; 21 u32 line_count;
22 22
@@ -56,7 +56,7 @@ struct Data {
56 56
57class State { 57class State {
58public: 58public:
59 State(MemoryManager& memory_manager, Data& regs); 59 State(MemoryManager& memory_manager, Registers& regs);
60 ~State() = default; 60 ~State() = default;
61 61
62 void ProcessExec(const bool is_linear); 62 void ProcessExec(const bool is_linear);
@@ -66,8 +66,9 @@ private:
66 u32 write_offset = 0; 66 u32 write_offset = 0;
67 u32 copy_size = 0; 67 u32 copy_size = 0;
68 std::vector<u8> inner_buffer; 68 std::vector<u8> inner_buffer;
69 bool is_linear; 69 std::vector<u8> tmp_buffer;
70 Data& regs; 70 bool is_linear = false;
71 Registers& regs;
71 MemoryManager& memory_manager; 72 MemoryManager& memory_manager;
72}; 73};
73 74
diff --git a/src/video_core/engines/kepler_compute.h b/src/video_core/engines/kepler_compute.h
index 50f318848..5250b8d9b 100644
--- a/src/video_core/engines/kepler_compute.h
+++ b/src/video_core/engines/kepler_compute.h
@@ -51,7 +51,7 @@ public:
51 struct { 51 struct {
52 INSERT_PADDING_WORDS(0x60); 52 INSERT_PADDING_WORDS(0x60);
53 53
54 Upload::Data upload; 54 Upload::Registers upload;
55 55
56 struct { 56 struct {
57 union { 57 union {
@@ -131,7 +131,6 @@ public:
131 BitField<30, 1, u32> linked_tsc; 131 BitField<30, 1, u32> linked_tsc;
132 132
133 BitField<0, 31, u32> grid_dim_x; 133 BitField<0, 31, u32> grid_dim_x;
134
135 union { 134 union {
136 BitField<0, 16, u32> grid_dim_y; 135 BitField<0, 16, u32> grid_dim_y;
137 BitField<16, 16, u32> grid_dim_z; 136 BitField<16, 16, u32> grid_dim_z;
@@ -142,7 +141,6 @@ public:
142 BitField<0, 16, u32> shared_alloc; 141 BitField<0, 16, u32> shared_alloc;
143 142
144 BitField<0, 31, u32> block_dim_x; 143 BitField<0, 31, u32> block_dim_x;
145
146 union { 144 union {
147 BitField<0, 16, u32> block_dim_y; 145 BitField<0, 16, u32> block_dim_y;
148 BitField<16, 16, u32> block_dim_z; 146 BitField<16, 16, u32> block_dim_z;
diff --git a/src/video_core/engines/kepler_memory.h b/src/video_core/engines/kepler_memory.h
index 473bff20a..f3bc675a9 100644
--- a/src/video_core/engines/kepler_memory.h
+++ b/src/video_core/engines/kepler_memory.h
@@ -47,7 +47,7 @@ public:
47 struct { 47 struct {
48 INSERT_PADDING_WORDS(0x60); 48 INSERT_PADDING_WORDS(0x60);
49 49
50 Upload::Data upload; 50 Upload::Registers upload;
51 51
52 struct { 52 struct {
53 union { 53 union {
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index eae427412..889723535 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -588,7 +588,7 @@ public:
588 588
589 INSERT_PADDING_WORDS(0x17); 589 INSERT_PADDING_WORDS(0x17);
590 590
591 Upload::Data upload; 591 Upload::Registers upload;
592 struct { 592 struct {
593 union { 593 union {
594 BitField<0, 1, u32> linear; 594 BitField<0, 1, u32> linear;
diff --git a/src/video_core/engines/maxwell_dma.h b/src/video_core/engines/maxwell_dma.h
index 8eab1332e..e5942f671 100644
--- a/src/video_core/engines/maxwell_dma.h
+++ b/src/video_core/engines/maxwell_dma.h
@@ -70,13 +70,13 @@ public:
70 static_assert(sizeof(Parameters) == 24, "Parameters has wrong size"); 70 static_assert(sizeof(Parameters) == 24, "Parameters has wrong size");
71 71
72 enum class ComponentMode : u32 { 72 enum class ComponentMode : u32 {
73 SRC0 = 0, 73 Src0 = 0,
74 SRC1 = 1, 74 Src1 = 1,
75 SRC2 = 2, 75 Src2 = 2,
76 SRC3 = 3, 76 Src3 = 3,
77 CONST0 = 4, 77 Const0 = 4,
78 CONST1 = 5, 78 Const1 = 5,
79 ZERO = 6, 79 Zero = 6,
80 }; 80 };
81 81
82 enum class CopyMode : u32 { 82 enum class CopyMode : u32 {