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| author | 2016-12-15 22:35:34 -0800 | |
|---|---|---|
| committer | 2016-12-15 23:08:05 -0800 | |
| commit | e4e962bc7c593c7dd0957af12e56b30e6bee5c06 (patch) | |
| tree | d830aa090e1d1881b4cf26026ab9fbb02dfcfd5f /src | |
| parent | VideoCore/Shader: Move DebugData to a separate file (diff) | |
| download | yuzu-e4e962bc7c593c7dd0957af12e56b30e6bee5c06.tar.gz yuzu-e4e962bc7c593c7dd0957af12e56b30e6bee5c06.tar.xz yuzu-e4e962bc7c593c7dd0957af12e56b30e6bee5c06.zip | |
VideoCore/Shader: Remove dynamic control flow in (Get)UniformOffset
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/shader/shader.h | 21 | ||||
| -rw-r--r-- | src/video_core/shader/shader_jit_x64.cpp | 8 |
2 files changed, 11 insertions, 18 deletions
diff --git a/src/video_core/shader/shader.h b/src/video_core/shader/shader.h index 87c4e0b6f..d96724860 100644 --- a/src/video_core/shader/shader.h +++ b/src/video_core/shader/shader.h | |||
| @@ -161,21 +161,16 @@ struct ShaderSetup { | |||
| 161 | std::array<Math::Vec4<u8>, 4> i; | 161 | std::array<Math::Vec4<u8>, 4> i; |
| 162 | } uniforms; | 162 | } uniforms; |
| 163 | 163 | ||
| 164 | static size_t UniformOffset(RegisterType type, unsigned index) { | 164 | static size_t GetFloatUniformOffset(unsigned index) { |
| 165 | switch (type) { | 165 | return offsetof(ShaderSetup, uniforms.f) + index * sizeof(Math::Vec4<float24>); |
| 166 | case RegisterType::FloatUniform: | 166 | } |
| 167 | return offsetof(ShaderSetup, uniforms.f) + index * sizeof(Math::Vec4<float24>); | ||
| 168 | |||
| 169 | case RegisterType::BoolUniform: | ||
| 170 | return offsetof(ShaderSetup, uniforms.b) + index * sizeof(bool); | ||
| 171 | 167 | ||
| 172 | case RegisterType::IntUniform: | 168 | static size_t GetBoolUniformOffset(unsigned index) { |
| 173 | return offsetof(ShaderSetup, uniforms.i) + index * sizeof(Math::Vec4<u8>); | 169 | return offsetof(ShaderSetup, uniforms.b) + index * sizeof(bool); |
| 170 | } | ||
| 174 | 171 | ||
| 175 | default: | 172 | static size_t GetIntUniformOffset(unsigned index) { |
| 176 | UNREACHABLE(); | 173 | return offsetof(ShaderSetup, uniforms.i) + index * sizeof(Math::Vec4<u8>); |
| 177 | return 0; | ||
| 178 | } | ||
| 179 | } | 174 | } |
| 180 | 175 | ||
| 181 | std::array<u32, 1024> program_code; | 176 | std::array<u32, 1024> program_code; |
diff --git a/src/video_core/shader/shader_jit_x64.cpp b/src/video_core/shader/shader_jit_x64.cpp index 3ba31d474..a85a6776f 100644 --- a/src/video_core/shader/shader_jit_x64.cpp +++ b/src/video_core/shader/shader_jit_x64.cpp | |||
| @@ -185,7 +185,7 @@ void JitShader::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRe | |||
| 185 | 185 | ||
| 186 | if (src_reg.GetRegisterType() == RegisterType::FloatUniform) { | 186 | if (src_reg.GetRegisterType() == RegisterType::FloatUniform) { |
| 187 | src_ptr = SETUP; | 187 | src_ptr = SETUP; |
| 188 | src_offset = ShaderSetup::UniformOffset(RegisterType::FloatUniform, src_reg.GetIndex()); | 188 | src_offset = ShaderSetup::GetFloatUniformOffset(src_reg.GetIndex()); |
| 189 | } else { | 189 | } else { |
| 190 | src_ptr = STATE; | 190 | src_ptr = STATE; |
| 191 | src_offset = UnitState<false>::InputOffset(src_reg); | 191 | src_offset = UnitState<false>::InputOffset(src_reg); |
| @@ -348,8 +348,7 @@ void JitShader::Compile_EvaluateCondition(Instruction instr) { | |||
| 348 | } | 348 | } |
| 349 | 349 | ||
| 350 | void JitShader::Compile_UniformCondition(Instruction instr) { | 350 | void JitShader::Compile_UniformCondition(Instruction instr) { |
| 351 | size_t offset = | 351 | size_t offset = ShaderSetup::GetBoolUniformOffset(instr.flow_control.bool_uniform_id); |
| 352 | ShaderSetup::UniformOffset(RegisterType::BoolUniform, instr.flow_control.bool_uniform_id); | ||
| 353 | cmp(byte[SETUP + offset], 0); | 352 | cmp(byte[SETUP + offset], 0); |
| 354 | } | 353 | } |
| 355 | 354 | ||
| @@ -732,8 +731,7 @@ void JitShader::Compile_LOOP(Instruction instr) { | |||
| 732 | // This decodes the fields from the integer uniform at index instr.flow_control.int_uniform_id. | 731 | // This decodes the fields from the integer uniform at index instr.flow_control.int_uniform_id. |
| 733 | // The Y (LOOPCOUNT_REG) and Z (LOOPINC) component are kept multiplied by 16 (Left shifted by | 732 | // The Y (LOOPCOUNT_REG) and Z (LOOPINC) component are kept multiplied by 16 (Left shifted by |
| 734 | // 4 bits) to be used as an offset into the 16-byte vector registers later | 733 | // 4 bits) to be used as an offset into the 16-byte vector registers later |
| 735 | size_t offset = | 734 | size_t offset = ShaderSetup::GetIntUniformOffset(instr.flow_control.int_uniform_id); |
| 736 | ShaderSetup::UniformOffset(RegisterType::IntUniform, instr.flow_control.int_uniform_id); | ||
| 737 | mov(LOOPCOUNT, dword[SETUP + offset]); | 735 | mov(LOOPCOUNT, dword[SETUP + offset]); |
| 738 | mov(LOOPCOUNT_REG, LOOPCOUNT); | 736 | mov(LOOPCOUNT_REG, LOOPCOUNT); |
| 739 | shr(LOOPCOUNT_REG, 4); | 737 | shr(LOOPCOUNT_REG, 4); |