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authorGravatar David2018-05-24 15:36:12 -0700
committerGravatar bunnei2018-05-24 18:36:12 -0400
commite3a92b09ba8ed4b7811edb13b86fd06ee40c950d (patch)
tree8b994cf24f7a3c4e5e35f8a2deff7334d41c6a5a /src
parentMerge pull request #464 from bunnei/fix-msvc (diff)
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Stubbed NVGPU_GPU_IOCTL_ZBC_SET_TABLE (#463)
We have no clue on what this actually does yet so stubbing it since it's just input only should be fine for now
Diffstat (limited to 'src')
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp11
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h11
2 files changed, 22 insertions, 0 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
index be6b88f98..a9538ff43 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
+++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
@@ -24,6 +24,8 @@ u32 nvhost_ctrl_gpu::ioctl(Ioctl command, const std::vector<u8>& input, std::vec
24 return ZCullGetCtxSize(input, output); 24 return ZCullGetCtxSize(input, output);
25 case IoctlCommand::IocZcullGetInfo: 25 case IoctlCommand::IocZcullGetInfo:
26 return ZCullGetInfo(input, output); 26 return ZCullGetInfo(input, output);
27 case IoctlCommand::IocZbcSetTable:
28 return ZBCSetTable(input, output);
27 } 29 }
28 UNIMPLEMENTED_MSG("Unimplemented ioctl"); 30 UNIMPLEMENTED_MSG("Unimplemented ioctl");
29 return 0; 31 return 0;
@@ -125,4 +127,13 @@ u32 nvhost_ctrl_gpu::ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>&
125 return 0; 127 return 0;
126} 128}
127 129
130u32 nvhost_ctrl_gpu::ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output) {
131 NGLOG_WARNING(Service_NVDRV, "(STUBBED) called");
132 IoctlZbcSetTable params{};
133 std::memcpy(&params, input.data(), input.size());
134 // TODO(ogniK): What does this even actually do?
135 std::memcpy(output.data(), &params, output.size());
136 return 0;
137}
138
128} // namespace Service::Nvidia::Devices 139} // namespace Service::Nvidia::Devices
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
index 2d43598b1..1d5ba2e67 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
+++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
@@ -25,6 +25,7 @@ private:
25 IocGetActiveSlotMaskCommand = 0x80084714, 25 IocGetActiveSlotMaskCommand = 0x80084714,
26 IocZcullGetCtxSizeCommand = 0x80044701, 26 IocZcullGetCtxSizeCommand = 0x80044701,
27 IocZcullGetInfo = 0x80284702, 27 IocZcullGetInfo = 0x80284702,
28 IocZbcSetTable = 0x402C4703,
28 }; 29 };
29 30
30 struct IoctlGpuCharacteristics { 31 struct IoctlGpuCharacteristics {
@@ -117,11 +118,21 @@ private:
117 static_assert(sizeof(IoctlNvgpuGpuZcullGetInfoArgs) == 40, 118 static_assert(sizeof(IoctlNvgpuGpuZcullGetInfoArgs) == 40,
118 "IoctlNvgpuGpuZcullGetInfoArgs is incorrect size"); 119 "IoctlNvgpuGpuZcullGetInfoArgs is incorrect size");
119 120
121 struct IoctlZbcSetTable {
122 u32_le color_ds[4];
123 u32_le color_l2[4];
124 u32_le depth;
125 u32_le format;
126 u32_le type;
127 };
128 static_assert(sizeof(IoctlZbcSetTable) == 44, "IoctlZbcSetTable is incorrect size");
129
120 u32 GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output); 130 u32 GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output);
121 u32 GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output); 131 u32 GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output);
122 u32 GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output); 132 u32 GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output);
123 u32 ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output); 133 u32 ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output);
124 u32 ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output); 134 u32 ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output);
135 u32 ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output);
125}; 136};
126 137
127} // namespace Service::Nvidia::Devices 138} // namespace Service::Nvidia::Devices