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| author | 2014-04-01 18:18:02 -0400 | |
|---|---|---|
| committer | 2014-04-01 18:48:04 -0400 | |
| commit | e05be0145c31771e832ed1bc428d68094d3ea8e6 (patch) | |
| tree | 97cac80455f3a410a8db5cff3f859b532f61f298 /src | |
| parent | Load file in qt window (diff) | |
| download | yuzu-e05be0145c31771e832ed1bc428d68094d3ea8e6.tar.gz yuzu-e05be0145c31771e832ed1bc428d68094d3ea8e6.tar.xz yuzu-e05be0145c31771e832ed1bc428d68094d3ea8e6.zip | |
-converted tabs to spaces
-moved scratchpad memory out of MemArena
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/src/mem_map.cpp | 95 | ||||
| -rw-r--r-- | src/core/src/mem_map_funcs.cpp | 199 |
2 files changed, 145 insertions, 149 deletions
diff --git a/src/core/src/mem_map.cpp b/src/core/src/mem_map.cpp index 975a0cf08..6477499d5 100644 --- a/src/core/src/mem_map.cpp +++ b/src/core/src/mem_map.cpp | |||
| @@ -32,75 +32,72 @@ | |||
| 32 | 32 | ||
| 33 | namespace Memory { | 33 | namespace Memory { |
| 34 | 34 | ||
| 35 | 35 | ||
| 36 | u8* g_base = NULL; ///< The base pointer to the auto-mirrored arena. | 36 | u8* g_base = NULL; ///< The base pointer to the auto-mirrored arena. |
| 37 | |||
| 38 | MemArena g_arena; ///< The MemArena class | ||
| 39 | 37 | ||
| 40 | u8* g_bootrom = NULL; ///< Bootrom memory (super secret code/data @ 0x8000) pointer | 38 | MemArena g_arena; ///< The MemArena class |
| 41 | u8* g_fcram = NULL; ///< Main memory (FCRAM) pointer | ||
| 42 | u8* g_vram = NULL; ///< Video memory (VRAM) pointer | ||
| 43 | u8* g_scratchpad = NULL; ///< [Hack] Seperate mem for stack space because I don't know where this goes | ||
| 44 | 39 | ||
| 45 | u8* g_physical_bootrom = NULL; ///< Bootrom physical memory (super secret code/data @ 0x8000) | 40 | u8* g_bootrom = NULL; ///< Bootrom physical memory |
| 46 | u8* g_uncached_bootrom = NULL; | 41 | u8* g_fcram = NULL; ///< Main memory (FCRAM) pointer |
| 42 | u8* g_vram = NULL; ///< Video memory (VRAM) pointer | ||
| 43 | u8* g_scratchpad = NULL; ///< Scratchpad memory - Used for main thread stack | ||
| 47 | 44 | ||
| 48 | u8* g_physical_fcram = NULL; ///< Main physical memory (FCRAM) | 45 | u8* g_physical_bootrom = NULL; ///< Bootrom physical memory |
| 49 | u8* g_physical_vram = NULL; ///< Video physical memory (VRAM) | 46 | u8* g_uncached_bootrom = NULL; |
| 50 | u8* g_physical_scratchpad = NULL; ///< Scratchpad memory used for main thread stack | ||
| 51 | 47 | ||
| 48 | u8* g_physical_fcram = NULL; ///< Main physical memory (FCRAM) | ||
| 49 | u8* g_physical_vram = NULL; ///< Video physical memory (VRAM) | ||
| 50 | u8* g_physical_scratchpad = NULL; ///< Scratchpad memory used for main thread stack | ||
| 52 | 51 | ||
| 53 | // We don't declare the IO region in here since its handled by other means. | 52 | // We don't declare the IO region in here since its handled by other means. |
| 54 | static MemoryView g_views[] = | 53 | static MemoryView g_views[] = { |
| 55 | { | 54 | { &g_vram, &g_physical_vram, MEM_VRAM_VADDR, MEM_VRAM_SIZE, 0 }, |
| 56 | {&g_scratchpad, &g_physical_scratchpad, 0x00000000, MEM_SCRATCHPAD_SIZE, 0 }, | 55 | { &g_fcram, &g_physical_fcram, MEM_FCRAM_VADDR, MEM_FCRAM_SIZE, MV_IS_PRIMARY_RAM }, |
| 57 | // {&g_bootrom, &g_physical_bootrom, 0x00000000, MEM_BOOTROM_SIZE, 0}, | ||
| 58 | // {NULL, &g_uncached_bootrom, 0x00010000, MEM_BOOTROM_SIZE, MV_MIRROR_PREVIOUS}, | ||
| 59 | // {NULL, NULL, 0x17E00000, MEM_MPCORE_PRIV_SIZE, 0}, | ||
| 60 | {&g_vram, &g_physical_vram, MEM_VRAM_VADDR, MEM_VRAM_SIZE, MV_IS_PRIMARY_RAM}, | ||
| 61 | // {NULL, NULL, 0x1FF00000, MEM_DSP_SIZE, 0}, | ||
| 62 | // {NULL, NULL, 0x1FF80000, MEM_AXI_WRAM_SIZE, 0}, | ||
| 63 | |||
| 64 | {&g_fcram, &g_physical_fcram, MEM_FCRAM_VADDR, MEM_FCRAM_SIZE, MV_IS_PRIMARY_RAM}, | ||
| 65 | |||
| 66 | }; | 56 | }; |
| 67 | 57 | ||
| 68 | /*static MemoryView views[] = | 58 | /*static MemoryView views[] = |
| 69 | { | 59 | { |
| 70 | {&m_pScratchPad, &m_pPhysicalScratchPad, 0x00010000, SCRATCHPAD_SIZE, 0}, | 60 | {&m_pScratchPad, &m_pPhysicalScratchPad, 0x00010000, SCRATCHPAD_SIZE, 0}, |
| 71 | {NULL, &m_pUncachedScratchPad, 0x40010000, SCRATCHPAD_SIZE, MV_MIRROR_PREVIOUS}, | 61 | {NULL, &m_pUncachedScratchPad, 0x40010000, SCRATCHPAD_SIZE, MV_MIRROR_PREVIOUS}, |
| 72 | {&m_pVRAM, &m_pPhysicalVRAM, 0x04000000, 0x00800000, 0}, | 62 | {&m_pVRAM, &m_pPhysicalVRAM, 0x04000000, 0x00800000, 0}, |
| 73 | {NULL, &m_pUncachedVRAM, 0x44000000, 0x00800000, MV_MIRROR_PREVIOUS}, | 63 | {NULL, &m_pUncachedVRAM, 0x44000000, 0x00800000, MV_MIRROR_PREVIOUS}, |
| 74 | {&m_pRAM, &m_pPhysicalRAM, 0x08000000, g_MemorySize, MV_IS_PRIMARY_RAM}, // only from 0x08800000 is it usable (last 24 megs) | 64 | {&m_pRAM, &m_pPhysicalRAM, 0x08000000, g_MemorySize, MV_IS_PRIMARY_RAM}, // only from 0x08800000 is it usable (last 24 megs) |
| 75 | {NULL, &m_pUncachedRAM, 0x48000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM}, | 65 | {NULL, &m_pUncachedRAM, 0x48000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM}, |
| 76 | {NULL, &m_pKernelRAM, 0x88000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM}, | 66 | {NULL, &m_pKernelRAM, 0x88000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM}, |
| 77 | 67 | ||
| 78 | // TODO: There are a few swizzled mirrors of VRAM, not sure about the best way to | 68 | // TODO: There are a few swizzled mirrors of VRAM, not sure about the best way to |
| 79 | // implement those. | 69 | // implement those. |
| 80 | };*/ | 70 | };*/ |
| 81 | 71 | ||
| 82 | static const int kNumMemViews = sizeof(g_views) / sizeof(MemoryView); ///< Number of mem views | 72 | static const int kNumMemViews = sizeof(g_views) / sizeof(MemoryView); ///< Number of mem views |
| 83 | 73 | ||
| 84 | void Init() { | 74 | void Init() { |
| 85 | int flags = 0; | 75 | int flags = 0; |
| 86 | 76 | ||
| 87 | for (size_t i = 0; i < ARRAY_SIZE(g_views); i++) { | 77 | for (size_t i = 0; i < ARRAY_SIZE(g_views); i++) { |
| 88 | if (g_views[i].flags & MV_IS_PRIMARY_RAM) | 78 | if (g_views[i].flags & MV_IS_PRIMARY_RAM) |
| 89 | g_views[i].size = MEM_FCRAM_SIZE; | 79 | g_views[i].size = MEM_FCRAM_SIZE; |
| 90 | } | 80 | } |
| 91 | 81 | ||
| 92 | g_base = MemoryMap_Setup(g_views, kNumMemViews, flags, &g_arena); | 82 | g_base = MemoryMap_Setup(g_views, kNumMemViews, flags, &g_arena); |
| 93 | 83 | ||
| 94 | NOTICE_LOG(MEMMAP, "Memory system initialized. RAM at %p (mirror at 0 @ %p)", g_fcram, | 84 | g_scratchpad = new u8[MEM_SCRATCHPAD_SIZE]; |
| 95 | g_physical_fcram); | 85 | |
| 86 | NOTICE_LOG(MEMMAP, "Memory system initialized. RAM at %p (mirror at 0 @ %p)", g_fcram, | ||
| 87 | g_physical_fcram); | ||
| 96 | } | 88 | } |
| 97 | 89 | ||
| 98 | void Shutdown() { | 90 | void Shutdown() { |
| 99 | u32 flags = 0; | 91 | u32 flags = 0; |
| 100 | MemoryMap_Shutdown(g_views, kNumMemViews, flags, &g_arena); | 92 | MemoryMap_Shutdown(g_views, kNumMemViews, flags, &g_arena); |
| 101 | g_arena.ReleaseSpace(); | 93 | |
| 102 | g_base = NULL; | 94 | g_arena.ReleaseSpace(); |
| 103 | NOTICE_LOG(MEMMAP, "Memory system shut down."); | 95 | delete[] g_scratchpad; |
| 96 | |||
| 97 | g_base = NULL; | ||
| 98 | g_scratchpad = NULL; | ||
| 99 | |||
| 100 | NOTICE_LOG(MEMMAP, "Memory system shut down."); | ||
| 104 | } | 101 | } |
| 105 | 102 | ||
| 106 | 103 | ||
diff --git a/src/core/src/mem_map_funcs.cpp b/src/core/src/mem_map_funcs.cpp index c8436b2a4..0d22d9193 100644 --- a/src/core/src/mem_map_funcs.cpp +++ b/src/core/src/mem_map_funcs.cpp | |||
| @@ -29,157 +29,156 @@ | |||
| 29 | namespace Memory { | 29 | namespace Memory { |
| 30 | 30 | ||
| 31 | template <typename T> | 31 | template <typename T> |
| 32 | inline void ReadFromHardware(T &var, const u32 addr) | 32 | inline void ReadFromHardware(T &var, const u32 addr) { |
| 33 | { | 33 | // TODO: Figure out the fastest order of tests for both read and write (they are probably different). |
| 34 | // TODO: Figure out the fastest order of tests for both read and write (they are probably different). | 34 | // TODO: Make sure this represents the mirrors in a correct way. |
| 35 | // TODO: Make sure this represents the mirrors in a correct way. | ||
| 36 | 35 | ||
| 37 | // Could just do a base-relative read, too.... TODO | 36 | // Could just do a base-relative read, too.... TODO |
| 38 | 37 | ||
| 39 | if ((addr & 0x3E000000) == 0x08000000) { | 38 | if ((addr & 0x3E000000) == 0x08000000) { |
| 40 | var = *((const T*)&g_fcram[addr & MEM_FCRAM_MASK]); | 39 | var = *((const T*)&g_fcram[addr & MEM_FCRAM_MASK]); |
| 41 | 40 | ||
| 42 | // Scratchpad memory | 41 | // Scratchpad memory |
| 43 | } else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) { | 42 | } else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) { |
| 44 | var = *((const T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK]); | 43 | var = *((const T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK]); |
| 45 | } | 44 | } |
| 46 | /*else if ((addr & 0x3F800000) == 0x04000000) { | 45 | /*else if ((addr & 0x3F800000) == 0x04000000) { |
| 47 | var = *((const T*)&m_pVRAM[addr & VRAM_MASK]); | 46 | var = *((const T*)&m_pVRAM[addr & VRAM_MASK]); |
| 48 | }*/ | 47 | }*/ |
| 49 | else { | 48 | else { |
| 50 | _assert_msg_(MEMMAP, false, "unknown hardware read"); | 49 | _assert_msg_(MEMMAP, false, "unknown hardware read"); |
| 51 | // WARN_LOG(MEMMAP, "ReadFromHardware: Invalid addr %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); | 50 | // WARN_LOG(MEMMAP, "ReadFromHardware: Invalid addr %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); |
| 52 | } | 51 | } |
| 53 | } | 52 | } |
| 54 | 53 | ||
| 55 | template <typename T> | 54 | template <typename T> |
| 56 | inline void WriteToHardware(u32 addr, const T data) { | 55 | inline void WriteToHardware(u32 addr, const T data) { |
| 57 | NOTICE_LOG(MEMMAP, "Test1 %08X", addr); | 56 | NOTICE_LOG(MEMMAP, "Test1 %08X", addr); |
| 58 | // ExeFS:/.code is loaded here: | 57 | // ExeFS:/.code is loaded here: |
| 59 | if ((addr & 0xFFF00000) == 0x00100000) { | 58 | if ((addr & 0xFFF00000) == 0x00100000) { |
| 60 | // TODO(ShizZy): This is dumb... handle correctly. From 3DBrew: | 59 | // TODO(ShizZy): This is dumb... handle correctly. From 3DBrew: |
| 61 | // http://3dbrew.org/wiki/Memory_layout#ARM11_User-land_memory_regions | 60 | // http://3dbrew.org/wiki/Memory_layout#ARM11_User-land_memory_regions |
| 62 | // The ExeFS:/.code is loaded here, executables must be loaded to the 0x00100000 region when | 61 | // The ExeFS:/.code is loaded here, executables must be loaded to the 0x00100000 region when |
| 63 | // the exheader "special memory" flag is clear. The 0x03F00000-byte size restriction only | 62 | // the exheader "special memory" flag is clear. The 0x03F00000-byte size restriction only |
| 64 | // applies when this flag is clear. Executables are usually loaded to 0x14000000 when the | 63 | // applies when this flag is clear. Executables are usually loaded to 0x14000000 when the |
| 65 | // exheader "special memory" flag is set, however this address can be arbitrary. | 64 | // exheader "special memory" flag is set, however this address can be arbitrary. |
| 66 | *(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data; | 65 | *(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data; |
| 67 | NOTICE_LOG(MEMMAP, "Test2"); | 66 | NOTICE_LOG(MEMMAP, "Test2"); |
| 68 | 67 | ||
| 69 | // Scratchpad memory | 68 | // Scratchpad memory |
| 70 | } else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) { | 69 | } else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) { |
| 71 | *(T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK] = data; | 70 | *(T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK] = data; |
| 72 | 71 | ||
| 73 | // Heap mapped by ControlMemory: | 72 | // Heap mapped by ControlMemory: |
| 74 | } else if ((addr & 0x3E000000) == 0x08000000) { | 73 | } else if ((addr & 0x3E000000) == 0x08000000) { |
| 75 | // TODO(ShizZy): Writes to this virtual address should be put in physical memory at FCRAM + GSP | 74 | // TODO(ShizZy): Writes to this virtual address should be put in physical memory at FCRAM + GSP |
| 76 | // heap size... the following is writing to FCRAM + 0, which is actually supposed to be the | 75 | // heap size... the following is writing to FCRAM + 0, which is actually supposed to be the |
| 77 | // application's GSP heap | 76 | // application's GSP heap |
| 78 | *(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data; | 77 | *(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data; |
| 79 | } else if ((addr & 0xFF000000) == 0x14000000) { | 78 | } else if ((addr & 0xFF000000) == 0x14000000) { |
| 80 | _assert_msg_(MEMMAP, false, "umimplemented write to GSP heap"); | 79 | _assert_msg_(MEMMAP, false, "umimplemented write to GSP heap"); |
| 81 | } else if ((addr & 0xFFF00000) == 0x1EC00000) { | 80 | } else if ((addr & 0xFFF00000) == 0x1EC00000) { |
| 82 | _assert_msg_(MEMMAP, false, "umimplemented write to IO registers"); | 81 | _assert_msg_(MEMMAP, false, "umimplemented write to IO registers"); |
| 83 | } else if ((addr & 0xFF000000) == 0x1F000000) { | 82 | } else if ((addr & 0xFF000000) == 0x1F000000) { |
| 84 | _assert_msg_(MEMMAP, false, "umimplemented write to VRAM"); | 83 | _assert_msg_(MEMMAP, false, "umimplemented write to VRAM"); |
| 85 | } else if ((addr & 0xFFF00000) == 0x1FF00000) { | 84 | } else if ((addr & 0xFFF00000) == 0x1FF00000) { |
| 86 | _assert_msg_(MEMMAP, false, "umimplemented write to DSP memory"); | 85 | _assert_msg_(MEMMAP, false, "umimplemented write to DSP memory"); |
| 87 | } else if ((addr & 0xFFFF0000) == 0x1FF80000) { | 86 | } else if ((addr & 0xFFFF0000) == 0x1FF80000) { |
| 88 | _assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory"); | 87 | _assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory"); |
| 89 | } else if ((addr & 0xFFFFF000) == 0x1FF81000) { | 88 | } else if ((addr & 0xFFFFF000) == 0x1FF81000) { |
| 90 | _assert_msg_(MEMMAP, false, "umimplemented write to shared page"); | 89 | _assert_msg_(MEMMAP, false, "umimplemented write to shared page"); |
| 91 | } else { | 90 | } else { |
| 92 | _assert_msg_(MEMMAP, false, "unknown hardware write"); | 91 | _assert_msg_(MEMMAP, false, "unknown hardware write"); |
| 93 | } | 92 | } |
| 94 | } | 93 | } |
| 95 | 94 | ||
| 96 | bool IsValidAddress(const u32 addr) { | 95 | bool IsValidAddress(const u32 addr) { |
| 97 | if ((addr & 0x3E000000) == 0x08000000) { | 96 | if ((addr & 0x3E000000) == 0x08000000) { |
| 98 | return true; | 97 | return true; |
| 99 | } else if ((addr & 0x3F800000) == 0x04000000) { | 98 | } else if ((addr & 0x3F800000) == 0x04000000) { |
| 100 | return true; | 99 | return true; |
| 101 | } else if ((addr & 0xBFFF0000) == 0x00010000) { | 100 | } else if ((addr & 0xBFFF0000) == 0x00010000) { |
| 102 | return true; | 101 | return true; |
| 103 | } else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + MEM_FCRAM_MASK) { | 102 | } else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + MEM_FCRAM_MASK) { |
| 104 | return true; | 103 | return true; |
| 105 | } else { | 104 | } else { |
| 106 | return false; | 105 | return false; |
| 107 | } | 106 | } |
| 108 | } | 107 | } |
| 109 | 108 | ||
| 110 | u8 *GetPointer(const u32 addr) { | 109 | u8 *GetPointer(const u32 addr) { |
| 111 | // TODO(bunnei): Just a stub for now... ImplementMe! | 110 | // TODO(bunnei): Just a stub for now... ImplementMe! |
| 112 | if ((addr & 0x3E000000) == 0x08000000) { | 111 | if ((addr & 0x3E000000) == 0x08000000) { |
| 113 | return g_fcram + (addr & MEM_FCRAM_MASK); | 112 | return g_fcram + (addr & MEM_FCRAM_MASK); |
| 114 | } | 113 | } |
| 115 | //else if ((addr & 0x3F800000) == 0x04000000) { | 114 | //else if ((addr & 0x3F800000) == 0x04000000) { |
| 116 | // return g_vram + (addr & MEM_VRAM_MASK); | 115 | // return g_vram + (addr & MEM_VRAM_MASK); |
| 117 | //} | 116 | //} |
| 118 | //else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + g_MemorySize) { | 117 | //else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + g_MemorySize) { |
| 119 | // return m_pRAM + (addr & g_MemoryMask); | 118 | // return m_pRAM + (addr & g_MemoryMask); |
| 120 | //} | 119 | //} |
| 121 | else { | 120 | else { |
| 122 | //ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); | 121 | //ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); |
| 123 | ERROR_LOG(MEMMAP, "Unknown GetPointer %08x", addr); | 122 | ERROR_LOG(MEMMAP, "Unknown GetPointer %08x", addr); |
| 124 | static bool reported = false; | 123 | static bool reported = false; |
| 125 | //if (!reported) { | 124 | //if (!reported) { |
| 126 | // Reporting::ReportMessage("Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); | 125 | // Reporting::ReportMessage("Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); |
| 127 | // reported = true; | 126 | // reported = true; |
| 128 | //} | 127 | //} |
| 129 | //if (!g_Config.bIgnoreBadMemAccess) { | 128 | //if (!g_Config.bIgnoreBadMemAccess) { |
| 130 | // Core_EnableStepping(true); | 129 | // Core_EnableStepping(true); |
| 131 | // host->SetDebugMode(true); | 130 | // host->SetDebugMode(true); |
| 132 | //} | 131 | //} |
| 133 | return 0; | 132 | return 0; |
| 134 | } | 133 | } |
| 135 | } | 134 | } |
| 136 | 135 | ||
| 137 | u8 Read8(const u32 addr) { | 136 | u8 Read8(const u32 addr) { |
| 138 | u8 _var = 0; | 137 | u8 _var = 0; |
| 139 | ReadFromHardware<u8>(_var, addr); | 138 | ReadFromHardware<u8>(_var, addr); |
| 140 | return (u8)_var; | 139 | return (u8)_var; |
| 141 | } | 140 | } |
| 142 | 141 | ||
| 143 | u16 Read16(const u32 addr) { | 142 | u16 Read16(const u32 addr) { |
| 144 | u16_le _var = 0; | 143 | u16_le _var = 0; |
| 145 | ReadFromHardware<u16_le>(_var, addr); | 144 | ReadFromHardware<u16_le>(_var, addr); |
| 146 | return (u16)_var; | 145 | return (u16)_var; |
| 147 | } | 146 | } |
| 148 | 147 | ||
| 149 | u32 Read32(const u32 addr) { | 148 | u32 Read32(const u32 addr) { |
| 150 | u32_le _var = 0; | 149 | u32_le _var = 0; |
| 151 | ReadFromHardware<u32_le>(_var, addr); | 150 | ReadFromHardware<u32_le>(_var, addr); |
| 152 | return _var; | 151 | return _var; |
| 153 | } | 152 | } |
| 154 | 153 | ||
| 155 | u64 Read64(const u32 addr) { | 154 | u64 Read64(const u32 addr) { |
| 156 | u64_le _var = 0; | 155 | u64_le _var = 0; |
| 157 | ReadFromHardware<u64_le>(_var, addr); | 156 | ReadFromHardware<u64_le>(_var, addr); |
| 158 | return _var; | 157 | return _var; |
| 159 | } | 158 | } |
| 160 | 159 | ||
| 161 | u32 Read8_ZX(const u32 addr) { | 160 | u32 Read8_ZX(const u32 addr) { |
| 162 | return (u32)Read8(addr); | 161 | return (u32)Read8(addr); |
| 163 | } | 162 | } |
| 164 | 163 | ||
| 165 | u32 Read16_ZX(const u32 addr) { | 164 | u32 Read16_ZX(const u32 addr) { |
| 166 | return (u32)Read16(addr); | 165 | return (u32)Read16(addr); |
| 167 | } | 166 | } |
| 168 | 167 | ||
| 169 | void Write8(const u32 addr, const u8 data) { | 168 | void Write8(const u32 addr, const u8 data) { |
| 170 | WriteToHardware<u8>(addr, data); | 169 | WriteToHardware<u8>(addr, data); |
| 171 | } | 170 | } |
| 172 | 171 | ||
| 173 | void Write16(const u32 addr, const u16 data) { | 172 | void Write16(const u32 addr, const u16 data) { |
| 174 | WriteToHardware<u16_le>(addr, data); | 173 | WriteToHardware<u16_le>(addr, data); |
| 175 | } | 174 | } |
| 176 | 175 | ||
| 177 | void Write32(const u32 addr, const u32 data) { | 176 | void Write32(const u32 addr, const u32 data) { |
| 178 | WriteToHardware<u32_le>(addr, data); | 177 | WriteToHardware<u32_le>(addr, data); |
| 179 | } | 178 | } |
| 180 | 179 | ||
| 181 | void Write64(const u32 addr, const u64 data) { | 180 | void Write64(const u32 addr, const u64 data) { |
| 182 | WriteToHardware<u64_le>(addr, data); | 181 | WriteToHardware<u64_le>(addr, data); |
| 183 | } | 182 | } |
| 184 | 183 | ||
| 185 | } // namespace | 184 | } // namespace |